PORTS [
Timing and housekeeping interface
PhA, nPhA, PhB, nPhB<BOOL,
Vdd, Gnd<BOOL,
Reschedule<BOOL,
nBoardError=BOOL, -- Tristate
Main memory interface
MHold, MnReset<BOOL,
MnRq>BOOL,
MnGnt<BOOL,
MnNewRq>BOOL, -- Tristate
MnAdCycle=BOOL,
MTransport=INT[36],
MParity=BOOL,
MnShared=BOOL,
MnAbort>BOOL, -- Tristate
MnHousekeepingInProgress=BOOL,
MnDV=BOOL,
Serial debugging interface
DShift<BOOL,
DExecute<BOOL,
DnSelect0, DnSelect1, DnSelect2, DnSelect3, DnSelect4, DnSelect5, DnSelect6, DnSelect7<BOOL,
DDataIn<BOOL,
DDataOut>BOOL -- Tristate
]
Expand
IFU interface
IPData:INT[32];
IPParityB: BOOL;
IPCmdA: EnumType["Dragon.PBusCommands"];
IPRejectB: BOOL;
IPFaultB: EnumType["Dragon.PBusFaults"];
EU interface
EPData: INT[32];
EPParityB: BOOL;
EPCmdA: EnumType["Dragon.PBusCommands"];
EPRejectB: BOOL;
EPFaultB: EnumType["Dragon.PBusFaults"];
ip: InstructionProcessor[DnSelect0: DnSelect6, DnSelect1: DnSelect7];
pc: ProcessorCache[]