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PDT TEST COMPLETED March 4, 1987 6:23:23 pm PST [PSS] Added EnBWdWtPipe and checked March 31, 1987 1:26:09 pm PST [PSS] Added BCycle6 and checked April 3, 1987 1:37:48 pm PST [PSS] Checked after putting top level of cache together July 1, 1987 4:09:23 pm PDT [PSS] NB: Each line is one cycle Reset Sequence: One Cycle Reset Remaining x's will get flushed when the first BCycle0 appears. Do a Reset and check that x's get flushed out in the right number of cycles: B I I S S B P B D R | F I F N B B B B B B B M B S E D M M C O d e e F C C a e | o d B o C C C C C C C y F e n e y y m T M t t a t y t s | r M T N y y y y y y y B a l B M M R d I a F N u l c a e | c a I F c c c c c c c F u M W a a B d t B o l R l I t | e t P B l l l l l l l a l S d p p R m c T n t e e n | I c T e e e e e e e u t W W R R p a h I F l 0 3 | O h I 1 2 3 4 5 6 7 l C t p p l t 0 P B e L | M 2 P t o P l l y c T a S | i d i y y 1 h I s B | s e p 1 1 2 P e | m e P | a Do a BCycle0 and check the remaining x's go away and that BCycle1 -> 7 work: Check that FBTIP and NonFBTIP work: B I I S S B P B D R | F I F N B B B B B B B M B S E D M M C O d e e F C C a e | o d B o C C C C C C C y F e n e y y m T M t t a t y t s | r M T N y y y y y y y B a l B M M R d I a F N u l c a e | c a I F c c c c c c c F u M W a a B d t B o l R l I t | e t P B l l l l l l l a l S d p p R m c T n t e e n | I c T e e e e e e e u t W W R R p a h I F l 0 3 | O h I 1 2 3 4 5 6 7 l C t p p l t 0 P B e L | M 2 P t o P l l y c T a S | i d i y y 1 h I s B | s e p 1 1 2 P e | m e P | a First check that they are set by SetFBTIP and SetNonFBTIP respectively: Check they are cleared by Reset+(FBRply.IdMatch0) and Reset+(Rply.~MyFBRply.IdMatch0): B I I S S B P B D R | F I F N B B B B B B B M B S E D M M C O d e e F C C a e | o d B o C C C C C C C y F e n e y y m T M t t a t y t s | r M T N y y y y y y y B a l B M M R d I a F N u l c a e | c a I F c c c c c c c F u M W a a B d t B o l R l I t | e t P B l l l l l l l a l S d p p R m c T n t e e n | I c T e e e e e e e u t W W R R p a h I F l 0 3 | O h I 1 2 3 4 5 6 7 l C t p p l t 0 P B e L | M 2 P t o P l l y c T a S | i d i y y 1 h I s B | s e p 1 1 2 P e | m e P | a Check that reset overrides set for the FBTIP and NonFBTIP flip-flops: Check that MyBFault and BFaultCode work: B I I S S B P B D R | F I F N B B B B B B B M B S E D M M C O d e e F C C a e | o d B o C C C C C C C y F e n e y y m T M t t a t y t s | r M T N y y y y y y y B a l B M M R d I a F N u l c a e | c a I F c c c c c c c F u M W a a B d t B o l R l I t | e t P B l l l l l l l a l S d p p R m c T n t e e n | I c T e e e e e e e u t W W R R p a h I F l 0 3 | O h I 1 2 3 4 5 6 7 l C t p p l t 0 P B e L | M 2 P t o P l l y c T a S | i d i y y 1 h I s B | s e p 1 1 2 P e | m e P | a Check that fault reg and fault code get set, and that fault code is frozen despite more BCycle0's: Check that fault flip-flop can be cleared: Check that reset overrides set in the fault flip-flop: Check that LdPRdLatch, SelMSW, and EnBWdWtPipe works: B I I S S B P B D R | F I F N B B B B B B B M B S E D M M C O d e e F C C a e | o d B o C C C C C C C y F e n e y y m T M t t a t y t s | r M T N y y y y y y y B a l B M M R d I a F N u l c a e | c a I F c c c c c c c F u M W a a B d t B o l R l I t | e t P B l l l l l l l a l S d p p R m c T n t e e n | I c T e e e e e e e u t W W R R p a h I F l 0 3 | O h I 1 2 3 4 5 6 7 l C t p p l t 0 P B e L | M 2 P t o P l l y c T a S | i d i y y 1 h I s B | s e p 1 1 2 P e | m e P | a Put in cycles to clear previous state: RBRply, Data in cycle 1 LSW (cycle 0 is header): RBRply, Data in cycle 1 MSW (cycle 0 is header): RBRply, Data in cycle 2 LSW (cycle 0 is header): RBRply, Data in cycle 2 MSW (cycle 0 is header): RBRply, Data in cycle 3 LSW (cycle 0 is header): RBRply, Data in cycle 3 MSW (cycle 0 is header): RBRply, Data in cycle 4 LSW (cycle 0 is header): RBRply, Data in cycle 4 MSW (cycle 0 is header): CWSRply (cycle 0 is header): WSRply (cycle 0 is header): Check that ForceIOMisMatch, MyMapRply1, DeMapRply1, and MyRBRply12 work: B I I S S B P B D R | F I F N B B B B B B B M B S E D M M C O d e e F C C a e | o d B o C C C C C C C y F e n e y y m T M t t a t y t s | r M T N y y y y y y y B a l B M M R d I a F N u l c a e | c a I F c c c c c c c F u M W a a B d t B o l R l I t | e t P B l l l l l l l a l S d p p R m c T n t e e n | I c T e e e e e e e u t W W R R p a h I F l 0 3 | O h I 1 2 3 4 5 6 7 l C t p p l t 0 P B e L | M 2 P t o P l l y c T a S | i d i y y 1 h I s B | s e p 1 1 2 P e | m e P | a Check ForceIOMisMatch with IOReadRqst and IOTIdMatch=0: Check ForceIOMisMatch with IOReadRqst and IOTIdMatch=1: Check ForceIOMisMatch with IOWriteRqst and IOTIdMatch=0: Check ForceIOMisMatch with IOWriteRqst and IOTIdMatch=1: Check ForceIOMisMatch with BIOWriteRqst and IOTIdMatch=0: Check ForceIOMisMatch with BIOWriteRqst and IOTIdMatch=1: Check MyMapRply1 with IdMatch: Check MyMapRply1 without IdMatch: Check DeMapRply1 works: Check MyRBRply12 with IdMatch: Check MyRBRply12 without IdMatch: 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