DIRECTORY RoseTypes, RoseCreate, BitOps, Dragon; CachePInterfacePCtl: CEDAR PROGRAM IMPORTS RoseCreate, BitOps = BEGIN OPEN RoseTypes, BitOps; PBusFaults: TYPE = Dragon.PBusFaults; PBusCommands: TYPE = Dragon.PBusCommands; RegisterCells: PROC = BEGIN [] _ RoseCreate.RegisterCellType[name: "PCtl", expandProc: NIL, ioCreator: CreatePCtlIO, initializer: InitializePCtl, evals: [EvalSimple: PCtlEvalSimple], blackBox: NIL, stateToo: NIL, ports: CreatePCtlPorts[], drivePrototype: NEW [PCtlDrive]]; END; otherss: SymbolTable _ RoseCreate.GetOtherss["CachePInterfacePCtl.pass"]; CreatePCtlPorts: PROC RETURNS [ports: Ports] = {ports _ RoseCreate.PortsFromFile["CachePInterfacePCtl.PCtl.rosePorts"]}; PCtlIORef: TYPE = REF PCtlIORec; PCtlIORec: TYPE = MACHINE DEPENDENT RECORD [ fill0(0:0..14): [0..32767], Vdd(0:15..15): BOOLEAN, fill1(1:0..14): [0..32767], Gnd(1:15..15): BOOLEAN, fill2(2:0..14): [0..32767], PhAb(2:15..15): BOOLEAN, fill3(3:0..14): [0..32767], PhBb(3:15..15): BOOLEAN, fill4(4:0..14): [0..32767], Resetb(4:15..15): BOOLEAN, fill5(5:0..14): [0..32767], nVQMatchB(5:15..15): BOOLEAN, fill6(6:0..14): [0..32767], nQuadSharedB(6:15..15): BOOLEAN, fill7(7:0..14): [0..32767], PStoreAB(7:15..15): BOOLEAN, fill8(8:0..14): [0..32767], nPStoreAB(8:15..15): BOOLEAN, fill9(9:0..11): [0..4095], PQSelAB(9:12..15): [0..15], fill10(10:0..14): [0..32767], nPageDirtyB(10:15..15): BOOLEAN, fill11(11:0..14): [0..32767], SenseVMatchA(11:15..15): BOOLEAN, fill12(12:0..14): [0..32767], MDoneAB(12:15..15): BOOLEAN, fill13(13:0..14): [0..32767], MHeldAB(13:15..15): BOOLEAN, fill14(14:0..11): [0..4095], MFaultAB(14:12..15): PBusFaults, fill15(15:0..11): [0..4095], PCmdToMAB(15:12..15): PBusCommands, fill16(16:0..11): [0..4095], PAdr2831AB(16:12..15): [0..15], fill17(17:0..14): [0..32767], DriveVirtualPageAdrBA(17:15..15): BOOLEAN, fill18(18:0..14): [0..32767], DriveVirtualBlockAdrBA(18:15..15): BOOLEAN, fill19(19:0..14): [0..32767], StartWordMachineBA(19:15..15): BOOLEAN, PDataI(20:0..31): ARRAY [0..2) OF CARDINAL, fill21(22:0..14): [0..32767], DrivePDataB(22:15..15): BOOLEAN, fill22(23:0..14): [0..32767], DrivePDataI(23:15..15): BOOLEAN, fill23(24:0..11): [0..4095], PCmdI(24:12..15): PBusCommands, fill24(25:0..14): [0..32767], PRejectDriveHigh(25:15..15): BOOLEAN, fill25(26:0..14): [0..32767], PRejectDriveLow(26:15..15): BOOLEAN, fill26(27:0..14): [0..32767], PFaultDrive(27:15..15): BOOLEAN, fill27(28:0..11): [0..4095], PFaultI(28:12..15): PBusFaults, fill28(29:0..14): [0..32767], PNPErrorDriveLow(29:15..15): BOOLEAN, fill29(30:0..14): [0..32767], VARegSensePDataIA(30:15..15): BOOLEAN, fill30(31:0..14): [0..32767], LastRefRegSenseVARegB(31:15..15): BOOLEAN, fill31(32:0..14): [0..32767], PageDriveCAMBitsA(32:15..15): BOOLEAN, fill32(33:0..14): [0..32767], BlockDriveCAMBitsA(33:15..15): BOOLEAN, fill33(34:0..14): [0..32767], RefMatchesLastRefReg(34:15..15): BOOLEAN, fill34(35:0..14): [0..32767], PRamRegSensePDataIB(35:15..15): BOOLEAN, fill35(36:0..14): [0..32767], PRamRegDrivePDataIB(36:15..15): BOOLEAN, fill36(37:0..14): [0..32767], PRamRegSensePBitsB(37:15..15): BOOLEAN, fill37(38:0..14): [0..32767], PRamRegDrivePBitsB(38:15..15): BOOLEAN, fill38(39:0..14): [0..32767], PRamRegParityOut(39:15..15): BOOLEAN, fill39(40:0..13): [0..16383], PAdr3031AB(40:14..15): [0..3]]; PCtlDrive: TYPE = MACHINE DEPENDENT RECORD [ fill0(0:0..14): [0 .. 32768), Vdd(0:15..15): BOOLEAN, fill1(1:0..14): [0 .. 32768), Gnd(1:15..15): BOOLEAN, fill2(2:0..14): [0 .. 32768), PhAb(2:15..15): BOOLEAN, fill3(3:0..14): [0 .. 32768), PhBb(3:15..15): BOOLEAN, fill4(4:0..14): [0 .. 32768), Resetb(4:15..15): BOOLEAN, fill5(5:0..14): [0 .. 32768), nVQMatchB(5:15..15): BOOLEAN, fill6(6:0..14): [0 .. 32768), nQuadSharedB(6:15..15): BOOLEAN, fill7(7:0..14): [0 .. 32768), PStoreAB(7:15..15): BOOLEAN, fill8(8:0..14): [0 .. 32768), nPStoreAB(8:15..15): BOOLEAN, fill9(9:0..14): [0 .. 32768), PQSelAB(9:15..15): BOOLEAN, fill10(10:0..14): [0 .. 32768), nPageDirtyB(10:15..15): BOOLEAN, fill11(11:0..14): [0 .. 32768), SenseVMatchA(11:15..15): BOOLEAN, fill12(12:0..14): [0 .. 32768), MDoneAB(12:15..15): BOOLEAN, fill13(13:0..14): [0 .. 32768), MHeldAB(13:15..15): BOOLEAN, fill14(14:0..14): [0 .. 32768), MFaultAB(14:15..15): BOOLEAN, fill15(15:0..14): [0 .. 32768), PCmdToMAB(15:15..15): BOOLEAN, fill16(16:0..14): [0 .. 32768), PAdr2831AB(16:15..15): BOOLEAN, fill17(17:0..14): [0 .. 32768), DriveVirtualPageAdrBA(17:15..15): BOOLEAN, fill18(18:0..14): [0 .. 32768), DriveVirtualBlockAdrBA(18:15..15): BOOLEAN, fill19(19:0..14): [0 .. 32768), StartWordMachineBA(19:15..15): BOOLEAN, fill20(20:0..14): [0 .. 32768), PDataI(20:15..15): BOOLEAN, fill21(21:0..14): [0 .. 32768), DrivePDataB(21:15..15): BOOLEAN, fill22(22:0..14): [0 .. 32768), DrivePDataI(22:15..15): BOOLEAN, fill23(23:0..14): [0 .. 32768), PCmdI(23:15..15): BOOLEAN, fill24(24:0..14): [0 .. 32768), PRejectDriveHigh(24:15..15): BOOLEAN, fill25(25:0..14): [0 .. 32768), PRejectDriveLow(25:15..15): BOOLEAN, fill26(26:0..14): [0 .. 32768), PFaultDrive(26:15..15): BOOLEAN, fill27(27:0..14): [0 .. 32768), PFaultI(27:15..15): BOOLEAN, fill28(28:0..14): [0 .. 32768), PNPErrorDriveLow(28:15..15): BOOLEAN, fill29(29:0..14): [0 .. 32768), VARegSensePDataIA(29:15..15): BOOLEAN, fill30(30:0..14): [0 .. 32768), LastRefRegSenseVARegB(30:15..15): BOOLEAN, fill31(31:0..14): [0 .. 32768), PageDriveCAMBitsA(31:15..15): BOOLEAN, fill32(32:0..14): [0 .. 32768), BlockDriveCAMBitsA(32:15..15): BOOLEAN, fill33(33:0..14): [0 .. 32768), RefMatchesLastRefReg(33:15..15): BOOLEAN, fill34(34:0..14): [0 .. 32768), PRamRegSensePDataIB(34:15..15): BOOLEAN, fill35(35:0..14): [0 .. 32768), PRamRegDrivePDataIB(35:15..15): BOOLEAN, fill36(36:0..14): [0 .. 32768), PRamRegSensePBitsB(36:15..15): BOOLEAN, fill37(37:0..14): [0 .. 32768), PRamRegDrivePBitsB(37:15..15): BOOLEAN, fill38(38:0..14): [0 .. 32768), PRamRegParityOut(38:15..15): BOOLEAN, fill39(39:0..14): [0 .. 32768), PAdr3031AB(39:15..15): BOOLEAN]; CreatePCtlIO: PROC [cell: Cell] --IOCreator-- = { cell.realCellStuff.newIO _ NEW [PCtlIORec]; cell.realCellStuff.oldIO _ NEW [PCtlIORec]; }; PCtlStateRef: TYPE = REF PCtlStateRec; PCtlStateRec: TYPE = RECORD [ PCmdLatchAB: PBusCommands, RejectAB, RejectBA, ParityError, ParityErrorLatch: BOOL, IsNoOpBA: BOOL, Mask, MustBeOne: BitWord, LastQuad, ValidWordsAB, ValidWordsBA: BitWord, RequestMatchAB: BOOL, IOReferenceAB, CacheStoreReferenceAB, CacheReferenceAB, FetchReferenceAB, HoldReferenceAB, StoreReferenceAB, RunCAM: BOOL ]; InitializePCtl: Initializer = { IF leafily THEN BEGIN state: PCtlStateRef _ NEW [PCtlStateRec]; cell.realCellStuff.state _ state; END; }; PCtlEvalSimple: CellProc = BEGIN newIO: PCtlIORef _ NARROW[cell.realCellStuff.newIO]; state: PCtlStateRef _ NARROW[cell.realCellStuff.state]; BEGIN OPEN newIO, state; IF Resetb THEN { PCmdLatchAB _ NoOp; RejectAB _ FALSE; RejectBA _ FALSE; ParityError _ FALSE; ParityErrorLatch _ FALSE; Mask _ 0; ValidWordsAB _ 0FH; }; VARegSensePDataIA _ PhAb AND NOT RejectBA; LastRefRegSenseVARegB _ PhBb AND MDoneAB; IF LastRefRegSenseVARegB THEN LastQuad _ ECFW[PAdr2831AB, 4, 0, 2]; RunCAM _ (NOT RejectBA) OR MDoneAB; BlockDriveCAMBitsA _ PhAb AND (DriveVirtualBlockAdrBA OR RunCAM); PageDriveCAMBitsA _ PhAb AND (DriveVirtualPageAdrBA OR RunCAM); SenseVMatchA _ PhAb AND RunCAM; IF VARegSensePDataIA THEN { adrBits: BitWord _ 0; adrBits _ IBIW[EBFD[PDataI, 32, 2], adrBits, 4, 0]; adrBits _ IBIW[EBFD[PDataI, 32, 3], adrBits, 4, 1]; adrBits _ IBIW[EBFD[PDataI, 32, 22], adrBits, 4, 2]; adrBits _ IBIW[EBFD[PDataI, 32, 23], adrBits, 4, 3]; RequestMatchAB _ WAND[Mask, adrBits]=WAND[Mask, MustBeOne]; PCmdLatchAB _ PCmdI; PAdr2831AB _ MDTW[PDataI, 32, 28, 4, PAdr2831AB, 4, 0, 4]; }; IOReferenceAB _ PCmdLatchAB=IOFetch OR PCmdLatchAB=IOStore OR PCmdLatchAB=IOFetchHold OR PCmdLatchAB=IOStoreHold; CacheStoreReferenceAB _ PCmdLatchAB=Store OR PCmdLatchAB=StoreHold; CacheReferenceAB _ PCmdLatchAB=Fetch OR PCmdLatchAB=FetchHold OR CacheStoreReferenceAB; FetchReferenceAB _ PCmdLatchAB=Fetch OR PCmdLatchAB=FetchHold OR PCmdLatchAB=IOFetch OR PCmdLatchAB=IOFetchHold; HoldReferenceAB _ PCmdLatchAB=FetchHold OR PCmdLatchAB=StoreHold OR PCmdLatchAB=IOFetchHold OR PCmdLatchAB=IOStoreHold; StoreReferenceAB _ CacheStoreReferenceAB OR PCmdLatchAB=IOStore OR PCmdLatchAB=IOStoreHold; IF PhBb THEN ValidWordsBA _ ValidWordsAB; IF PhAb AND StartWordMachineBA THEN ValidWordsAB _ IBIW[TRUE, 0, 4, ECFW[PAdr2831AB, 4, 2, 2]]; IF PhAb AND NOT StartWordMachineBA THEN FOR i:[0..4) IN [0..4) DO IF EBFW[ValidWordsBA, 4, i] THEN { FOR j:[0..4) IN [1..4) DO k: [0..4) _ (i+j) MOD 4; IF NOT EBFW[ValidWordsBA, 4, k] THEN { ValidWordsAB _ IBIW[TRUE, ValidWordsBA, 4, k]; GOTO Done; }; ENDLOOP; GOTO Done; }; REPEAT Done => NULL; ENDLOOP; IF PhBb THEN { RejectBA _ NOT MDoneAB AND RequestMatchAB AND (IOReferenceAB OR (HoldReferenceAB AND NOT MHeldAB) OR (CacheReferenceAB AND (nVQMatchB OR NOT (NOT (RefMatchesLastRefReg AND ECFW[PAdr2831AB, 4, 0, 2]=LastQuad) OR EBFW[ValidWordsAB, 4, ECFW[PAdr2831AB, 4, 2, 2]]))) OR (CacheStoreReferenceAB AND (nPageDirtyB OR NOT nQuadSharedB))); IsNoOpBA _ PCmdLatchAB=NoOp; }; IF PhAb THEN RejectAB _ RejectBA; PStoreAB _ CacheStoreReferenceAB; nPStoreAB _ NOT PStoreAB; PQSelAB _ IF NOT CacheReferenceAB THEN 0 ELSE SELECT ECFW[PAdr2831AB, 4, 0, 2] FROM 0 => 8, 1 => 4, 2 => 2, 3 => 1, ENDCASE => ERROR; PCmdToMAB _ IF RequestMatchAB THEN PCmdLatchAB ELSE NoOp; DrivePDataB _ PhBb AND RequestMatchAB AND FetchReferenceAB; DrivePDataI _ NOT DrivePDataB; PRejectDriveHigh _ PhBb AND RequestMatchAB AND (RejectBA OR (MDoneAB AND MFaultAB#Dragon.None)); PRejectDriveLow _ PhAb; PFaultDrive _ (PhBb AND RequestMatchAB) OR PhAb; PFaultI _ IF MDoneAB AND PhBb THEN MFaultAB ELSE Dragon.None; IF PhAb THEN ParityError _ PRamRegParityOut AND NOT RejectBA AND NOT IsNoOpBA; IF PhBb AND ParityError THEN ParityErrorLatch _ TRUE; PNPErrorDriveLow _ ParityErrorLatch; PRamRegDrivePBitsB _ PhBb AND StoreReferenceAB AND (PCmdLatchAB#StoreHold OR MHeldAB); PRamRegDrivePDataIB _ PhBb AND FetchReferenceAB; PRamRegSensePBitsB _ PRamRegDrivePDataIB; PRamRegSensePDataIB _ PhBb AND StoreReferenceAB AND NOT RejectAB; PAdr3031AB _ MWTW[PAdr2831AB, 4, 2, 2, PAdr3031AB, 2, 0, 2]; END; END; RegisterCells[]; END. φCachePInterfacePCtl.Mesa created by RoseTranslate from CachePInterfacePCtl.Rose of January 29, 1985 9:37:11 pm PST for curry.pa at January 29, 1985 9:37:17 pm PST Signal Type decls port indices: Combinatorial signals, not really state bits Κ Η˜Icodešœ™Kšœ‰™‰K˜K˜šΟk ˜ K˜&—K˜šΠblœœ˜"Kšœ˜—K˜šœ˜ K˜—K˜šœ™Kšœ œ˜%Kšœœ˜)K˜—K˜šΟn œœ˜Kš˜˜.Kšœ œ˜K˜5K˜$Kšœ œ œ˜K˜Kšœœ˜!—Kšœ˜—K˜IK˜KšŸœœœ[˜xK˜Kšœ œœ ˜ š œ œœ œœ˜,K˜Kšœœ˜K˜Kšœœ˜K˜Kšœœ˜K˜Kšœœ˜K˜Kšœœ˜K˜Kšœœ˜K˜Kšœœ˜ K˜Kšœœ˜K˜Kšœœ˜K˜K˜K˜Kšœœ˜ K˜Kšœœ˜!K˜Kšœœ˜K˜Kšœœ˜K˜K˜ K˜K˜#K˜K˜K˜Kšœ"œ˜*K˜Kšœ#œ˜+K˜Kšœœ˜'Kšœœœœ˜+K˜Kšœœ˜ K˜Kšœœ˜ K˜K˜K˜Kšœœ˜%K˜Kšœœ˜$K˜Kšœœ˜ K˜K˜K˜Kšœœ˜%K˜Kšœœ˜&K˜Kšœ"œ˜*K˜Kšœœ˜&K˜Kšœœ˜'K˜Kšœ!œ˜)K˜Kšœ œ˜(K˜Kšœ œ˜(K˜Kšœœ˜'K˜Kšœœ˜'K˜Kšœœ˜%K˜K˜—K˜šœ ™ K˜—K˜š œ œœ œœ˜,K˜Kšœœ˜K˜Kšœœ˜K˜Kšœœ˜K˜Kšœœ˜K˜Kšœœ˜K˜Kšœœ˜K˜Kšœœ˜ K˜Kšœœ˜K˜Kšœœ˜K˜Kšœœ˜K˜Kšœœ˜ K˜Kšœœ˜!K˜Kšœœ˜K˜Kšœœ˜K˜Kšœœ˜K˜Kšœœ˜K˜Kšœœ˜K˜Kšœ"œ˜*K˜Kšœ#œ˜+K˜Kšœœ˜'K˜Kšœœ˜K˜Kšœœ˜ K˜Kšœœ˜ K˜Kšœœ˜K˜Kšœœ˜%K˜Kšœœ˜$K˜Kšœœ˜ K˜Kšœœ˜K˜Kšœœ˜%K˜Kšœœ˜&K˜Kšœ"œ˜*K˜Kšœœ˜&K˜Kšœœ˜'K˜Kšœ!œ˜)K˜Kšœ œ˜(K˜Kšœ œ˜(K˜Kšœœ˜'K˜Kšœœ˜'K˜Kšœœ˜%K˜Kšœœ˜ —K˜K˜šŸ œœΟc œ˜1Kšœœ ˜+Kšœœ ˜+K˜—K˜Kšœœœ˜&šœœœ˜J˜Jšœ3œ˜8Jšœ œ˜J˜J˜.Jšœœ˜™,Jšœu˜y—K˜—K˜˜šœ ˜Kš˜Kšœœ˜)K˜!Kšœ˜—K˜—K˜˜Kš˜Kšœœ˜4šœœ˜7šœœ˜šœœ˜J˜Jšœ œ˜Jšœ œ˜Jšœœ˜Jšœœ˜J˜ J˜J˜—Jšœœœ ˜*Jšœœ ˜)Jšœœ œ˜CJšœ œ œ ˜#Jšœœœ ˜AJšœœœ ˜?Jšœœ˜šœœ˜J˜Jšœ œœ ˜3Jšœ œœ ˜3Jšœ œœ!˜4Jšœ œœ!˜4Jšœœœ˜;J˜Jšœ œ)˜:J˜—J˜Jšœ$œœœ˜qJšœ*œ˜CJšœ%œœ˜WJšœ%œœœ˜pJšœ(œœœ˜wJšœ)œœ˜[J˜Jšœœ˜)Jš œœœœœœ˜_šœœœ˜'šœ œ˜šœœœ˜"šœ œ˜Jšœœ˜šœœœœ˜&Jšœœœ˜.Jšœ˜ J˜—Jšœ˜—Jšœ˜ J˜—š˜Jšœœ˜ —Jšœ˜——J˜šœœ˜šœ œ œ˜-šœœœœ ˜6šœ˜šœ œ˜Jšœœœœ œœœ˜|——šœ˜Jšœ œœ˜$———J˜J˜—Jšœœ˜!J˜!Jšœ œ ˜šœ œœœœœœ˜SJ˜J˜J˜J˜Jšœœ˜—Jšœ œœ œ˜9J˜Jšœœœ˜;Jšœœ ˜Jš œœœ œ œ˜aJ˜Jšœœœ˜0Jš œ œ œœ œ ˜=J˜Jš œœ œœ œœ ˜NJšœœ œœ˜5J˜$J˜Jšœœœœ ˜VJšœœ˜0J˜)Jšœœœœ ˜AJšœ œ+˜