Directory CacheOps; Imports BitOps, BitSwOps, Dragon; Open BitOps, BitSwOps, Dragon; CELLTYPE "MEntryCtl" PORTS[ Vdd, GndINT[4], nQDirtyB=INT[4], RPValidBitA, nRPValidBitA, RPDirtyBitA, nRPDirtyBitA, VPValidBitA, nVPValidBitA=BIT-(Special XPhobic), ForceAllDataSelectsBA>BOOL, CellAdrBA, nCellAdrBA>INT[7], SelOrphanAdrBA, SelMapAdrBA, SelVPBA, SelRPVictimBA, SelRPDecoderBA, SelRealDataBA, SelDecodeBA>BOOL, SenseVictimA>BOOL, PAdr2831ABBOOL, MDataI=INT[32], SetSharedA, ResetMasterA, SetRPDirtyVPValidA, FlagLatchB, SetFlagsA, IncrementVictimBA, IncrementMAdrCtrB, ZeroMAdrCtrB, SampleDirtyBitsB, DeleteDirtyBitB, VictimSelectBA, RefreshToDecoderBA, IfGrantThenGetAdrElseRefreshToDecoderBA, FetchAddressBA, DirtyBitsToMQSelBA, SamplePAdr2831B, SampleMAdr2831B, Adr2829ToMQSelBA, AddressBitsToMDataIA, VictimAddressBitsToMDataIA, SelectRPBA, SelectVPVictimOrOrphanBA, SelectRealDataBA, SelVictimOrOrphanBA, RefreshIfRefVirtualBA, SenseVictimBABOOL, MAdr3031BA>INT[2] ] State RefreshCountAB, RefreshCountBA: CARDINAL, VictimCountAB, VictimCountBA: CARDINAL, MAdrCtrAB, MAdrCtrBA: CARDINAL, IncrementVictimAB: BOOL, LatchVPValidBA, LatchRPDirtyBA: BOOL, VictimDirtyBitsAB, VictimDirtyBitsBA: BitWord, Adr2829BA, FirstDirty: CARDINAL, DoGetAdrBA, DoRefreshBA, VictimDataSelectBA, ReallyVictimToDecoderBA: BOOL EvalSimple DriveBit: PROC[bit, nBit: Switch, dBit: BOOL] RETURNS [newBit, newNBit: Switch] = { newBit _ SIBISS[dBit, bit, [[driveStrong, L], [driveStrong, H]]]; newNBit _ SIBISS[dBit, nBit, [[driveStrong, H], [driveStrong, L]]]; }; { s: SwitchTypes.Strength _ IF PhBb THEN drive ELSE none; VPValidBitA _ SIBISS[TRUE, VPValidBitA, [[none, X], [s, H]]]; nVPValidBitA _ SIBISS[TRUE, nVPValidBitA, [[none, X], [s, H]]]; RPValidBitA _ SIBISS[TRUE, RPValidBitA, [[none, X], [s, H]]]; nRPValidBitA _ SIBISS[TRUE, nRPValidBitA, [[none, X], [s, H]]]; RPDirtyBitA _ SIBISS[TRUE, RPDirtyBitA, [[none, X], [s, H]]]; nRPDirtyBitA _ SIBISS[TRUE, nRPDirtyBitA, [[none, X], [s, H]]]; QValidA _ SIBISS[TRUE, QValidA, [[none, X], [s, H]]]; nQValidA _ SIBISS[TRUE, nQValidA, [[none, X], [s, H]]]; QMasterA _ SIBISS[TRUE, QMasterA, [[none, X], [s, H]]]; nQMasterA _ SIBISS[TRUE, nQMasterA, [[none, X], [s, H]]]; QSharedA _ SIBISS[TRUE, QSharedA, [[none, X], [s, H]]]; nQSharedA _ SIBISS[TRUE, nQSharedA, [[none, X], [s, H]]]; }; Assert[NOT MoreThanOneOf[SetSharedA, SetFlagsA, SetRPDirtyVPValidA]]; IF Resetb AND PhAb THEN { [VPValidBitA, nVPValidBitA] _ DriveBit[VPValidBitA, nVPValidBitA, FALSE]; [RPValidBitA, nRPValidBitA] _ DriveBit[RPValidBitA, nRPValidBitA, FALSE]; [RPDirtyBitA, nRPDirtyBitA] _ DriveBit[RPDirtyBitA, nRPDirtyBitA, FALSE]; [QMasterA, nQMasterA] _ DriveBit[QMasterA, nQMasterA, FALSE]; [QSharedA, nQSharedA] _ DriveBit[QSharedA, nQSharedA, FALSE]; [QValidA, nQValidA] _ DriveBit[QValidA, nQValidA, FALSE]; }; IF SetSharedA THEN [QSharedA, nQSharedA] _ DriveBit[QSharedA, nQSharedA, TRUE]; IF ResetMasterA THEN [QMasterA, nQMasterA] _ DriveBit[QMasterA, nQMasterA, FALSE]; IF SetRPDirtyVPValidA THEN { [VPValidBitA, nVPValidBitA] _ DriveBit[VPValidBitA, nVPValidBitA, LatchVPValidBA]; [RPDirtyBitA, nRPDirtyBitA] _ DriveBit[RPDirtyBitA, nRPDirtyBitA, LatchRPDirtyBA]; }; IF FlagLatchB THEN { LatchVPValidBA _ EBFD[MDataI, 32, 30]; LatchRPDirtyBA _ EBFD[MDataI, 32, 31]; }; IF SetFlagsA THEN { [VPValidBitA, nVPValidBitA] _ DriveBit[VPValidBitA, nVPValidBitA, TRUE]; [RPValidBitA, nRPValidBitA] _ DriveBit[RPValidBitA, nRPValidBitA, TRUE]; [RPDirtyBitA, nRPDirtyBitA] _ DriveBit[RPDirtyBitA, nRPDirtyBitA, NOT IsCleanBA]; [QMasterA, nQMasterA] _ DriveBit[QMasterA, nQMasterA, FALSE]; [QSharedA, nQSharedA] _ DriveBit[QSharedA, nQSharedA, LatchSharedBA]; [QValidA, nQValidA] _ DriveBit[QValidA, nQValidA, TRUE]; }; IF PhAb THEN { RefreshCountAB _ IF Resetb THEN 0 ELSE RefreshCountBA; VictimCountAB _ IF Resetb THEN 0 ELSE VictimCountBA; VictimDirtyBitsAB _ VictimDirtyBitsBA; MAdrCtrAB _ MAdrCtrBA; IncrementVictimAB _ IncrementVictimBA; }; IF PhBb THEN VictimCountBA _ IF IncrementVictimAB AND NOT MatchRealBlockAB THEN (VictimCountAB+1) MOD 4 ELSE VictimCountAB; SenseVictimA _ PhAb AND SenseVictimBA AND NOT MatchRealBlockAB; Assert[NOT MoreThanOneOf[IncrementMAdrCtrB, ZeroMAdrCtrB, SamplePAdr2831B, SampleMAdr2831B]]; IF IncrementMAdrCtrB THEN MAdrCtrBA _ IF ContinueBA THEN ((MAdrCtrAB+1) MOD 4) ELSE MAdrCtrAB; IF ZeroMAdrCtrB THEN MAdrCtrBA _ 0; Assert[NOT MoreThanOneOf[SampleDirtyBitsB, DeleteDirtyBitB]]; IF SampleDirtyBitsB THEN VictimDirtyBitsBA _ WNOT[nQDirtyB, 4]; IF PhAb THEN nQDirtyB _ 0FH; IF DeleteDirtyBitB THEN FOR i:[0..4) IN [0..4) DO IF EBFW[VictimDirtyBitsAB, 4, i] THEN { VictimDirtyBitsBA _ IBIW[FALSE, VictimDirtyBitsAB, 4, i]; EXIT; }; ENDLOOP; SomeDirtyBA _ FALSE; FOR i:[0..4) IN [0..4) DO IF EBFW[VictimDirtyBitsBA, 4, i] THEN { OneDirtyBA _ TRUE; IF SomeDirtyBA THEN OneDirtyBA _ FALSE; SomeDirtyBA _ TRUE; }; ENDLOOP; DoGetAdrBA _ (MasterBA AND IfGrantThenGetAdrElseRefreshToDecoderBA) OR FetchAddressBA; DoRefreshBA _ (NOT MasterBA AND IfGrantThenGetAdrElseRefreshToDecoderBA) OR RefreshToDecoderBA OR (RefreshIfRefVirtualBA AND GetAdrCmdBA=RefVirtual); VictimDataSelectBA _ (SelVictimOrOrphanBA AND NOT MatchRealBlockAB) OR VictimSelectBA; SelMapAdrBA _ DoGetAdrBA AND GetAdrCmdBA=RefRealAssemble; DriveVirtualPageAdrBA _ (DoGetAdrBA AND GetAdrCmdBA=RefVirtual) OR SelectVPVictimOrOrphanBA; DriveVirtualBlockAdrBA _ (DoGetAdrBA AND (GetAdrCmdBA=RefRealMap OR GetAdrCmdBA=RefRealAssemble OR GetAdrCmdBA=RefVirtual)) OR SelectVPVictimOrOrphanBA; SelRPVictimBA _ DoGetAdrBA AND GetAdrCmdBA=VictimReal; SelRPDecoderBA _ SelectRPBA AND NOT MatchRealBlockAB; SelVPBA _ SelectVPVictimOrOrphanBA AND NOT MatchRealBlockAB; SelOrphanAdrBA _ SelectVPVictimOrOrphanBA AND MatchRealBlockAB; ReallyVictimToDecoderBA _ SelRPDecoderBA OR VictimDataSelectBA; SelRealDataBA _ SelectRealDataBA OR (SelVictimOrOrphanBA AND MatchRealBlockAB); SelDecodeBA _ DoRefreshBA OR VictimDataSelectBA; IF PhBb THEN ForceAllDataSelectsBA _ Resetb; Assert[NOT MoreThanOneOf[ReallyVictimToDecoderBA, DoRefreshBA]]; IF ReallyVictimToDecoderBA THEN CellAdrBA _ ICIW[VictimCountBA, 0, 7, 0, 7]; Assert[NOT MoreThanOneOf[DoRefreshBA, DirtyBitsToMQSelBA, Adr2829ToMQSelBA]]; IF PhBb THEN RefreshCountBA _ IF DoRefreshBA THEN (RefreshCountAB+1) MOD 512 ELSE RefreshCountAB; IF DoRefreshBA THEN { CellAdrBA _ MWTW[RefreshCountBA, 9, 0, 7, 0, 7, 0, 7]; MQSelBA _ SELECT ECFW[RefreshCountBA, 9, 7, 2] FROM 0 => 8, 1 => 4, 2 => 2, 3 => 1, ENDCASE => ERROR; }; nCellAdrBA _ WNOT[CellAdrBA, 7]; IF Resetb THEN MQSelBA _ 0FH; FOR i:[0..4) IN [0..4) DO IF EBFW[VictimDirtyBitsBA, 4, i] THEN { FirstDirty _ i; EXIT; }; ENDLOOP; IF DirtyBitsToMQSelBA THEN { MQSelBA _ IBIW[TRUE, 0, 4, FirstDirty]; }; IF SamplePAdr2831B THEN { Adr2829BA _ ECFW[PAdr2831AB, 4, 0, 2]; MAdrCtrBA _ ECFW[PAdr2831AB, 4, 2, 2] }; IF SampleMAdr2831B THEN { Adr2829BA _ ECFD[MDataI, 32, 28, 2]; MAdrCtrBA _ ECFD[MDataI, 32, 30, 2] }; MatchQSelBA _ SELECT Adr2829BA FROM 0 => 8, 1 => 4, 2 => 2, 3 => 1, ENDCASE => ERROR; IF Adr2829ToMQSelBA THEN { MQSelBA _ SELECT Adr2829BA FROM 0 => 8, 1 => 4, 2 => 2, 3 => 1, ENDCASE => ERROR; }; MAdr3031BA _ ICIW[MAdrCtrBA, MAdr3031BA, 2, 0, 2]; Assert[NOT MoreThanOneOf[AddressBitsToMDataIA, VictimAddressBitsToMDataIA]]; IF AddressBitsToMDataIA THEN MDataI _ MWTD[PAdr2831AB, 4, 0, 4, MDataI, 32, 28, 4]; IF VictimAddressBitsToMDataIA THEN { MDataI _ ICID[FirstDirty, MDataI, 32, 28, 2]; MDataI _ ICID[0, MDataI, 32, 30, 2]; }; ENDCELLTYPE CacheMInterfaceMEntryCtl.rose Last edited by: Barth, July 27, 1984 5:33:44 pm PDT Last edited by: Curry, January 29, 1985 9:30:00 pm PST Timing and housekeeping interface Buffered timing and housekeeping interface Cell control P control <=> M control Internal main memory interface Entry Control ROM interface Control steel wool Intermediate values, not actual state bits The next block of code assumes that the instructions have been set to none and only sets the instructions if a strength other than none is to be applied. �Êœ™Jšœ3™3Jšœ6™6—J˜J˜Jšœ!˜!Jšœ˜J™šœ˜Jšœ˜J˜šœ!™!Jšœ Ïkœ˜J™—šœ*™*Jšœ �œ˜Jšœ�œ˜ J˜—™ Jšœ<�œ˜RJšœ�œ�œ˜-JšœP�œ˜fJšœ�œ˜Jšœ�œ˜Jšœ`�œ˜eJšœ �œ˜J™—™Jšœ �œ˜Jšœ.�œ˜3J˜—šœ™Jšœ�œ˜J˜—™Jšœå�œ˜êJ˜—™Jšœ0˜0JšœA�œ˜FJšœ�œ˜Jšœ �œ˜—Jšœ˜J˜˜Jšœ �œ˜)Jšœ�œ˜'Jšœ�œ˜Jšœ�œ˜Jšœ �œ˜%Jšœ.˜.Jšœ�œ˜ ™*JšœF�˜J——˜ J˜šÏnœ�œ�œ�œ˜SJšœ �œ�œ�œ˜AJšœ �œ�œ�œ˜CJ˜J˜—šœ˜Jšœ�œ�œ�œ˜7Jš œ�œ�œ�œ�œ˜=Jš œ�œ�œ�œ�œ˜?Jš œ�œ�œ�œ�œ˜=Jš œ�œ�œ�œ�œ˜?Jš œ�œ�œ�œ�œ˜=Jš œ�œ�œ�œ�œ˜?Jš œ �œ�œ�œ�œ˜5Jš œ �œ�œ�œ�œ˜7Jš œ �œ�œ�œ�œ˜7Jš œ �œ�œ�œ�œ˜9Jš œ �œ�œ�œ�œ˜7Jš œ �œ�œ�œ�œ˜9Jšœ˜—J˜Jšœ™™™J™Jšœ�œ;˜EJ˜š�œ�œ�œ˜JšœB�œ˜IJšœB�œ˜IJšœB�œ˜IJšœ6�œ˜=Jšœ6�œ˜=Jšœ2�œ˜9J˜—Jš�œ �œ7�œ˜OJš�œ�œ7�œ˜Rš�œ�œ˜JšœR˜RJšœR˜RJ˜—š�œ �œ˜Jšœ�œ˜&Jšœ�œ˜&J˜—š�œ �œ˜JšœB�œ˜HJšœB�œ˜HJšœB�œ ˜QJšœ6�œ˜=JšœE˜EJšœ2�œ˜8J˜—J˜š�œ�œ˜Jšœ�œ�œ�œ˜6Jšœ�œ�œ�œ˜4Jšœ&˜&Jšœ˜Jšœ&˜&J˜—J˜Jš�œ�œ�œ�œ�œ�œ�œ�œ˜|Jšœ�œ�œ�œ˜?J˜Jšœ�œS˜]Jš �œ�œ �œ �œ�œ�œ ˜^Jš�œ�œ˜#J˜Jšœ�œ3˜=Jš�œ�œ�œ˜?Jš�œ�œ˜š �œ�œ�œ �œ�˜1š�œ�œ�œ˜'Jšœ�œ�œ˜9Jš�œ˜J˜—Jš�œ˜—Jšœ�œ˜š�œ �œ�˜š�œ�œ�œ˜'Jšœ �œ˜Jš�œ �œ�œ˜'Jšœ�œ˜J˜—Jš�œ˜—J˜Jšœ�œ*�œ˜VJš œ�œ �œ*�œ�œ�œ˜•Jšœ*�œ�œ�œ˜VJšœ�œ˜9Jšœ$�œ�œ˜\Jš œ%�œ�œ�œ�œ˜˜Jšœ�œ˜6Jšœ�œ�œ˜5Jšœ#�œ�œ˜