Directory BitOps; Open BitOps; MCtlROM: CELL[ Vdd, GndBOOL, SenseRMatch, SelOrphanAdr, SelVP, SelPageFlags>BOOL, SetSharedA, SetRPDirtyVPValidA, FlagLatchB, ResetVPValidA, SetFlagsA, ResetMasterA, IncrementRefreshB, IncrementVictimB, SampleDirtyBitsB, DeleteDirtyBitB, VictimToDecoderBA, RefreshToDecoderBA, IfGrantThenGetAdrElseRefreshToDecoderBA, DirtyBitsToMQSelBA, SamplePAdr2829B, SampleMAdr2829B, Adr2829ToMQSelBA, AddressBitsToMDataIA, AddressBitsLowZeroToMDataIA, SelectRPBA, SelectRealDataBA>BOOL, ] State EvalSimple ENDCELL; ÄCacheMCtlROM.rose Last edited by: Barth, June 21, 1984 9:07:45 pm PDT Timing and housekeeping interface Buffered timing and housekeeping interface Cell control Entry Control ROM interface ĘĪ˜Jšœ™Jšœ3™3J˜J˜J˜ J˜šœ Īkœ˜J˜šœ!™!Jšœ œ˜Jšœ œ˜—J™šœ*™*Jšœ œ˜Jšœœ˜ —J˜™ Jšœœ˜Jšœ/œ˜4J˜—™Jšœ„œ˜‰J˜—Jšœ˜J˜J˜J˜ Jšœ˜——…—hû