State
PCmdLatchAB: PBusCommands,
RejectAB, RejectBA, ParityError, ParityErrorLatch: BOOL,
IsNoOpBA: BOOL,
Mask, MustBeOne: BitWord,
LastQuad, ValidWordsAB, ValidWordsBA: BitWord,
RequestMatchAB: BOOL,
Combinatorial signals, not really state bits
IOReferenceAB, CacheStoreReferenceAB, CacheReferenceAB, FetchReferenceAB, HoldReferenceAB, StoreReferenceAB, RunCAM: BOOL
EvalSimple
IF Resetb
THEN {
PCmdLatchAB ← NoOp;
RejectAB ← FALSE;
RejectBA ← FALSE;
ParityError ← FALSE;
ParityErrorLatch ← FALSE;
Mask ← 0;
ValidWordsAB ← 0FH;
};
VARegSensePDataIA ← PhAb AND NOT RejectBA;
LastRefRegSenseVARegB ← PhBb AND MDoneAB;
IF LastRefRegSenseVARegB THEN LastQuad ← ECFW[PAdr2831AB, 4, 0, 2];
RunCAM ← (NOT RejectBA) OR MDoneAB;
BlockDriveCAMBitsA ← PhAb AND (DriveVirtualBlockAdrBA OR RunCAM);
PageDriveCAMBitsA ← PhAb AND (DriveVirtualPageAdrBA OR RunCAM);
SenseVMatchA ← PhAb AND RunCAM;
IF VARegSensePDataIA
THEN {
adrBits: BitWord ← 0;
adrBits ← IBIW[EBFD[PDataI, 32, 2], adrBits, 4, 0];
adrBits ← IBIW[EBFD[PDataI, 32, 3], adrBits, 4, 1];
adrBits ← IBIW[EBFD[PDataI, 32, 22], adrBits, 4, 2];
adrBits ← IBIW[EBFD[PDataI, 32, 23], adrBits, 4, 3];
RequestMatchAB ← WAND[Mask, adrBits]=WAND[Mask, MustBeOne];
PCmdLatchAB ← PCmdI;
PAdr2831AB ← MDTW[PDataI, 32, 28, 4, PAdr2831AB, 4, 0, 4];
};
IOReferenceAB ← PCmdLatchAB=IOFetch OR PCmdLatchAB=IOStore OR PCmdLatchAB=IOFetchHold OR PCmdLatchAB=IOStoreHold;
CacheStoreReferenceAB ← PCmdLatchAB=Store OR PCmdLatchAB=StoreHold;
CacheReferenceAB ← PCmdLatchAB=Fetch OR PCmdLatchAB=FetchHold OR CacheStoreReferenceAB;
FetchReferenceAB ← PCmdLatchAB=Fetch OR PCmdLatchAB=FetchHold OR PCmdLatchAB=IOFetch OR PCmdLatchAB=IOFetchHold;
HoldReferenceAB ← PCmdLatchAB=FetchHold OR PCmdLatchAB=StoreHold OR PCmdLatchAB=IOFetchHold OR PCmdLatchAB=IOStoreHold;
StoreReferenceAB ← CacheStoreReferenceAB OR PCmdLatchAB=IOStore OR PCmdLatchAB=IOStoreHold;
IF PhBb THEN ValidWordsBA ← ValidWordsAB;
IF PhAb AND StartWordMachineBA THEN ValidWordsAB ← IBIW[TRUE, 0, 4, ECFW[PAdr2831AB, 4, 2, 2]];
IF PhAb
AND
NOT StartWordMachineBA
THEN
FOR i:[0..4)
IN [0..4)
DO
IF
EBFW[ValidWordsBA, 4, i]
THEN {
FOR j:[0..4)
IN [1..4)
DO
k: [0..4) ← (i+j) MOD 4;
IF
NOT
EBFW[ValidWordsBA, 4, k]
THEN {
ValidWordsAB ← IBIW[TRUE, ValidWordsBA, 4, k];
GOTO Done;
};
ENDLOOP;
GOTO Done;
};
ENDLOOP;
IF PhBb
THEN {
RejectBA ←
NOT MDoneAB
AND RequestMatchAB
AND
(IOReferenceAB
OR (HoldReferenceAB
AND
NOT MHeldAB)
OR
(CacheReferenceAB
AND
(nVQMatchB
OR
NOT
(NOT (RefMatchesLastRefReg AND ECFW[PAdr2831AB, 4, 0, 2]=LastQuad) OR EBFW[ValidWordsAB, 4, ECFW[PAdr2831AB, 4, 2, 2]]))) OR
(CacheStoreReferenceAB
AND
(nPageDirtyB OR NOT nQuadSharedB)));
IsNoOpBA ← PCmdLatchAB=NoOp;
};
IF PhAb THEN RejectAB ← RejectBA;
PStoreAB ← CacheStoreReferenceAB;
nPStoreAB ← NOT PStoreAB;
PQSelAB ←
IF
NOT CacheReferenceAB
THEN 0
ELSE
SELECT
ECFW[PAdr2831AB, 4, 0, 2]
FROM
0 => 8,
1 => 4,
2 => 2,
3 => 1,
ENDCASE => ERROR;
PCmdToMAB ← IF RequestMatchAB THEN PCmdLatchAB ELSE NoOp;
DrivePDataB ← PhBb AND RequestMatchAB AND FetchReferenceAB;
DrivePDataI ← NOT DrivePDataB;
PRejectDriveHigh ← PhBb AND RequestMatchAB AND (RejectBA OR (MDoneAB AND MFaultAB#Dragon.None));
PRejectDriveLow ← PhAb;
PFaultDrive ← (PhBb AND RequestMatchAB) OR PhAb;
PFaultI ← IF MDoneAB AND PhBb THEN MFaultAB ELSE Dragon.None;
IF PhAb THEN ParityError ← PRamRegParityOut AND NOT RejectBA AND NOT IsNoOpBA;
IF PhBb AND ParityError THEN ParityErrorLatch ← TRUE;
PNPErrorDriveLow ← ParityErrorLatch;
PRamRegDrivePBitsB ← PhBb AND StoreReferenceAB AND (PCmdLatchAB#StoreHold OR MHeldAB);
PRamRegDrivePDataIB ← PhBb AND FetchReferenceAB;
PRamRegSensePBitsB ← PRamRegDrivePDataIB;
PRamRegSensePDataIB ← PhBb AND StoreReferenceAB AND NOT RejectAB;
PAdr3031AB ← MWTW[PAdr2831AB, 4, 2, 2, PAdr3031AB, 2, 0, 2];