CachePInterfacePCAMDriver.Mesa
created by RoseTranslate from CachePInterfacePCAMDriver.Rose of January 29, 1985 10:14:48 pm PST for curry.pa at January 29, 1985 10:15:57 pm PST
DIRECTORY
RoseTypes, RoseCreate, BitOps, BitSwOps, SwitchTypes;
CachePInterfacePCAMDriver: CEDAR PROGRAM
IMPORTS RoseCreate, BitOps, BitSwOps =
BEGIN OPEN
RoseTypes, BitOps, BitSwOps;
Signal Type decls
RegisterCells: PROC =
BEGIN
[] ← RoseCreate.RegisterCellType[name: "PCAMDriver",
expandProc: NIL,
ioCreator: CreatePCAMDriverIO, initializer: InitializePCAMDriver,
evals: [EvalSimple: PCAMDriverEvalSimple],
blackBox: NIL, stateToo: NIL,
ports: CreatePCAMDriverPorts[],
drivePrototype: NEW [PCAMDriverDrive]];
END;
otherss: SymbolTable ← RoseCreate.GetOtherss["CachePInterfacePCAMDriver.pass"];
CreatePCAMDriverPorts: PROC RETURNS [ports: Ports] = {ports ← RoseCreate.PortsFromFile["CachePInterfacePCAMDriver.PCAMDriver.rosePorts"]};
PCAMDriverIORef: TYPE = REF PCAMDriverIORec;
PCAMDriverIORec: TYPE = MACHINE DEPENDENT RECORD [
fill0(0:0..14): [0..32767],
Vdd(0:15..15): BOOLEAN,
fill1(1:0..14): [0..32767],
Gnd(1:15..15): BOOLEAN,
CAMPage(2:0..383): PACKED ARRAY [0 .. 23] OF SwitchTypes.SwitchVal,
nCAMPage(26:0..383): PACKED ARRAY [0 .. 23] OF SwitchTypes.SwitchVal,
CAMBlock(50:0..63): PACKED ARRAY [0 .. 3] OF SwitchTypes.SwitchVal,
nCAMBlock(54:0..63): PACKED ARRAY [0 .. 3] OF SwitchTypes.SwitchVal,
PDataI(58:0..31): ARRAY [0..2) OF CARDINAL,
fill7(60:0..14): [0..32767],
VARegSensePDataIA(60:15..15): BOOLEAN,
fill8(61:0..14): [0..32767],
LastRefRegSenseVARegB(61:15..15): BOOLEAN,
fill9(62:0..14): [0..32767],
PageDriveCAMBitsA(62:15..15): BOOLEAN,
fill10(63:0..14): [0..32767],
BlockDriveCAMBitsA(63:15..15): BOOLEAN,
fill11(64:0..14): [0..32767],
RefMatchesLastRefReg(64:15..15): BOOLEAN];
port indices:
PCAMDriverCAMPagePortIndex: CARDINAL = 2;
PCAMDriverNCAMPagePortIndex: CARDINAL = 3;
PCAMDriverCAMBlockPortIndex: CARDINAL = 4;
PCAMDriverNCAMBlockPortIndex: CARDINAL = 5;
PCAMDriverDrive: TYPE = MACHINE DEPENDENT RECORD [
fill0(0:0..14): [0 .. 32768),
Vdd(0:15..15): BOOLEAN,
fill1(1:0..14): [0 .. 32768),
Gnd(1:15..15): BOOLEAN,
fill2(2:0..14): [0 .. 32768),
CAMPage(2:15..15): BOOLEAN,
fill3(3:0..14): [0 .. 32768),
nCAMPage(3:15..15): BOOLEAN,
fill4(4:0..14): [0 .. 32768),
CAMBlock(4:15..15): BOOLEAN,
fill5(5:0..14): [0 .. 32768),
nCAMBlock(5:15..15): BOOLEAN,
fill6(6:0..14): [0 .. 32768),
PDataI(6:15..15): BOOLEAN,
fill7(7:0..14): [0 .. 32768),
VARegSensePDataIA(7:15..15): BOOLEAN,
fill8(8:0..14): [0 .. 32768),
LastRefRegSenseVARegB(8:15..15): BOOLEAN,
fill9(9:0..14): [0 .. 32768),
PageDriveCAMBitsA(9:15..15): BOOLEAN,
fill10(10:0..14): [0 .. 32768),
BlockDriveCAMBitsA(10:15..15): BOOLEAN,
fill11(11:0..14): [0 .. 32768),
RefMatchesLastRefReg(11:15..15): BOOLEAN];
CreatePCAMDriverIO: PROC [cell: Cell] --IOCreator-- = {
cell.realCellStuff.switchIO ← NEW [PCAMDriverIORec];
cell.realCellStuff.newIO ← NEW [PCAMDriverIORec];
cell.realCellStuff.oldIO ← NEW [PCAMDriverIORec];
};
PCAMDriverStateRef: TYPE = REF PCAMDriverStateRec;
PCAMDriverStateRec: TYPE = RECORD [
PageReg, LastRefPageReg: BitDWord,
BlockReg, LastRefBlockReg: BitWord
];
InitializePCAMDriver: Initializer = {
IF leafily THEN
BEGIN
state: PCAMDriverStateRef ← NEW [PCAMDriverStateRec];
cell.realCellStuff.state ← state;
END;
};
PCAMDriverEvalSimple: CellProc =
BEGIN
sw: PCAMDriverIORef ← NARROW[cell.realCellStuff.switchIO];
newIO: PCAMDriverIORef ← NARROW[cell.realCellStuff.newIO];
state: PCAMDriverStateRef ← NARROW[cell.realCellStuff.state];
BEGIN OPEN newIO, state;
IF VARegSensePDataIA THEN {
PageReg ← MDTD[PDataI, 32, 0, 24, PageReg, 24, 0, 24];
BlockReg ← MDTW[PDataI, 32, 24, 4, BlockReg, 4, 0, 4]
};
IF LastRefRegSenseVARegB THEN {
LastRefPageReg ← PageReg;
LastRefBlockReg ← BlockReg;
};
TRUSTED {
cpd: SwitchMWord ← DESCRIPTOR[CAMPage];
ncpd: SwitchMWord ← DESCRIPTOR[nCAMPage];
cbd: SwitchMWord ← DESCRIPTOR[CAMBlock];
ncbd: SwitchMWord ← DESCRIPTOR[nCAMBlock];
ps: SwitchTypes.Strength ← IF PageDriveCAMBitsA THEN driveStrong ELSE none;
bs: SwitchTypes.Strength ← IF BlockDriveCAMBitsA THEN driveStrong ELSE none;
SCDTS[PageReg, 24, 0, 24, cpd, 24, 0, 24, [[ps, L], [ps, H]]];
SCDTS[PageReg, 24, 0, 24, ncpd, 24, 0, 24, [[ps, H], [ps, L]]];
SCWTS[BlockReg, 4, 0, 4, cbd, 4, 0, 4, [[bs, L], [bs, H]]];
SCWTS[BlockReg, 4, 0, 4, ncbd, 4, 0, 4, [[bs, H], [bs, L]]];
};
RefMatchesLastRefReg ← PageReg=LastRefPageReg AND BlockReg=LastRefBlockReg;
END;
END;
RegisterCells[];
END.