CacheOps.mesa
.. functions for Dragon Cache Rosemary simulations. For now it assumes that there is only virtual memory. Mapping and map operations are not yet implemented.
last edited by E. McCreight, May 7, 1984 4:28:19 pm PDT
Last Edited by: Barth, July 3, 1984 4:04:51 pm PDT
DIRECTORY
BitOps,
BitSwOps,
Dragon USING [Word],
IO USING [STREAM],
Rope USING [ROPE];
CacheOps: CEDAR DEFINITIONS =
BEGIN
PageSize: NAT = 256;
StdLinesPerCache: NAT = 64;
WordsPerLine: NAT = 4;
PreFetchAdrCmd: TYPE = MACHINE DEPENDENT {VictimReal(0), RefRealMap(1), RefRealAssemble(2), RefVirtual(3)};
VirtualMemory: TYPE = REF;
defaultVM, lastVM: VirtualMemory;
NewVirtualMemory: PROC RETURNS [ m: VirtualMemory ];
VirtualMemoryFromFile: PROC [ m: VirtualMemory, fileName: Rope.ROPE ];
VirtualMemoryFromStream: PROC [ m: VirtualMemory, s: IO.STREAM ];
VMFileFormat: ERROR;
NewVirtualMemoryFromFile: PROC [ fileName: Rope.ROPE ] RETURNS [ m: VirtualMemory ];
= {m ← NewVirtualMemory[]; VirtualMemoryFromFile[m, fileName]};
VirtualMemoryToStream: PROC [ m: VirtualMemory, s: IO.STREAM ];
EnumerateVirtualMemory: PROC [ m: VirtualMemory, wdProc: PROC [ addr, data: Dragon.Word, readOnly, dirty: BOOLFALSE, privateData: REFNIL ], privateData: REFNIL ];
Cache: TYPE = REF;
lastCache: Cache;
NewCache: PROC [ mem: REF ANYNIL, nLines: NAT ← StdLinesPerCache ] RETURNS [ c: Cache ];
AccessPurpose: TYPE = {read, write};
Access: PROC [ c: Cache, address: Dragon.Word, purpose: AccessPurpose ← read, cycleNow: INT ← 0 ] RETURNS [ data: Dragon.Word, rejectCycles: NAT, pageFault, writeProtect: BOOL ];
Write: PROC [ c: Cache, address, data: Dragon.Word ];
IORead: PROC [ c: Cache, address: Dragon.Word, cycleNow: INT ← 0 ] RETURNS [ data: Dragon.Word, rejectCycles: NAT ];
IOWrite: PROC [ c: Cache, address, data: Dragon.Word, cycleNow: INT ← 0 ] RETURNS [ rejectCycles: NAT ];
SetFlags: PROC [ c: Cache, address: Dragon.Word, writeProtect, dirty, mapped: BOOL ];
SetIntervalFlags: PROC [ c: Cache, startAddress, endAddress -- [startAddress..endAddress] -- : Dragon.Word, writeProtect, dirty, mapped: BOOL ];
GetFlags: PROC [ c: Cache, address: Dragon.Word ] RETURNS [ writeProtect, dirty, mapped: BOOL ];
Parity32: PROC [ w: Dragon.Word ] RETURNS [ odd: BOOL ];
Parity16: PROC [ n: CARDINAL ] RETURNS [ odd: BOOL ];
DriveBus: PROC [busd, nbusd: BitSwOps.SwitchMWord, drive: BOOL, offset: CARDINAL, RAMReg: BitOps.BitDWord, RAMRegParity: BOOL];
END.