CacheMInterfaceMEntryCtl.rose
Last edited by: Barth, July 27, 1984 5:33:44 pm PDT
Last edited by: Curry, January 29, 1985 9:30:00 pm PST
Directory CacheOps;
Imports BitOps, BitSwOps, Dragon;
Open BitOps, BitSwOps, Dragon;
CELLTYPE "MEntryCtl"
PORTS[
Timing and housekeeping interface
Vdd, Gnd<BOOL,
Buffered timing and housekeeping interface
PhAb, PhBb<BOOL,
Resetb<BOOL,
Cell control
QValidA, nQValidA, QSharedA, nQSharedA, QMasterA, nQMasterA=BIT-(Special XPhobic),
MQSelBA, MatchQSelBA>INT[4], nQDirtyB=INT[4],
RPValidBitA, nRPValidBitA, RPDirtyBitA, nRPDirtyBitA, VPValidBitA, nVPValidBitA=BIT-(Special XPhobic),
ForceAllDataSelectsBA>BOOL,
CellAdrBA, nCellAdrBA>INT[7],
SelOrphanAdrBA, SelMapAdrBA, SelVPBA, SelRPVictimBA, SelRPDecoderBA, SelRealDataBA, SelDecodeBA>BOOL,
SenseVictimA>BOOL,
P control <=> M control
PAdr2831AB<INT[4],
DriveVirtualPageAdrBA, DriveVirtualBlockAdrBA>BOOL,
Internal main memory interface
MDataI=INT[32],
Entry Control ROM interface
SetSharedA, ResetMasterA, SetRPDirtyVPValidA, FlagLatchB, SetFlagsA, IncrementVictimBA, IncrementMAdrCtrB, ZeroMAdrCtrB, SampleDirtyBitsB, DeleteDirtyBitB, VictimSelectBA, RefreshToDecoderBA, IfGrantThenGetAdrElseRefreshToDecoderBA, FetchAddressBA, DirtyBitsToMQSelBA, SamplePAdr2831B, SampleMAdr2831B, Adr2829ToMQSelBA, AddressBitsToMDataIA, VictimAddressBitsToMDataIA, SelectRPBA, SelectVPVictimOrOrphanBA, SelectRealDataBA, SelVictimOrOrphanBA, RefreshIfRefVirtualBA, SenseVictimBA<BOOL,
Control steel wool
GetAdrCmdBA<EnumType["CacheOps.PreFetchAdrCmd"],
IsCleanBA, LatchSharedBA, MasterBA, MatchRealBlockAB, ContinueBA<BOOL,
OneDirtyBA, SomeDirtyBA>BOOL,
MAdr3031BA>INT[2]
]
State
RefreshCountAB, RefreshCountBA: CARDINAL,
VictimCountAB, VictimCountBA: CARDINAL,
MAdrCtrAB, MAdrCtrBA: CARDINAL,
IncrementVictimAB: BOOL,
LatchVPValidBA, LatchRPDirtyBA: BOOL,
VictimDirtyBitsAB, VictimDirtyBitsBA: BitWord,
Adr2829BA, FirstDirty: CARDINAL,
Intermediate values, not actual state bits
DoGetAdrBA, DoRefreshBA, VictimDataSelectBA, ReallyVictimToDecoderBA: BOOL
EvalSimple
DriveBit: PROC[bit, nBit: Switch, dBit: BOOL] RETURNS [newBit, newNBit: Switch] = {
newBit ← SIBISS[dBit, bit, [[driveStrong, L], [driveStrong, H]]];
newNBit ← SIBISS[dBit, nBit, [[driveStrong, H], [driveStrong, L]]];
};
{
s: SwitchTypes.Strength ← IF PhBb THEN drive ELSE none;
VPValidBitA ← SIBISS[TRUE, VPValidBitA, [[none, X], [s, H]]];
nVPValidBitA ← SIBISS[TRUE, nVPValidBitA, [[none, X], [s, H]]];
RPValidBitA ← SIBISS[TRUE, RPValidBitA, [[none, X], [s, H]]];
nRPValidBitA ← SIBISS[TRUE, nRPValidBitA, [[none, X], [s, H]]];
RPDirtyBitA ← SIBISS[TRUE, RPDirtyBitA, [[none, X], [s, H]]];
nRPDirtyBitA ← SIBISS[TRUE, nRPDirtyBitA, [[none, X], [s, H]]];
QValidA ← SIBISS[TRUE, QValidA, [[none, X], [s, H]]];
nQValidA ← SIBISS[TRUE, nQValidA, [[none, X], [s, H]]];
QMasterA ← SIBISS[TRUE, QMasterA, [[none, X], [s, H]]];
nQMasterA ← SIBISS[TRUE, nQMasterA, [[none, X], [s, H]]];
QSharedA ← SIBISS[TRUE, QSharedA, [[none, X], [s, H]]];
nQSharedA ← SIBISS[TRUE, nQSharedA, [[none, X], [s, H]]];
};
The next block of code assumes that the instructions have been set to none and only sets the instructions if a strength other than none is to be applied.
Assert[NOT MoreThanOneOf[SetSharedA, SetFlagsA, SetRPDirtyVPValidA]];
IF Resetb AND PhAb THEN {
[VPValidBitA, nVPValidBitA] ← DriveBit[VPValidBitA, nVPValidBitA, FALSE];
[RPValidBitA, nRPValidBitA] ← DriveBit[RPValidBitA, nRPValidBitA, FALSE];
[RPDirtyBitA, nRPDirtyBitA] ← DriveBit[RPDirtyBitA, nRPDirtyBitA, FALSE];
[QMasterA, nQMasterA] ← DriveBit[QMasterA, nQMasterA, FALSE];
[QSharedA, nQSharedA] ← DriveBit[QSharedA, nQSharedA, FALSE];
[QValidA, nQValidA] ← DriveBit[QValidA, nQValidA, FALSE];
};
IF SetSharedA THEN [QSharedA, nQSharedA] ← DriveBit[QSharedA, nQSharedA, TRUE];
IF ResetMasterA THEN [QMasterA, nQMasterA] ← DriveBit[QMasterA, nQMasterA, FALSE];
IF SetRPDirtyVPValidA THEN {
[VPValidBitA, nVPValidBitA] ← DriveBit[VPValidBitA, nVPValidBitA, LatchVPValidBA];
[RPDirtyBitA, nRPDirtyBitA] ← DriveBit[RPDirtyBitA, nRPDirtyBitA, LatchRPDirtyBA];
};
IF FlagLatchB THEN {
LatchVPValidBA ← EBFD[MDataI, 32, 30];
LatchRPDirtyBA ← EBFD[MDataI, 32, 31];
};
IF SetFlagsA THEN {
[VPValidBitA, nVPValidBitA] ← DriveBit[VPValidBitA, nVPValidBitA, TRUE];
[RPValidBitA, nRPValidBitA] ← DriveBit[RPValidBitA, nRPValidBitA, TRUE];
[RPDirtyBitA, nRPDirtyBitA] ← DriveBit[RPDirtyBitA, nRPDirtyBitA, NOT IsCleanBA];
[QMasterA, nQMasterA] ← DriveBit[QMasterA, nQMasterA, FALSE];
[QSharedA, nQSharedA] ← DriveBit[QSharedA, nQSharedA, LatchSharedBA];
[QValidA, nQValidA] ← DriveBit[QValidA, nQValidA, TRUE];
};
IF PhAb THEN {
RefreshCountAB ← IF Resetb THEN 0 ELSE RefreshCountBA;
VictimCountAB ← IF Resetb THEN 0 ELSE VictimCountBA;
VictimDirtyBitsAB ← VictimDirtyBitsBA;
MAdrCtrAB ← MAdrCtrBA;
IncrementVictimAB ← IncrementVictimBA;
};
IF PhBb THEN VictimCountBA ← IF IncrementVictimAB AND NOT MatchRealBlockAB THEN (VictimCountAB+1) MOD 4 ELSE VictimCountAB;
SenseVictimA ← PhAb AND SenseVictimBA AND NOT MatchRealBlockAB;
Assert[NOT MoreThanOneOf[IncrementMAdrCtrB, ZeroMAdrCtrB, SamplePAdr2831B, SampleMAdr2831B]];
IF IncrementMAdrCtrB THEN MAdrCtrBA ← IF ContinueBA THEN ((MAdrCtrAB+1) MOD 4) ELSE MAdrCtrAB;
IF ZeroMAdrCtrB THEN MAdrCtrBA ← 0;
Assert[NOT MoreThanOneOf[SampleDirtyBitsB, DeleteDirtyBitB]];
IF SampleDirtyBitsB THEN VictimDirtyBitsBA ← WNOT[nQDirtyB, 4];
IF PhAb THEN nQDirtyB ← 0FH;
IF DeleteDirtyBitB THEN FOR i:[0..4) IN [0..4) DO
IF EBFW[VictimDirtyBitsAB, 4, i] THEN {
VictimDirtyBitsBA ← IBIW[FALSE, VictimDirtyBitsAB, 4, i];
EXIT;
};
ENDLOOP;
SomeDirtyBA ← FALSE;
FOR i:[0..4) IN [0..4) DO
IF EBFW[VictimDirtyBitsBA, 4, i] THEN {
OneDirtyBA ← TRUE;
IF SomeDirtyBA THEN OneDirtyBA ← FALSE;
SomeDirtyBA ← TRUE;
};
ENDLOOP;
DoGetAdrBA ← (MasterBA AND IfGrantThenGetAdrElseRefreshToDecoderBA) OR FetchAddressBA;
DoRefreshBA ← (NOT MasterBA AND IfGrantThenGetAdrElseRefreshToDecoderBA) OR RefreshToDecoderBA OR (RefreshIfRefVirtualBA AND GetAdrCmdBA=RefVirtual);
VictimDataSelectBA ← (SelVictimOrOrphanBA AND NOT MatchRealBlockAB) OR VictimSelectBA;
SelMapAdrBA ← DoGetAdrBA AND GetAdrCmdBA=RefRealAssemble;
DriveVirtualPageAdrBA ← (DoGetAdrBA AND GetAdrCmdBA=RefVirtual) OR SelectVPVictimOrOrphanBA;
DriveVirtualBlockAdrBA ← (DoGetAdrBA AND (GetAdrCmdBA=RefRealMap OR GetAdrCmdBA=RefRealAssemble OR GetAdrCmdBA=RefVirtual)) OR SelectVPVictimOrOrphanBA;
SelRPVictimBA ← DoGetAdrBA AND GetAdrCmdBA=VictimReal;
SelRPDecoderBA ← SelectRPBA AND NOT MatchRealBlockAB;
SelVPBA ← SelectVPVictimOrOrphanBA AND NOT MatchRealBlockAB;
SelOrphanAdrBA ← SelectVPVictimOrOrphanBA AND MatchRealBlockAB;
ReallyVictimToDecoderBA ← SelRPDecoderBA OR VictimDataSelectBA;
SelRealDataBA ← SelectRealDataBA OR (SelVictimOrOrphanBA AND MatchRealBlockAB);
SelDecodeBA ← DoRefreshBA OR VictimDataSelectBA;
IF PhBb THEN ForceAllDataSelectsBA ← Resetb;
Assert[NOT MoreThanOneOf[ReallyVictimToDecoderBA, DoRefreshBA]];
IF ReallyVictimToDecoderBA THEN CellAdrBA ← ICIW[VictimCountBA, 0, 7, 0, 7];
Assert[NOT MoreThanOneOf[DoRefreshBA, DirtyBitsToMQSelBA, Adr2829ToMQSelBA]];
IF PhBb THEN RefreshCountBA ← IF DoRefreshBA THEN (RefreshCountAB+1) MOD 512 ELSE RefreshCountAB;
IF DoRefreshBA THEN {
CellAdrBA ← MWTW[RefreshCountBA, 9, 0, 7, 0, 7, 0, 7];
MQSelBA ← SELECT ECFW[RefreshCountBA, 9, 7, 2] FROM
0 => 8,
1 => 4,
2 => 2,
3 => 1,
ENDCASE => ERROR;
};
nCellAdrBA ← WNOT[CellAdrBA, 7];
IF Resetb THEN MQSelBA ← 0FH;
FOR i:[0..4) IN [0..4) DO
IF EBFW[VictimDirtyBitsBA, 4, i] THEN {
FirstDirty ← i;
EXIT;
};
ENDLOOP;
IF DirtyBitsToMQSelBA THEN {
MQSelBA ← IBIW[TRUE, 0, 4, FirstDirty];
};
IF SamplePAdr2831B THEN {
Adr2829BA ← ECFW[PAdr2831AB, 4, 0, 2];
MAdrCtrBA ← ECFW[PAdr2831AB, 4, 2, 2]
};
IF SampleMAdr2831B THEN {
Adr2829BA ← ECFD[MDataI, 32, 28, 2];
MAdrCtrBA ← ECFD[MDataI, 32, 30, 2]
};
MatchQSelBA ← SELECT Adr2829BA FROM
0 => 8,
1 => 4,
2 => 2,
3 => 1,
ENDCASE => ERROR;
IF Adr2829ToMQSelBA THEN {
MQSelBA ← SELECT Adr2829BA FROM
0 => 8,
1 => 4,
2 => 2,
3 => 1,
ENDCASE => ERROR;
};
MAdr3031BA ← ICIW[MAdrCtrBA, MAdr3031BA, 2, 0, 2];
Assert[NOT MoreThanOneOf[AddressBitsToMDataIA, VictimAddressBitsToMDataIA]];
IF AddressBitsToMDataIA THEN MDataI ← MWTD[PAdr2831AB, 4, 0, 4, MDataI, 32, 28, 4];
IF VictimAddressBitsToMDataIA THEN {
MDataI ← ICID[FirstDirty, MDataI, 32, 28, 2];
MDataI ← ICID[0, MDataI, 32, 30, 2];
};
ENDCELLTYPE