DIRECTORY Core, Boole, CoreCreate, CoreOps, FiniteStateAutomata; ReplyControlFSM: CEDAR PROGRAM IMPORTS Boole, CoreCreate, CoreOps, FiniteStateAutomata = BEGIN OPEN Boole, CoreCreate, FiniteStateAutomata; Create: PROC RETURNS [ct: CellType] = { fsa: StateMachine; CWSReq: Wire _ CoreOps.CreateWire[name: "CWSReq"]; OwnerAbort: Wire _ CoreOps.CreateWire[name: "OwnerAbort"]; FiveCycleReq: Wire _ CoreOps.CreateWire[name: "FiveCycleReq"]; ReqValid: Wire _ CoreOps.CreateWire[name: "ReqValid"]; RoomInPipe: Wire _ CoreOps.CreateWire[name: "RoomInPipe"]; ReplyIdle: Wire _ CoreOps.CreateWire[name: "ReplyIdle"]; NoDataForPipe: Wire _ CoreOps.CreateWire[name: "NoDataForPipe"]; SwRdPort: Wire _ CoreOps.CreateWire[name: "SwRdPort"]; SelRamBuf: Wire _ CoreOps.CreateWire[name: "SelRamBuf"]; AddressInPipe: Wire _ CoreOps.CreateWire[name: "AddressInPipe"]; OutBufRdAdd0: Wire _ CoreOps.CreateWire[name: "OutBufRdAdd0"]; OutBufRdAdd1: Wire _ CoreOps.CreateWire[name: "OutBufRdAdd1"]; public: Wire _ WireList[LIST["Vdd", "Gnd", "Clock", "Reset", CWSReq, OwnerAbort, FiveCycleReq, ReqValid, RoomInPipe, ReplyIdle, NoDataForPipe, SwRdPort, SelRamBuf, AddressInPipe, OutBufRdAdd0, OutBufRdAdd1]]; states: LIST OF ATOM _ LIST[$Idle]; states _ StateSeq[states, "RT", 2]; states _ StateSeq[states, "RF", 5]; states _ StateSeq[states, "RCWS", 5]; states _ StateSeq[states, "OA", 2]; fsa _ NewMachine[states]; Mealy[fsa, $Idle, LIST[ReplyIdle, NoDataForPipe], LIST [ [$Idle, Or[Not[ReqValid], Not[RoomInPipe]]], [$RT0, And[ReqValid, Not[FiveCycleReq], Not[CWSReq], Not[OwnerAbort], RoomInPipe]], [$RF0, And[ReqValid, FiveCycleReq, Not[OwnerAbort], RoomInPipe]], [$RCWS0, And[ReqValid, CWSReq, RoomInPipe]], [$OA0, And[ReqValid, OwnerAbort]] ]]; Mealy[fsa, $RT0, LIST[AddressInPipe], LIST[[$RT0, Not[RoomInPipe]], [$RT1, RoomInPipe]]]; Mealy[fsa, $RT1, LIST[OutBufRdAdd1, SwRdPort], LIST [ [$RT1, Not[RoomInPipe]], [$Idle, And[Not[ReqValid], RoomInPipe]], [$RT0, And[ReqValid, Not[FiveCycleReq], Not[CWSReq], Not[OwnerAbort], RoomInPipe]], [$RF0, And[ReqValid, FiveCycleReq, Not[OwnerAbort], RoomInPipe]], [$RCWS0, And[ReqValid, CWSReq, RoomInPipe]], [$OA0, And[ReqValid, OwnerAbort]] ]]; Mealy[fsa, $RF0, LIST[AddressInPipe], LIST[[$RF0, Not[RoomInPipe]], [$RF1, RoomInPipe]]]; Mealy[fsa, $RF1, LIST[SelRamBuf], LIST[[$RF1, Not[RoomInPipe]], [$RF2, RoomInPipe]]]; Mealy[fsa, $RF2, LIST[SelRamBuf, OutBufRdAdd1], LIST[[$RF2, Not[RoomInPipe]], [$RF3, RoomInPipe]]]; Mealy[fsa, $RF3, LIST[SelRamBuf, OutBufRdAdd0], LIST[[$RF3, Not[RoomInPipe]], [$RF4, RoomInPipe]]]; Mealy[fsa, $RF4, LIST[SelRamBuf, OutBufRdAdd0, OutBufRdAdd1, SwRdPort], LIST [ [$RF4, Not[RoomInPipe]], [$Idle, And[Not[ReqValid], RoomInPipe]], [$RT0, And[ReqValid, Not[FiveCycleReq], Not[CWSReq], Not[OwnerAbort], RoomInPipe]], [$RF0, And[ReqValid, FiveCycleReq, Not[OwnerAbort], RoomInPipe]], [$RCWS0, And[ReqValid, CWSReq, RoomInPipe]], [$OA0, And[ReqValid, OwnerAbort]] ]]; Mealy[fsa, $RCWS0, LIST[AddressInPipe], LIST[[$RCWS0, Not[RoomInPipe]], [$RCWS1, RoomInPipe]]]; Mealy[fsa, $RCWS1, LIST[OutBufRdAdd1], LIST[[$RCWS1, Not[RoomInPipe]], [$RCWS2, RoomInPipe]]]; Mealy[fsa, $RCWS2, LIST[OutBufRdAdd1], LIST[[$RCWS2, Not[RoomInPipe]], [$RCWS3, RoomInPipe]]]; Mealy[fsa, $RCWS3, LIST[OutBufRdAdd1], LIST[[$RCWS3, Not[RoomInPipe]], [$RCWS4, RoomInPipe]]]; Mealy[fsa, $RCWS4, LIST[OutBufRdAdd1, SwRdPort], LIST [ [$RCWS4, Not[RoomInPipe]], [$Idle, And[Not[ReqValid], RoomInPipe]], [$RT0, And[ReqValid, Not[FiveCycleReq], Not[CWSReq], Not[OwnerAbort], RoomInPipe]], [$RF0, And[ReqValid, FiveCycleReq, Not[OwnerAbort], RoomInPipe]], [$RCWS0, And[ReqValid, CWSReq, RoomInPipe]], [$OA0, And[ReqValid, OwnerAbort]] ]]; Mealy[fsa, $OA0, LIST[SwRdPort, NoDataForPipe, AddressInPipe], LIST[[$OA1, true]]]; Mealy[fsa, $OA1, LIST[NoDataForPipe], LIST [ [$OA0, Not[RoomInPipe]], [$Idle, And[Not[ReqValid], RoomInPipe]], [$RT0, And[ReqValid, Not[FiveCycleReq], Not[CWSReq], Not[OwnerAbort], RoomInPipe]], [$RF0, And[ReqValid, FiveCycleReq, Not[OwnerAbort], RoomInPipe]], [$RCWS0, And[ReqValid, CWSReq, RoomInPipe]], [$OA0, And[ReqValid, OwnerAbort]] ]]; fsa.initialState _ FindState[fsa, $Idle]; ct _ StateMachineCell[public, fsa]; }; END. ReplyControlFSM.mesa Copyright c 1986 by Xerox Corporation. All rights reserved. Last Edited by: Gasbarro April 2, 1987 11:00:30 am PST ΚŠ– "cedar" style˜codešœ™Kšœ Οmœ1™˜>Jšœ6˜6Jšœ:˜:J˜Jšœ8˜8Jšœ@˜@Jšœ6˜6Jšœ8˜8Jšœ@˜@Jšœ>˜>Jšœ>˜>J˜šœžœ ˜