CIRCUIT[Lambda _ 1, Temp _ 25, N _ 1] = { Vdd: node; ! ThymeBasics ! CMOS2.0u25C powerSupply: voltage[Vdd, Gnd] = 5.0; ?: Stray[Vdd| anD_N*16, pnD_N*16, aM_N*234, pM_N*156, apD_N*284, ppD_N*88, aM2_N*2136, pM2_N*550]; Vpbias: node; ?: Stray[Vpbias| aM_N*163, pM_N*114, aP_N*42, pP_N*42]; n1: node; linesel: node; ?: Stray[linesel| anD_N*32, pnD_N*16, apD_N*80, ppD_N*32, aM_N*172, pM_N*116, aM2_N*37, pM2_N*26]; ?: Stray[Gnd| aM_N*1212, pM_N*246, anD_N*624, pnD_N*178, apD_N*16, ppD_N*16, aM2_N*2136, pM2_N*550]; nphA: node; ?: Stray[nphA| aP_N*42, pP_N*42, aM_N*163, pM_N*114]; nlinesel: node; ?: Stray[nlinesel| aM2_N*25, pM2_N*20, aP_N*380, pP_N*274, apD_N*107, ppD_N*26, aM_N*98, pM_N*72, anD_N*130, pnD_N*36]; n2: node; ?: Stray[n2| anD_N*190, pnD_N*38]; n3: node; ?: Stray[n3| anD_N*180, pnD_N*36]; n4: node; ?: Stray[n4| anD_N*190, pnD_N*38]; n5: node; ?: Stray[n5| aM2_N*752, pM2_N*384]; n6: node; ?: Stray[n6| anD_N*190, pnD_N*38]; n7: node; ?: Stray[n7| anD_N*190, pnD_N*38]; n8: node; ?: Stray[n8| anD_N*190, pnD_N*38]; input: node; ?: Stray[input| aM_N*1679, pM_N*1120, aP_N*336, pP_N*336]; n9: node; ?: Stray[n9| anD_N*190, pnD_N*38]; phB: node; ?: Stray[phB| aM_N*166, pM_N*116, aP_N*42, pP_N*42]; n10: node; ?: Stray[n10| anD_N*190, pnD_N*38]; Q1: CTran[nlinesel,linesel,Vdd| W_N*16]; Q2: CTran[nlinesel,Vdd,linesel| W_N*16]; Q3: ETran[nlinesel,linesel,Gnd| W_N*6]; Q4: ETran[nlinesel,Gnd,linesel| W_N*6]; Q5: CTran[Vpbias,nlinesel,Vdd| W_N*10]; Q6: CTran[nphA,Vdd,nlinesel| W_N*10]; Q7: ETran[input,n2,n8| W_N*10]; Q8: ETran[input,n3,n4| W_N*10]; Q9: ETran[input,n4,n7| W_N*10]; Q10: ETran[input,n6,nlinesel| W_N*10]; Q11: ETran[input,n7,n6| W_N*10]; Q12: ETran[input,n8,n10| W_N*10]; Q13: ETran[input,n9,n2| W_N*10]; Q14: ETran[phB,Gnd,n9| W_N*10]; Q15: ETran[input,n10,n3| W_N*10]; ?: RectWave[phB | period _ 100ns, width _ 30ns, tRise _ 10ns, tFall _ 10ns, tDelay _ 30ns]; ?: RectWave[nphA | OnLevel _ 0V, OffLevel _ 5V, period _ 100ns, width _ 30ns, tRise _ 10ns, tFall _ 10ns, tDelay _ 0ns]; ?: voltage[Vpbias, Gnd] =5; ?: voltage[input, Gnd] =5; ?: capacitor[linesel, Gnd] = 1.6pF; }; PLOT["CMOS AdrsDecoder 10/2 transistors", :1ns, -1, 6, phB, nphA, nlinesel, linesel]; RUN[tMax _ 60ns]; Ø[]<>AdrsDecoder.thy, Written by Spinifex, June 13, 1985 4:05:12 pm PDT Last Edited by: Sindhu, June 13, 1985 5:36:44 pm PDT -- ALIAS[ n1, n1] -- -- ALIAS[ input, input, $adrs-1$] -- -- ALIAS[ phB, $adrs-2$] -- Êû– "Cedar" style˜J™FJ™4J˜šÏkœ"˜)Icode˜ K˜J˜ JšœÏsœ˜J˜&K˜bK˜EK™K˜ K˜qK˜dK˜AK˜‡K˜,K˜,K˜,K˜-K˜,K˜,K˜,K™$K˜GK˜,K™K˜?K˜.K˜(K˜(K˜'K˜'K˜'K˜%K˜K˜K˜K˜&K˜ K˜!K˜ K˜K˜!K˜K˜[K˜xK˜K˜K˜#K˜K˜K˜JšœžœK˜UJšœ˜K˜——…—¬