Last Edited by: Sindhu, June 29, 1985 0:38:57 am PDT

CIRCUIT[Lambda ← 1, Temp ← 25, N𡤁] = {

Vdd: Node;

! ThymeBasics

! CMOS2.0u25C

powerSupply: voltage[Vdd, Gnd] = 5.0;

?: Stray[Gnd| aP←N*224, pP←N*176, aM←N*371, pM←N*246, apD←N*48, ppD←N*48, anD←N*176, pnD←N*100, aM2←N*2370, pM2←N*998];

auxIn: node; ?: Stray[auxIn| aM←N*37, pM←N*30, aP←N*116, pP←N*110];

output: node; ?: Stray[output| anD←N*116, pnD←N*26, aM2←N*166, pM2←N*90, aM←N*878, pM←N*572, apD←N*316, ppD←N*174];

-- ALIAS[ n1, n1] --

n1: node;

input: node; ?: Stray[input| aP←N*116, pP←N*110, aM←N*37, pM←N*30];

n2: node;

n3: node;

n4: node; ?: Stray[n4| aM←N*359, pM←N*224, anD←N*296, pnD←N*124];

n5: node; ?: Stray[n5| apD←N*44, ppD←N*30, anD←N*20, pnD←N*14, aP←N*330, pP←N*320, aM←N*575, pM←N*392, aM2←N*366, pM2←N*190];

n6: node; ?: Stray[n6| aM←N*468, pM←N*306, apD←N*448, ppD←N*192];

?: Stray[Vdd| aP←N*286, pP←N*238, apD←N*232, ppD←N*76, anD←N*48, pnD←N*48, aM←N*397, pM←N*268, aM2←N*2467, pM2←N*1004];

Q1: CTran[auxIn,output,Vdd| W←N*5];

Q2: CTran[auxIn,Vdd,output| W←N*5];

Q3: ETran[auxIn,output,Gnd| W←N*4];

Q4: ETran[input,n5,Gnd| W←N*4];

Q5: ETran[n5,n4,Gnd| W←N*32];

Q6: ETran[Gnd,output,n4| W←N*16];

Q7: CTran[Vdd,output,n6| W←N*32];

Q8: CTran[n5,n6,Vdd| W←N*32];

Q9: ETran[Gnd,n4,output| W←N*16];

Q10: CTran[Vdd,n6,output| W←N*32];

Q11: CTran[n5,Vdd,n6| W←N*32];

Q12: CTran[input,Vdd,n5| W←N*5];

Q13: CTran[input,n5,Vdd| W←N*5];

?: capacitor[output, Gnd] = 0.1pF;

?: RectWave[input | period ← 100ns, width ← 50ns, tRise ← 10ns, tFall ← 10ns, tDelay ← 10ns];

?: RectWave[auxIn | period ← 30ns, width ← 13ns, tRise ← 1ns, tFall ← 1ns, tDelay ← 10ns];

};

PLOT["TestDrOff; 16/2 transistors; 0.1pf load", :1ns, -1, 6, powerSupply^: -2mA, input, output, auxIn];

RUN[tMax ← 70ns];