Match: node; ?: Stray[Match| anD�, pnD�, aP�, pP�];

-- ALIAS[ n1, n1] --

n1: node; ?: Stray[n1| aM2�, pM2�];

D: node; ?: Stray[D| anD�, pnD�, aP�, pP�];

nD: node; ?: Stray[nD| aP�, pP�, anD�, pnD�];

?: Stray[Gnd| anD�, pnD�, aM�, pM�];

Access: node; ?: Stray[Access| aP�, pP�];

n2: node; ?: Stray[n2| aM2�, pM2�];

$D/nM$: node; ?: Stray[$D/nM$| anD�, pnD�, aM�, pM�];

n3: node; ?: Stray[n3| aP�, pP�, anD�, pnD�];

$nD/M$: node; ?: Stray[$nD/M$| anD�, pnD�, aM�, pM�];

Q1: ETran[nD,Gnd,D| W𡤈];

Q2: ETran[D,$D/nM$,n3];

Q3: ETran[D,nD,Gnd| W𡤈];

Q4: ETran[Access,$nD/M$,nD];

Q5: ETran[n3,Match,Gnd| W𡤆];

Q6: ETran[Access,$D/nM$,D];

Q7: ETran[nD,$nD/M$,n3];

?: capacitor[match, Gnd] = 0.9pF;

?: RectWave[$D/nM$ | period ← 100ns, width ← 50ns, tRise ← 10ns, tFall ← 10ns, tDelay ← 20ns];

};

ic[D ← 5V, match ← 5V];

PLOT["CMOS src (2 microns, 100 C)", :1ns, -1, 6, powerSupply^: -1mA, match, $D/nM$];

RUN[tMax ← 50ns];