SisyphDoc.tioga
Written by: Pradeep Sindhu, November 24, 1985 11:57:14 pm PST
Last Edited by:
	Pradeep Sindhu, January 23, 1986 1:17:49 am PST
SISYPH: A SCHEMATICS EXTRACTOR
SISYPH: A SCHEMATICS EXTRACTOR
SISYPH: A SCHEMATICS EXTRACTOR
DATOOLS  FOR INTERNAL XEROX USE ONLY
DATOOLS  FOR INTERNAL XEROX USE ONLY
DATOOLS  FOR INTERNAL XEROX USE ONLY

Sisyph: A Schematics Extractor
User Manual
Release as	[DATools]<DATools6.0>Sisyph>SisyphDoc.tioga, .press

c  Copyright 1985, 1986 Xerox Corporation.  All rights reserved.

Abstract:  Sisyph is a schematics extractor that produces Core structural descriptions from circuit diagrams drawn using ChipNDale. The program has several interesting features: it encourages users to freely intermix graphical and procedural specifications of structure, permitting more compact and comprehensible descriptions; it allows schematics to be parameterized, thereby deriving all the benefits of better abstraction; it does not have the customary distinction between "built-in" circuit primitives and "user defined" ones, making it easy to modify even the lowest-level elements; and finally, it uses standard ChipNDale as input thereby capitalizing on its facility for hierarchical composition and its familiar user interface. The first three features all derive from a key design decision: namely to treat extraction as a stack-based computational process in which the basic step is the evaluation of expressions embedded within circuits, with the scope rules for expression variables being controlled by the geometric hierarchy.
XEROX			Xerox Corporation
				Palo Alto Research Center
				3333 Coyote Hill Road
				Palo Alto, California 94304



For Internal Xerox Use Only
Contents
	Introduction
	Basic Concepts
	Construction Rules
	Programming Interface
	User Interface
	Running Sisyph
	How it Works
	Limitations
	
Introduction
	Sisyph is a schematics to Core extractor that takes circuit diagrams drawn using ChipNDale and produces structural descriptions expressed in Core. Schematics are drawn using "icons" that represent simpler schematics and wires that connect icons together; both icons and schematics are ordinary ChipNDale cells, while wires are ChipNDale rectangles drawn using the comment layer. There are predefined icons for standard components like transistors and gates, but the user may also define his own icons for frequently used circuits and even replace the predefined ones.  ChipNDale text is used to name things and also to specify parameters for schematics. Sisyph provides a few commands to facilitate the creation of schematics, but standard ChipNDale commands are sufficient for the most part.  Extraction is typically performed via procedures defined in Sisyph's programming interface, although it may also be invoked from the keyboard.
	The design of Sisyph exhibits a number of features that are worth pointing out. Most importantly, users may intermix graphical and procedural specifications of structure.  For example, a piece of user code may invoke Sisyph to get the Core description for a particular cell, and Sisyph, in extracting that cell may call upon user defined procedures to compute the core for one or more subcells. This ability to intermix specifications allows designers to use procedural specification where there is a fair amount of regularity, and to revert to geometric specification when writing code would be messy. A second feature is that designers may define parameterized schematics. For instance the transistor sizes in a NAND gate can be made parameters of the gate icon, and indeed the number of gate inputs themselves can be parameterized. Parameterization is good because it promotes better abstraction. A third feature is that Sisyph makes no distinction between predefined circuit elements like transistors and user definable ones. The main consequence of this is that even the lowest level elements can be changed easilythere are no artificial barriers. Finally, Sisyph uses standard ChipNDale as input so as to capitalize on its facility for hierarchical composition and to avoid the need for users to have to learn yet another user interface.
	This document serves as the user manual for Sisyph and also describes briefly how the program works. It begins with a definition of the basic concepts needed to use Sisyph. The following section provides the construction rules for the various types of objects that comprise a circuit schematic. With these rules in hand the user knows almost all he needs to to start drawing schematics. The remaining piecesthe programming interface, the user interface, and how to run the programoccupy the next three sections. How Sisyph works is taken up in the next to last section, while the last section lists some of the limitations of its limitations.
Basic Concepts
	There are a few basic concepts we need to define before going on to describe how to construct and extract schematics:
	Wire
		A wire is a set of ChipNDale comment rectangles that represents a Core wire (for those unfamiliar with the notion of Core wire, it is a set of named electrical nodes grouped together for logical reasons).  During extraction two rectangles are assumed to be electrically if an edge of one rectangle touches or lies inside the other rectangle.
	Iconic Cell
		An iconic cell is a ChipNDale cell that is a pictorial shorthand for some circuit schematic.  Its purpose is to provide a graphical abstraction mechanism that allows a complicated schematic to be drawn simply. For instance the standard symbol for a NOT gate would be an icon for the schematic consisting of a p-type and an n-type transistor connected to form an inverter.
		An iconic cell has an electrical interface that must be identical to that of the circuit schematic it represents.
	Iconic Wire
		An iconic wire is a ChipNDale cell that represents a Core wire.
	Schematic
		A schematic is a ChipNDale cell that expresses the structure of some electrical circuit in terms of simpler circuits. Typically it is drawn using icons that represent simpler circuits, wires to connect icons together, and pins to provide named connection points; however, schematics may also be used directly in place of icons.
		A schematic also has an electrical interface which is represented by the geometry that touches the ChipNDale cell's interest rect.
Construction Rules
	Schematic
		Any geometry that intersects the interest rect of the CD cell becomes part of the public wire of the core for this schematic.
	Iconic Cell
		An iconic cell may have arbitrary geometry inside it (with one exception), but it must have the same electrical interface as the schematic it represents.  This interface is defined by the set of ChipNDale pins that appear within the icon. Someday this will be changed so that only pins that touch the interest rect are significant. The exception to the arbitrary geometry of course is pins, since pins are significant in the extraction. 
		A given schematic may have more than one iconic cell for it, but an iconic cell may correspond to at most one schematic. 
		
		Icons may have arbitrary geometry inside them aside from pins.  Pins define the places where connections can be made to the icon when it is used (at the moment all pins within the icon are considered rather than just those that intersect the interest rect of the icon).
		For each pin within an icon there must be exactly one wire with the same name in the public of the icon's core.  For each wire in the public of the icon's core (other than the root) there must be a pin with that name within the icon.  The one exception to the second rule is if the wire in question is promotablein this case we do not require a corresponding pin within the icon.
		A wire is promotable if its name is in the list of global wire names and the wire has no geometry corresponding to it.
	Wire
		A wire is a graphical object that represents a set of electrical wires.  This concept is identical to the concept of core wire.
		In the implementation a wire is a CD comment rectangle.
	Wire Icons
		Wire Icons may have arbitrary geometry inside them aside from pins.  Pins define the places where connections can be made to the icon when it is used (at the moment all pins within the icon are considered rather than just those that intersect the interest rect of the icon).
		For each pin within an icon there must be exactly one wire with the same name in the core for the iconic wire.  For each wire in the iconic wire's core there must be a pin with that name within the icon.  The one exception to the second rule is if the wire in question is promotablein this case we do not require a corresponding pin within the icon.
		
	
Programming Interface
User Interface
Running Sisyph
	Bringover [DATools]<DATools6.0>Top>Sisyph.df
	In your profile put the following lines for Chipndale:

	Tioga.ChipNDale.CMosB.TIP: Sisyph.TIP CDSatellites.TIP Default
	ChipNDale.CMosB.Font0: 8 "Xerox/TiogaFonts/Gates32"
	ChipNDale.CMosB.Font1: 8 "Xerox/TiogaFonts/Helvetica8I"
	ChipNDale.CMosB.Font2: 8 "Xerox/TiogaFonts/Helvetica8"
	ChipNDale.CMosB.Font3: 4 "Xerox/TiogaFonts/Gates32"
	ChipNDale.CMosB.Font4: 4 "Xerox/TiogaFonts/Helvetica8I"
	ChipNDale.CMosB.Font5: 4 "Xerox/TiogaFonts/Helvetica8"
	ChipNDale.CMosB.Font6: 2 "Xerox/TiogaFonts/Gates32"
	ChipNDale.CMosB.Font7: 2 "Xerox/TiogaFonts/Helvetica8I"
	ChipNDale.CMosB.Font8: 2 "Xerox/TiogaFonts/Helvetica8"
	ChipNDale.CMosB.Font9: 1 "Xerox/TiogaFonts/Gates32"
	ChipNDale.CMosB.Font10: 1 "Xerox/TiogaFonts/Helvetica8I"
	ChipNDale.CMosB.Font11: 1 "Xerox/TiogaFonts/Helvetica8"
	Type Sisyph to the Commander, create a new CMosB design using CDNewCMosB, and you're in business.
	
	
How it Works
Limitations