DIRECTORY Atom, Cluster, Convert, Core, CoreClasses, CoreOps, CoreFlat, CoreName, Dragon, EU, EUUtils, HandCodingUtil, SymTab, IFUTop, IFUPLAInstrDecode, IFUPLAMainPipeControl, IFUPLAPass, IFUTest, IO, REFBit, Rope, Rosemary, RoseTV, TerminalIO; IFUTestUtils: CEDAR PROGRAM IMPORTS Atom, CoreOps, Cluster, Convert, CoreFlat, CoreName, HandCodingUtil, SymTab, IO, REFBit, Rope, Rosemary, RoseTV, TerminalIO EXPORTS IFUTest = BEGIN UpdateProc: TYPE = IFUTest.UpdateProc; RTVal: TYPE = RoseTV.RTVal; ROPE: TYPE = Rope.ROPE; NextMacro: TYPE = IFUPLAInstrDecode.NextMacro; CondEffect: TYPE = IFUPLAMainPipeControl.CondEffect; CondSelects: TYPE = Dragon.CondSelects; ALULeftSources: TYPE = Dragon.ALULeftSources; ALURightSources: TYPE = Dragon.ALURightSources; Store2ASources: TYPE = Dragon.Store2ASources; ALUOps: TYPE = Dragon.ALUOps; PBusFaults: TYPE = Dragon.PBusFaults; FaultCode: TYPE = IFUPLAPass.PBusFaultCode; AluOpRp: ARRAY ALUOps OF ROPE = ["Or", "And", "VAd2", "BChk", "SAdd", "SSub", "LAdd", "LSub", "Xor", "?9", "FOP", "?11", "VAdd", "VSub", "UAdd", "USub"]; LtSrcRp: ARRAY ALULeftSources OF ROPE = ["a", "r", "c", "?"]; RtSrcRp: ARRAY ALURightSources OF ROPE = ["b", "r", "c", "k", "f", "?", "?", "?"]; StSrcRp: ARRAY Store2ASources OF ROPE = ["b", "r", "c", "?"]; PhRp: ARRAY Dragon.Phase OF ROPE = ["A", "B"]; BoolRp: ARRAY BOOL OF ROPE = [FALSE: "F", TRUE: "T"]; NextMacroRp: ARRAY [0..8) OF ROPE =["Get", "--?", "-?-", "Jmp", "?--", "Hld", "??-", "???"]; CondEffectRp: ARRAY CondEffect OF ROPE = ["macroT", "macroJ", "microJ", "bubble"]; -- %6g CondSelectRp: ARRAY CondSelects OF ROPE = [ -- %3g "--", "EZ", "LZ", "LE", "?4", "NE", "GE", "GZ", "Ovf", "BC", "IL", "?11", "?12", "nBC", "nIL", "MFt"]; OpCodeRpRef: HandCodingUtil.NameArray _ HandCodingUtil.GetInstArray[]; OpCodeRp: PROC[op: [0..256)] RETURNS [ROPE] = {RETURN[OpCodeRpRef[LOOPHOLE[op]]]}; DPFaultRp: ARRAY [0..16) OF ROPE = [ -- %3g "non", "?1","?2","?3","?4","?5","?6","?7", "mem", "io", "pg", "wt", "au", "?13", "?14", "?15"]; CondRope: PROC[rope: ROPE, cond: BOOL] = {IF cond THEN TerminalIO.PutRope[rope] ELSE WriteSpace[rope.Length[]] }; WriteSpace: PROC[size: INT] = {THROUGH [0..size) DO TerminalIO.PutRope[" "] ENDLOOP}; Signal: SIGNAL = CODE; ShowCluster: PUBLIC PROC = { tos: IO.STREAM _ TerminalIO.TOS[]; TerminalIO.PutF["%L\n", IO.char['f]]; TerminalIO.PutRope["TOP\n"]; ShowClusterStates[Cluster.lastKs.stateTop]; TerminalIO.PutRope["FULL\n"]; ShowClusterStates[Cluster.lastKs.stateFull]}; ShowClusterStates: PROC[states: ARRAY [0..Cluster.historySize) OF Cluster.ClusterState] ={}; DisplayType: TYPE = {eu, cjump, fetch, xbus, pipe, stack, instr, test}; DisplayTypeRp: ARRAY DisplayType OF ROPE _ ["EU", "CJump", "Fetch", "Xbus", "Pipe", "Stack", "Instr", "Test"]; ShowAll: PUBLIC PROC = { FOR type: DisplayType IN [eu..cjump] DO ShowTop[type] ENDLOOP; FOR type: DisplayType IN [fetch..test] DO Show[type] ENDLOOP}; ShowLast: PUBLIC PROC = { FOR type: DisplayType IN [eu..cjump] DO ShowStates[top, last, type] ENDLOOP; FOR type: DisplayType IN [fetch..test] DO ShowStates[top, last, type]; ShowStates[full, last, type] ENDLOOP}; ShowTop: PUBLIC PROC[type: DisplayType] = { TerminalIO.PutF["\n%g\n", IO.rope[DisplayTypeRp[type]]]; TerminalIO.PutRope[" TOP\n"]; ShowStates[top, all, type]}; Show: PUBLIC PROC[type: DisplayType] = { TerminalIO.PutF["%g\n", IO.rope[DisplayTypeRp[type]]]; TerminalIO.PutRope[" TOP\n"]; ShowStates[top, all, type]; TerminalIO.PutRope[" FULL\n"]; ShowStates[full, all, type]}; ShowStates: PROC[which: {top, full}, range: {last, all}, type: DisplayType] = { states: ARRAY [0..Cluster.historySize) OF Cluster.ClusterState _ IF which=top THEN Cluster.lastKs.stateTop ELSE Cluster.lastKs.stateFull; end: INT _ IF range=last THEN 1 ELSE Cluster.historySize-1; tos: IO.STREAM _ TerminalIO.TOS[]; tf: ROPE _ IF which=top THEN "T" ELSE "F"; FOR i: INT DECREASING IN [0..end) DO -- state0=state1 ia: IFUTop.IFUState _ NARROW[states[i+1 ].data[ifu]]; ib: IFUTop.IFUState _ NARROW[states[i ].data[ifu]]; ea: EU.EUState _ NARROW[states[i+1 ].data[eu]]; eb: EU.EUState _ NARROW[states[i ].data[eu]]; xbus: IFUTop.RegAddrRec _ LOOPHOLE[ib.XBus]; IF states[i].refPh^=a THEN LOOP; IF states[i+1].refPh^#a THEN LOOP; IF states[i].refPh^#b THEN LOOP; IF states[i].refCy^#states[i+1].refCy^ THEN LOOP; tos.PutF["%g%g %3g ", IO.char[DisplayTypeRp[type].Fetch[]], IO.rope[tf], IO.int[states[i].refCy^] ]; SELECT type FROM test => { tos.PutF["A:%02x ", IO.int[ ia.aPipe [1][a] ] ]; tos.PutF["%02x ", IO.int[ ib.aPipe [1][b] ] ]; tos.PutF["B:%02x ", IO.int[ ia.bPipe [1][a] ] ]; tos.PutF["%02x ", IO.int[ ib.bPipe [1][b] ] ]; tos.PutF["C:%02x ", IO.int[ ia.cPipe [1][a] ] ]; tos.PutF["%02x ", IO.int[ ib.cPipe [1][b] ] ]; tos.PutF["%02x ", IO.int[ ia.cPipe [2][a] ] ]; tos.PutF["%02x ", IO.int[ ib.cPipe [2][b] ] ]; tos.PutF["%02x ", IO.int[ ia.cPipe [3][a] ] ]; tos.PutF["%02x ", IO.int[ ib.cPipe [3][b] ] ]; }; pipe => { CondRope[ "Ld1A ", ia.LoadStage1Ac ]; CondRope[ "Ld1B ", ib.LoadStage1Bc ]; CondRope[ "Ld2A ", ia.LoadStage2Ac ]; CondRope[ "(bub) ", ia.Stage2ABubbleBA ]; CondRope[ "Abrt2B ", ib.Stage2BAbortAB ]; CondRope[ "Ld3A ", ia.LoadStage3Ac ]; CondRope[ "(abrt) ", ia.Stage3AAbortBA ]; }; stack => { tos.PutF["%02x ", IO.int[ ib.TosBA ] ]; tos.PutF["%02x ", IO.int[ ib.BosBA ] ]; }; instr => { CondRope[ "* ", ia.ResetBA ]; tos.PutF["%2x ", IO.int[ ia.StateAB ] ]; CondRope[ "Rdy ", ia.InstReadyAB ]; tos.PutF["%5g ", IO.rope[ OpCodeRp[ ia.OpAB ] ] ]; tos.PutF["%2x ", IO.int[ ia.AlphaAB ] ]; tos.PutF["%2x ", IO.int[ ia.BetaAB ] ]; tos.PutF["%2x ", IO.int[ ia.GammaAB ] ]; tos.PutF["%2x ", IO.int[ ia.DeltaAB ] ]; tos.PutF["%g ", IO.rope[ NextMacroRp[ ib.NextMacroBA.ORD ] ] ]; CondRope[ "Rd0 ", ib.DPCmndIsRd0BA ]; CondRope[ "Rd2 ", ib.DPCmndIsRd2BA ]; CondRope[ "ILck ", ib.Stage1BHoldBA ]; tos.PutF["L:%02x ", IO.int[ ib.LBA ] ]; tos.PutF["S:%02x ", IO.int[ ib.SBA ] ]; }; fetch => { CondRope[ "Ftch ", ia.NewFetchBA ]; tos.PutF["a:%08x ", IO.card[ ia.fetchAddrBA ] ]; CondRope[ "Rjt ", ib.IPRejectBA ]; CondRope[ "Flt ", ib.IPFaultingBA ]; CondRope[ "FA ", ia.FetchingAB ]; -- Fix these CondRope[ "FB ", ib.FetchingBA ]; -- Fix these tos.PutF["%02x ", IO.card[ ib.FetchWtAB ] ]; tos.PutF["%02x ", IO.card[ ib.FetchRdBA ] ]; tos.PutF["%02x ", IO.card[ ib.FetchBytesM1AB ] ]; CondRope[ "IRdy ", ia.InstReadyAB ]; tos.PutF["d:%08x ", IO.card[ ib.IPData ] ]; }; xbus => { tos.PutF["Xa:%08x ", IO.card[ ia.XBus ] ]; tos.PutF["Xb:%08x ", IO.card[ ib.XBus ] ]; tos.PutF["X:%02x ", IO.int[ xbus.aAddr ] ]; tos.PutF["%02x ", IO.int[ xbus.bAddr ] ]; tos.PutF["%02x ", IO.int[ xbus.cAddr ] ]; tos.PutF["l:%g ", IO.rope[ LtSrcRp[ xbus.aluLeftSrc ] ] ]; tos.PutF["r:%g ", IO.rope[ RtSrcRp[ xbus.aluRightSrc ] ] ]; tos.PutF["s:%g ", IO.rope[ StSrcRp[ xbus.storeSrc ] ] ]; CondRope[ "S3C", xbus.st3AisC ]; }; cjump => { tos.PutF["CE2:%6g ", IO.rope[ CondEffectRp[ ia.CondEffect2AB ] ] ]; tos.PutF["CS2:%3g ", IO.rope[ CondSelectRp[ ia.ctlPipe2AB.condSel ] ] ]; CondRope[ "Cond ", ia.EUCondition2BA ]; }; eu => { tos.PutF["%4g ", IO.rope[ AluOpRp[ ib.ctlPipe2AB.aluOp ] ] ]; tos.PutF["2:%3g ", IO.rope[ CondSelectRp[ ib.ctlPipe2AB.condSel ] ] ]; CondRope[ "Cnd ", ib.EUCondition2BA ]; tos.PutF["3:%3g ", IO.rope[ CondSelectRp[ ib.ctlPipe3AB.condSel ] ] ]; CondRope[ "Rd", ib.ctlPipe3AB.rdFromPBus ]; CondRope[ "Wt", ib.ctlPipe3AB.writeToPBus ]; tos.PutF["%08x ", IO.card[ ea.reg[EUUtils.left]]]; tos.PutF["%08x ", IO.card[ ea.reg[EUUtils.right]]]; tos.PutF["%08x ", IO.card[ eb.reg[EUUtils.r2B]]]; CondRope[ "CAB ", ea.carryAB ]; CondRope[ "CBA ", eb.carryBA ]; CondRope[ "Rjt ", ib.DPRejectBA ]; tos.PutF["%3g ", IO.rope[ DPFaultRp[ ib.DPFaultBA.ORD ] ] ]; }; ENDCASE => ERROR; TerminalIO.PutRope["\n"] ENDLOOP}; Strip: PROC[path: ROPE _ NIL] RETURNS[ROPE] = { start: INT; WHILE (start_path.Find["("]) # -1 DO path _ Rope.Cat[path.Substr[0,start], path.Substr[path.Index[0, ")"]]] ENDLOOP; RETURN[path]}; Cell: PROC[a,b: ROPE _ NIL] RETURNS[cell: Core.CellType] = { RETURN[IF a.Length[]=0 THEN Cluster.lastKs.ifuSimulation.cellType ELSE CoreFlat.ResolveFlatCellType [Cluster.lastKs.ifuSimulation.cellType, FlatCellRec[a,b]].cellType]}; State: PROC[a,b: ROPE _ NIL] RETURNS[ref: REF] = { ref _ Rosemary.GetState [Cluster.lastKs.ifuSimulation, NEW[CoreFlat.FlatCellTypeRec _ FlatCellRec[a,b]]]}; FlatCellRec: PROC[a,b: ROPE _ NIL] RETURNS[flatCell: CoreFlat.FlatCellTypeRec] = { flatCell _ CoreFlat.ParseCellTypePath[Cluster.lastKs.ifuSimulation.cellType, Rope.Cat[a,b]]}; cellNamePathDepth: INT _ -1; cellNamePathDepthLimit: INT _ 7; cellNamePath: SymTab.Ref _ SymTab.Create[]; FindAPath: PROC[cellType: Core.CellType, target: IO.ROPE _ NIL] RETURNS[path: IO.ROPE] = { AddLevel: PROC[cell: Core.CellType, here: IO.ROPE _ NIL, d: INT] = { IF d=0 THEN { name: IO.ROPE _ CoreOps.GetCellTypeName[cell]; IF name.Length[]>0 THEN []_SymTab.Store[cellNamePath, name, here]} ELSE IF ISTYPE[cell.data, CoreClasses.RecordCellType] THEN { rec: CoreClasses.RecordCellType _ NARROW[cell.data]; FOR i: INT IN [0..rec.size) DO AddLevel[rec[i].type, IO.PutFR["%g/%g", IO.rope[here], IO.int[i]], d-1] ENDLOOP}}; DO IF SymTab.Fetch[cellNamePath, target].found THEN RETURN[NARROW[SymTab.Fetch[cellNamePath, target].val]]; IF cellNamePathDepth+1 >= cellNamePathDepthLimit THEN RETURN[NIL]; cellNamePathDepth _ cellNamePathDepth+1; AddLevel[cellType, "", cellNamePathDepth] ENDLOOP}; PrintWire: PROC[wire: Core.Wire] = { FinishOld: PROC = {nxtOld.idx _ 0; TerminalIO.PutF["..%g)\n", IO.int[nxtIdx]]}; delayd: BOOL _ FALSE; nxtOld: CoreName.SigRec; nxtIdx: INT _ 0; FOR i: INT IN [0..wire.size) DO name: ROPE _ CoreName.WireNm[wire[i]].n; IF delayd THEN { test: CoreName.SigRec _ CoreName.NameSig[name]; nxtOld.idx _ test.idx; IF nxtOld=test THEN { IF nxtIdx#test.idx THEN TerminalIO.PutF["..%g) [%g", IO.int[nxtIdx], IO.int[test.idx]]; nxtIdx _ test.idx+1; LOOP}; FinishOld[]}; TerminalIO.PutF[" %g", IO.rope[name]]; nxtOld _ CoreName.NameSig[name]; IF nxtOld.idx#-1 THEN {delayd _ TRUE; nxtIdx_nxtOld.idx+1} ELSE {delayd _ FALSE; TerminalIO.PutF["\n"]}; ENDLOOP; IF delayd THEN FinishOld[]}; InitStates: PUBLIC PROC[sim: Rosemary.Simulation, size: CARDINAL] RETURNS[states: IFUTest.StateSeq] = { states _ NEW[IFUTest.StateSeqRec[size]]; FOR i: NAT IN [0..states.size) DO states[i] _ NEW[IFUTop.IFUStateRec]; ENDLOOP}; UpdateStates: PUBLIC PROC[ sim: Rosemary.Simulation, states: IFUTest.StateSeq, pass: INT, qph: IFUTop.QPh ] = { temp: IFUTop.IFUState _ states[states.size-1]; FOR i: NAT DECREASING IN [1..states.size) DO states[i] _ states[i-1] ENDLOOP; states[0] _ temp; UpdateState[sim, states[0], pass, qph]}; inner: ROPE; fetchIndexing, fetchRdDecode, fetchWtDecode, fetchControl, stackDecode, stackControlA, stackControlB, ltDrPadIO, mainPipeControl, interlock, stackIndexing: ROPE; instrReg, fetchAddr, fetchBuf, fetchInst, xaForm, pcForm, pcFormBot, pcFormTop, stack, pcStkIO, stackBuf, statStkIO, lsForm, lsFormTop, lsFormBot, abForm, cpipe: ROPE; cachedXFers: LIST OF RTVal _ NIL; GetXFers: PROC[root: Core.CellType] RETURNS[xfers: LIST OF RTVal] = { IF cachedXFers#NIL THEN RETURN[cachedXFers] ELSE { Path: PROC[target: IO.ROPE] RETURNS[path: IO.ROPE] = { TerminalIO.PutF["Path: %20g = ", IO.rope[target]]; path _ FindAPath[root, target]; TerminalIO.PutF["%g\n", IO.rope[IF path#NIL THEN path ELSE "???"]]}; inner _ Path["IFUInner"]; fetchIndexing _ Path["FetchIndexing"]; fetchRdDecode _ Path["FetchRdDecode"]; fetchWtDecode _ Path["FetchWtDecode"]; fetchControl _ Path["FetchControl"]; stackDecode _ Path["StackDecode"]; stackControlA _ Path["StackControlA"]; stackControlB _ Path["StackControlB"]; ltDrPadIO _ Path["LtDrPadIO"]; mainPipeControl _ Path["MainPipeControl"]; interlock _ Path["Interlock"]; stackIndexing _ Path["StackIndexing"]; instrReg _ Path["InstrReg"]; fetchAddr _ Path["FetchAddr"]; fetchBuf _ Path["FetchBuf"]; fetchInst _ Path["FetchInst"]; xaForm _ Path["XaForm"]; pcForm _ Path["PCForm"]; pcFormTop _ Path["PCFormTop"]; pcFormBot _ Path["PCFormBot"]; stack _ Path["Stack"]; pcStkIO _ Path["PCStkIO"]; stackBuf _ Path["StackBuf"]; statStkIO _ Path["StatStkIO"]; lsForm _ Path["LSForm"]; lsFormTop _ Path["LSFormTop"]; lsFormBot _ Path["LSFormBot"]; abForm _ Path["ABFormMain"]; cpipe _ Path["ControlPipe"]; cachedXFers _ xfers _ LIST[ RoseTV.New[inner, "StateAB", StateAB, FALSE, FBN], RoseTV.New[fetchControl, "InstReadyAB", InstReadyAB, FALSE, FBN], RoseTV.New[inner, "OpAB", OpAB, FALSE, FBN], RoseTV.New[inner, "AlphaAB", AlphaAB, FALSE, FBN], RoseTV.New[inner, "BetaAB", BetaAB, FALSE, FBN], RoseTV.New[xaForm, "GammaAB", GammaAB, FALSE, FBN], RoseTV.New[xaForm, "DeltaAB", DeltaAB, FALSE, FBN], RoseTV.New[inner, "TosBA", TosBA, FALSE, FBN], RoseTV.New[inner, "BosBA", BosBA, FALSE, FBN], RoseTV.New[lsFormBot, "LBA", LBA, FALSE, FBN], RoseTV.New[lsFormBot, "SBA", SBA, FALSE, FBN], RoseTV.New[fetchIndexing, "NextMacroBA", NextMacroBA, FALSE, FBN], RoseTV.New[inner, "DPCmndIsRd0BA", DPCmndIsRd0BA, FALSE, FBN], RoseTV.New[inner, "DPCmndIsRd2BA", DPCmndIsRd2BA, FALSE, FBN], RoseTV.New[inner, "Stage1BHoldBA", Stage1BHoldBA, FALSE, FBN], RoseTV.New[pcFormBot, "LoadStage1Ac", LoadStage1Ac, FALSE, FBN], RoseTV.New[pcFormBot, "LoadStage1Bc", LoadStage1Bc, FALSE, FBN], RoseTV.New[pcFormBot, "LoadStage2Ac", LoadStage2Ac, FALSE, FBN], RoseTV.New[cpipe, "Stage2BAB.Stage2BAbortAB", Stage2BAbortAB, FALSE, FBN], RoseTV.New[pcFormBot, "LoadStage3Ac", LoadStage3Ac, FALSE, FBN], RoseTV.New[cpipe, "Stage3ABA.Stage3AAbortBA", Stage3AAbortBA, FALSE, FBN], RoseTV.New[inner, "CondEffect2BA", CondEffect2BA, FALSE, FBN], RoseTV.New[inner, "NewFetchBA", NewFetchBA, FALSE, FBN], RoseTV.New[fetchAddr, "internal.FetchAddrBA", FetchAddrBA, FALSE, FBN], RoseTV.New[inner, "IPData", IPData, FALSE, FBN], RoseTV.New[inner, "FetchWtAB", FetchWtAB, FALSE, FBN], RoseTV.New[inner, "FetchRdBA", FetchRdBA, FALSE, FBN], RoseTV.New[inner, "FetchBytesM1AB", FetchBytesM1AB, FALSE, FBN], RoseTV.New[inner, "XBus", XBus, FALSE, FBN], RoseTV.New[inner, "DPFaultingBA", DPFaultingBA, FALSE, FBN], RoseTV.New[inner, "DPFaultCodeBA", DPFaultCodeBA, FALSE, FBN], RoseTV.New[inner, "DPRejectBA", DPRejectBA, FALSE, FBN], RoseTV.New[inner, "IPRejectBA", IPRejectBA, FALSE, FBN], RoseTV.New[inner, "IPFaultingBA", IPFaultingBA, FALSE, FBN], RoseTV.New[inner, "FetchingBA", FetchingBA, FALSE, FBN], RoseTV.New[cpipe, "EUAluOp2AB", AluOp2AB, FALSE, FBN], RoseTV.New[abForm, "A1AB", A1AB, FALSE, FBN], RoseTV.New[abForm, "A1BA", A1BA, FALSE, FBN], RoseTV.New[abForm, "B1AB", B1AB, FALSE, FBN], RoseTV.New[abForm, "B1BA", B1BA, FALSE, FBN], RoseTV.New[lsFormBot, "C1AB", C1AB, FALSE, FBN], RoseTV.New[lsFormBot, "C1BA", C1BA, FALSE, FBN], RoseTV.New[lsFormBot, "C2AB", C2AB, FALSE, FBN], RoseTV.New[lsFormBot, "C2BA", C2BA, FALSE, FBN], RoseTV.New[lsFormBot, "C3AB", C3AB, FALSE, FBN], RoseTV.New[lsFormBot, "C3BA", C3BA, FALSE, FBN], RoseTV.New[inner, "ResetBA", ResetBA, FALSE, FBN]]; }}; UpdateState: PUBLIC UpdateProc = { XBus^ _ state.XBus; RoseTV.XFerList[sim, GetXFers[sim.cellType]]; state.cycle _ pass; state.ph _ qph; state.StateAB _ StateAB^; state.InstReadyAB _ InstReadyAB^; state.OpAB _ OpAB^; state.AlphaAB _ AlphaAB^; state.BetaAB _ BetaAB^; state.GammaAB _ GammaAB^; state.DeltaAB _ DeltaAB^; state.TosBA _ TosBA^; state.BosBA _ BosBA^; state.LBA _ LBA^; state.SBA _ SBA^; state.NextMacroBA _ NextMacroBA^; state.DPCmndIsRd0BA _ DPCmndIsRd0BA^; state.DPCmndIsRd2BA _ DPCmndIsRd2BA^; state.Stage1BHoldBA _ Stage1BHoldBA^; state.LoadStage1Ac _ LoadStage1Ac^; state.LoadStage1Bc _ LoadStage1Bc^; state.LoadStage2Ac _ LoadStage2Ac^; state.Stage2BAbortAB _ Stage2BAbortAB^; state.LoadStage3Ac _ LoadStage3Ac^; state.Stage3AAbortBA _ Stage3AAbortBA^; state.CondEffect2BA _ CondEffect2BA^; state.NewFetchBA _ NewFetchBA^; state.fetchAddrBA _ FetchAddrBA^; state.IPData _ IPData^; state.FetchWtAB _ FetchWtAB^; state.FetchRdBA _ FetchRdBA^; state.FetchBytesM1AB _ FetchBytesM1AB^; state.XBus _ XBus^; state.DPFaultBA _ IF DPFaultingBA^ THEN LOOPHOLE[8+DPFaultCodeBA^.ORD, PBusFaults] ELSE none; state.DPRejectBA _ DPRejectBA^; state.IPRejectBA _ IPRejectBA^; state.IPFaultingBA _ IPFaultingBA^; state.FetchingBA _ FetchingBA^; state.ctlPipe2AB.aluOp _ AluOp2AB^; state.aPipe[1][a] _ A1AB^; state.aPipe[1][b] _ A1BA^; state.bPipe[1][a] _ B1AB^; state.bPipe[1][b] _ B1BA^; state.cPipe[1][a] _ C1AB^; state.cPipe[1][b] _ C1BA^; state.cPipe[2][a] _ C2AB^; state.cPipe[2][b] _ C2BA^; state.cPipe[3][a] _ C3AB^; state.cPipe[3][b] _ C3BA^; state.ResetBA _ ResetBA^; IF state.ph = B THEN ShowLast[]}; StateAB: REF Dragon.HexByte _ NEW[Dragon.HexByte]; InstReadyAB: REF RoseTV.Bool _ NEW[RoseTV.Bool]; OpAB: REF Dragon.HexByte _ NEW[Dragon.HexByte]; AlphaAB: REF Dragon.HexByte _ NEW[Dragon.HexByte]; BetaAB: REF Dragon.HexByte _ NEW[Dragon.HexByte]; GammaAB: REF Dragon.HexByte _ NEW[Dragon.HexByte]; DeltaAB: REF Dragon.HexByte _ NEW[Dragon.HexByte]; TosBA: REF [0..32) _ NEW[[0..32)]; BosBA: REF [0..32) _ NEW[[0..32)]; LBA: REF Dragon.HexByte _ NEW[Dragon.HexByte]; SBA: REF Dragon.HexByte _ NEW[Dragon.HexByte]; NextMacroBA: REF NextMacro _ NEW[NextMacro]; DPCmndIsRd0BA: REF RoseTV.Bool _ NEW[RoseTV.Bool]; DPCmndIsRd2BA: REF RoseTV.Bool _ NEW[RoseTV.Bool]; Stage1BHoldBA: REF RoseTV.Bool _ NEW[RoseTV.Bool]; LoadStage1Ac: REF RoseTV.Bool _ NEW[RoseTV.Bool]; LoadStage1Bc: REF RoseTV.Bool _ NEW[RoseTV.Bool]; LoadStage2Ac: REF RoseTV.Bool _ NEW[RoseTV.Bool]; Stage2BAbortAB: REF RoseTV.Bool _ NEW[RoseTV.Bool]; LoadStage3Ac: REF RoseTV.Bool _ NEW[RoseTV.Bool]; Stage3AAbortBA: REF RoseTV.Bool _ NEW[RoseTV.Bool]; CondEffect2BA: REF CondEffect _ NEW[CondEffect]; NewFetchBA: REF RoseTV.Bool _ NEW[RoseTV.Bool]; FetchAddrBA: REF RoseTV.LongCard _ NEW[RoseTV.LongCard]; IPData: REF RoseTV.LongCard _ NEW[RoseTV.LongCard]; FetchWtAB: REF [0..4) _ NEW[[0..4)]; FetchRdBA: REF [0..16) _ NEW[[0..16)]; FetchBytesM1AB: REF [0..32) _ NEW[[0..32)]; XBus: REF RoseTV.LongCard _ NEW[RoseTV.LongCard]; DPFaultingBA: REF RoseTV.Bool _ NEW[RoseTV.Bool]; DPFaultCodeBA: REF FaultCode _ NEW[FaultCode]; DPRejectBA: REF RoseTV.Bool _ NEW[RoseTV.Bool]; IPRejectBA: REF RoseTV.Bool _ NEW[RoseTV.Bool]; IPFaultingBA: REF RoseTV.Bool _ NEW[RoseTV.Bool]; FetchingBA: REF RoseTV.Bool _ NEW[RoseTV.Bool]; AluOp2AB: REF ALUOps _ NEW[ALUOps]; A1AB: REF Dragon.HexByte _ NEW[Dragon.HexByte]; A1BA: REF Dragon.HexByte _ NEW[Dragon.HexByte]; B1AB: REF Dragon.HexByte _ NEW[Dragon.HexByte]; B1BA: REF Dragon.HexByte _ NEW[Dragon.HexByte]; C1AB: REF Dragon.HexByte _ NEW[Dragon.HexByte]; C1BA: REF Dragon.HexByte _ NEW[Dragon.HexByte]; C2AB: REF Dragon.HexByte _ NEW[Dragon.HexByte]; C2BA: REF Dragon.HexByte _ NEW[Dragon.HexByte]; C3AB: REF Dragon.HexByte _ NEW[Dragon.HexByte]; C3BA: REF Dragon.HexByte _ NEW[Dragon.HexByte]; ResetBA: REF RoseTV.Bool _ NEW[RoseTV.Bool]; FBN, FieldBitName: RoseTV.FldBitNmProc = { -- only called for multibit unstructured fields SELECT rtv.wwrSize FROM 1 => RETURN[rtv.field]; 32 => RETURN[IO.PutFR["%g.%g", IO.rope[rtv.field], IO.int[index]] ]; ENDCASE => { bf: REFBit.Format _ REFBit.Desc[rtv.ref].bitForm; sigRec: CoreName.SigRec _ CoreName.NameSig[rtv.field]; name: ROPE _ bf[index].name; IF name.Length[]=0 THEN {name _ bf[index].nameInv; rtv[index].inverted _ NOT rtv[index].inverted}; name _ CoreName.BitRopeToSigRope[name]; sigRec.root _ sigRec.root.Cat[CoreName.RootExt[name].root]; IF CoreName.RootExt[name].ext.Length[]#0 THEN { -- numeric int: INT _ Convert.IntFromRope[CoreName.RootExt[name].ext.Substr[1]]; IF int#index THEN Signal[]; sigRec.idx _ int; fieldBitNm _ CoreName.SigName[sigRec]} ELSE { -- enumerated type fieldBitNm _ Rope.Cat[rtv.field, ".", CoreName.SigName[sigRec]]} } }; ifuUpdateProc: PUBLIC ATOM _ $IFUUpdateProc; Atom.PutProp[ifuUpdateProc, ifuUpdateProc, NEW[UpdateProc _ UpdateState]]; TerminalIO.PutF["%L\n%g\n", IO.char['f], IO.time[]]; END. IFUTestUtils.mesa Copyright c 1986 by Xerox Corporation. All rights reserved. Curry, October 24, 1986 3:09:23 pm PDT Don Curry May 1, 1987 12:46:49 pm PDT Last Edited by: Don Curry May 20, 1987 8:12:45 am PDT _ &v _ ViewerOps.FindViewer["Interp: World:Local"] _ ViewerOps.DestroyViewer[&v] Interpreter _ &v _ ViewerOps.FindViewer["Interp: World:Local"] _ &out _ ViewerIO.CreateViewerStreams["Stuffin", &v].out _ IO.PutRope[&out, "&sgf[IFUTestUtils]"] Debugging Notes RemoveButton SIFU RemoveButton SC2 RemoveButton TSet RemoveButton TSet RemoveButton RB RemoveButton TDay CreateButton cHsty Interpreter; RCompile IFUTestUtils; Run IFUTestUtils; _ &v _ ViewerOps.FindViewer["Interp: World:Local"]; _ &out _ ViewerIO.CreateViewerStreams["Stuffin", &v].out; _ IO.PutRope[&out, "&sgf[IFUTestUtils]"] CreateButton cHsty Interpreter; RCompile IFUTestUtils; Run IFUTestUtils; _ &v _ ViewerOps.FindViewer["Interp: World:Local"]; _ &out _ ViewerIO.CreateViewerStreams["Stuffin", &v].out; _ IO.PutRope[&out, "&sgf[IFUTestUtils]"] CreateButton Hsty _ IFUTestUtils.ShowCluster[] &sgf[IFUTestUtils] NextMacroRp: ARRAY NextMacro OF ROPE = ["Get", "--?", "-?-", "Jmp", "?--", "Hld", "??-", "???"]; IF states[i].refCy^#ia.cycle THEN Signal[]; tos.PutF["%3g ", IO.int[ia.cycle] ]; tos.PutF["%4g ", IO.rope[ AluOpRp[ ib.ctlPipe1AB.aluOp ] ] ]; tos.PutF["%4g ", IO.rope[ AluOpRp[ ib.ctlPipe1BA.aluOp ] ] ]; tos.PutF["%4g ", IO.rope[ AluOpRp[ ib.ctlPipe2AB.aluOp ] ] ]; tos.PutF["%x ", IO.card[ ib.wtAB ] ]; tos.PutF["%x ", IO.card[ ib.rdAB ] ]; FindAPath: PROC[cellType: Core.CellType, target: IO.ROPE _ NIL] RETURNS[path: IO.ROPE] = { CheckDepth: PROC[cell: Core.CellType, here: IO.ROPE _ NIL, d: INT] RETURNS[found: BOOL] = { IF d<1 THEN { name: IO.ROPE _ CoreOps.GetCellTypeName[cell]; IF name.Length[]>0 THEN SymTab.Store[cellNamePath, name, here]; IF name.Equal[target] THEN {path _ here; RETURN[TRUE]} ELSE {path _ NIL; RETURN[FALSE]}; IF ISTYPE[cell.data, CoreClasses.RecordCellType] THEN { rec: CoreClasses.RecordCellType _ NARROW[cell.data]; FOR i: INT IN [0..rec.size) DO IF CheckDepth[rec[i].type, IO.PutFR["%g/%g", IO.rope[here], IO.int[i]], d-1] THEN RETURN[TRUE] ENDLOOP}; RETURN[FALSE]}; FOR depth: INT _ 0, depth+1 DO IF CheckDepth[cellType, "", depth].found THEN RETURN[path] ENDLOOP}; instrDecode, rtDrPadIO, idInDr, idOutDr: ROPE; idBdy0, idBdy1, idBdy2, idBdy3, idBdy4, idBdy5, idBdy6: ROPE; IFUTop.IFUState Init nodes known to have bad values PROC[rtv: RTVal, index: INT] RETURNS[fieldBitNm: ROPE] CapChar: PROC[sm: CHAR] RETURNS[big: CHAR] = {RETURN[IF sm IN ['a..'z] THEN sm + LOOPHOLE['A - 'a] ELSE sm]}; CapNth: PROC[rope: ROPE, n: INT] RETURNS[ROPE] = {RETURN[IO.PutFR["%g%g%g", IO.rope[rope.Substr[0, n]], IO.char[CapChar[rope.Fetch[n]]], IO.rope[rope.Substr[n+1]]] ]}; ΚC˜™Jšœ Οmœ1™JšŸœžœžœžœ˜0JšŸœžœžœžœžœžœžœ˜7šŸ œžœ žœžœ™&Jšœ9™9—JšŸ œžœžœžœ;˜\Jš Ÿ œžœ žœžœ-Οc˜Yš Ÿ œžœ žœžœ ˜2Jšœ1˜1Jšœ6˜6—JšŸ œ;˜FJš Ÿœžœžœžœžœ žœ˜Rš Ÿ œžœ žœžœ ˜+Jšœ_˜_—J˜šŸœžœžœžœ˜)Jšœžœžœžœ˜H—Jš Ÿ œžœžœžœ žœžœ˜VJ˜JšŸœžœžœ˜J˜šŸ œžœžœ˜Jšœžœžœ˜"Jšœžœ ˜%Jšœ˜JšŸœ˜+Jšœ˜JšŸœ˜-—J˜JšŸœžœ žœžœ˜\J˜šœ žœ˜Jšœ6˜6—šœžœ žœ˜*JšœC˜C—J˜šŸœžœžœ˜Jšžœžœžœžœ˜?Jšžœžœžœ žœ˜@—šŸœžœžœ˜šžœžœž˜(JšŸ œžœ˜$—šžœžœž˜*JšŸ œ˜JšŸ œžœ˜&——šŸœžœžœ˜+Jšœ8˜8Jšœ˜Jšœ˜—šŸœžœžœ˜(Jšœ6˜6Jšœ˜Jšœ˜Jšœ˜Jšœ˜—J˜šŸ œžœ?˜Ošœžœžœžœ ˜MJšžœ˜Jšžœ˜—Jš œžœžœ žœžœ˜;Jšœžœžœ˜"Jš œžœžœ žœžœ˜+š žœžœž œžœ žœ ˜5Jšœžœ˜6Jšœžœ˜4Jšœžœ˜0Jšœžœ˜/Jšœžœ ˜,Jšžœžœžœ˜$Jšžœžœžœ˜%Jšžœžœžœ˜$Jšžœ%žœžœ˜1Jšžœžœžœ™-Jšœžœ™$šœ˜Jšžœ$žœžœžœ˜N—šžœž˜šœ ˜ Jšœžœ˜1Jšœžœ˜/Jšœžœ˜1Jšœžœ˜/Jšœžœ˜1Jšœžœ˜/Jšœžœ˜/Jšœžœ˜/Jšœžœ˜/Jšœžœ˜/Jšœ@™@Jšœ@™@Jšœ@™@J˜—˜ Jšœ#Ÿœ˜(Jšœ)˜)Jšœ#Ÿœ˜(Jšœ'Ÿœ˜*Jšœ'Ÿœ˜+Jšœ#Ÿœ˜(Jšœ'Ÿœ˜+J˜—˜ Jšœžœ˜-Jšœžœ˜-J˜—šœ ˜ Jšœ'˜'Jšœžœ˜/Jšœ+˜+Jšœžœ$˜7Jšœžœ˜/Jšœžœ˜/Jšœžœ˜/Jšœžœ˜0Jšœžœ#žœ˜?Jšœ,˜,Jšœ,˜,Jšœ-˜-Jšœžœ˜.Jšœžœ˜.J˜—šœ ˜ Jšœ(˜(Jšœ2˜2Jšœ'˜'Jšœ)˜)Jšœ3˜3Jšœ3˜3Jšœ.˜.Jšœ.˜.Jšœ2˜2Jšœ*™*Jšœ*™*Jšœ)˜)Jšœ-˜-J˜—šœ ˜ Jšœ*˜*Jšœ*˜*Jšœ,˜,Jšœ*˜*Jšœ*˜*Jšœ<˜Jšœ=žœžœ˜IJšœ.žœžœ˜:Jšœ1žœžœ˜=Jšœ1žœžœ˜=Jšœ8žœžœ˜DJšœ+žœžœ˜7Jšœ5žœžœ˜AJšœ7žœžœ˜CJšœ3žœžœ˜?Jšœ3žœžœ˜?Jšœ6žœžœ˜BJšœ3žœžœ˜?Jšœ1žœžœ˜=Jšœ*žœžœ˜6Jšœ*žœžœ˜6Jšœ*žœžœ˜6Jšœ*žœžœ˜6Jšœ-žœžœ˜9Jšœ-žœžœ˜9Jšœ-žœžœ˜9Jšœ-žœžœ˜9Jšœ-žœžœ˜9Jšœ-žœžœ˜9Jšœ/žœžœ˜