DIRECTORY Core, CoreBlock, CoreFrame, CoreGlue, CoreName, IFUCoreCtl, IFUCoreDrive, IFUPLAInstrDecode, IFUSrc, IO, PLAOps, REFBit, Rope, WatchStats; IFUSrcInstrDecode: CEDAR PROGRAM IMPORTS CoreFrame, CoreGlue, CoreName, IFUCoreCtl, IFUCoreDrive, IO, PLAOps, REFBit, Rope, WatchStats EXPORTS IFUSrc = BEGIN ROPE: TYPE = Core.ROPE; root: ROPE = "InstrDecode"; plaRoot: ROPE = Rope.Cat["IFUPLA", root]; PlaDscs: TYPE = ARRAY [0..nofPlas) OF REF PLAD; nofPlas: INT = IFUPLAInstrDecode.InstrDecodeOutCount; -- 1; PLAD: TYPE = IFUCoreCtl.PLADescriptionRec; ExceptionalOutSignals: ARRAY [0..nofPlas) OF ROPE; PhB: ROPE _ CoreName.RopeNm["PhB"]; IDPlaFireV: ROPE _ CoreName.RopeNm["IDPlaFireV"]; IDPlaNotPhA: ROPE _ CoreName.RopeNm["IDPlaNotPhA"]; InstrDecode: PUBLIC PROC [sIn: ROPE, altOut: ROPE _ NIL] RETURNS [cellType: Core.CellType, sOut: ROPE] = { cachedName: ROPE _ CoreName.RopeNm[plaRoot.Cat["Main"]]; { maxOuts: INT _ 0; ins: REF _ REFBit.NEWFromName[plaRoot.Cat[".", root.Cat["In"] ] ]; plaDscs: PlaDscs; drivesOut: Core.CellType _ CoreFrame.NewFrameCell[name: root.Cat["OutDr"], rec: [first: bottom], size: nofPlas]; drivesIn: Core.CellType; FOR index: INT IN [0..nofPlas) DO plaName: ROPE _ IO.PutFR["%g%g", IO.rope[plaRoot], IO.int[index] ]; plaDscs[index] _ NEW[PLAD _ [ name: plaName, plaType: precharged, includeIns: FALSE, plaPhs: [AB, A, ABB, B, BA], capSides: none, fire: PhB, fireV: IDPlaFireV, nPreChg: IDPlaNotPhA ] ]; plaDscs[index].ttt _ PLAOps.ReadPLAFile[plaName.Cat[".ttt"], log]; maxOuts _ MAX[maxOuts, REFBit.Desc[plaDscs[index].ttt.out].bitForm.size]; ENDLOOP; sOut _ sIn; FOR index: INT IN [0..nofPlas) DO plaDscs[index].nofOrCols _ maxOuts; IFUCoreCtl.MakePLA1[plaDscs[index]]; IFUCoreDrive.AdjustDriveOutPh[plaDscs[index].outDrs, ExceptionalOutSignals[index]]; sOut _ IFUCoreDrive.ConnectDrives[plaDscs[index].outDrs, sOut]; CoreFrame.FCT[drivesOut].seq[index] _ IFUCoreCtl.CellProc[outSec, plaDscs[index]]; ENDLOOP; [plaDscs[0].inDrs, sOut] _ IFUCoreDrive.CapDrives[plaDscs[0].inDrs, sOut, altOut]; IFUCoreDrive.AdjustDriveInPhRef[A, plaDscs[0].inDrs, ExceptionalInSignals]; drivesIn _ IFUCoreDrive.DrivesToFrame[root.Cat["InDr"], plaDscs[0].inDrs]; FOR index: INT IN [0..nofPlas) DO IF WatchStats.GetWatchStats[].vmFree < 10000 THEN ERROR; plaDscs[index].inDrs _ plaDscs[0].inDrs; -- share input name changes IFUCoreCtl.MakePLA2[plaDscs[index]] ENDLOOP; CheckConsistancyOfInstrDecodePLAs[plaDscs]; cellType _ CoreFrame.NewFrameCells[name: cachedName, rec: [first: top], cells: LIST[ CoreFrame.NewFrameCells[name: root.Cat["InSBDr"], rec: [first: left], cells: LIST[ CoreGlue.CellProc[name: root.Cat["InSB"], b: conn, r: conn], drivesIn ]], drivesOut ]]; [ ] _ CoreName.CellNm[cellType, cachedName]; IFUCoreDrive.SetDShiftIO[cellType, sIn, sOut]; }; [sIn, sOut] _ IFUCoreDrive.GetDShiftIO[cellType]; cellType _ CoreFrame.NewFrameCells[name: root, rec: [first: left], cells: LIST[ CoreGlue.CellProc[l: ext, r: conn], cellType ]]}; CheckConsistancyOfInstrDecodePLAs: PROC[plaDscs: PlaDscs] = { DeCONS: PROC[rope: ROPE, list: LIST OF ROPE] RETURNS[LIST OF ROPE] = { IF Rope.Equal[rope, list.first] THEN RETURN[list.rest]; FOR temp: LIST OF ROPE _ list, temp.rest WHILE temp.rest#NIL DO IF NOT Rope.Equal[rope, temp.rest.first] THEN LOOP; temp.rest _ temp.rest.rest; EXIT REPEAT FINISHED => log.PutF ["\n ERROR: %g not driven by any of the Instruction Decode PLA's", IO.rope[rope]] ENDLOOP; RETURN[list]}; format: REFBit.Format; outlist: LIST OF ROPE; FOR index: INT IN [0..nofPlas) DO format _ REFBit.Desc[plaDscs[index].ttt.out].bitForm; FOR bit: INT IN [0..format.size) DO IF format[bit].name # NIL THEN outlist _ CONS[format[bit].name, outlist]; IF format[bit].nameInv # NIL THEN outlist _ CONS[format[bit].nameInv, outlist]; ENDLOOP; ENDLOOP; format _ REFBit.Desc[plaRoot.Cat[".", root, "Out"]].bitForm; FOR bit: INT IN [0..format.size) DO IF format[bit].name # NIL THEN outlist _ DeCONS[CoreName.BitRopeToSigRope[format[bit].name], outlist]; IF format[bit].nameInv # NIL THEN outlist _ DeCONS[CoreName.BitRopeToSigRope[format[bit].nameInv], outlist]; ENDLOOP; IF outlist#NIL THEN Signal[]}; -- main pla did not define these outputs Signal: SIGNAL = CODE; log: IO.STREAM _ CoreFrame.GetLog[]; ExceptionalInSignals: ROPE _ " UserMode0AB _ FlagAB.6 "; ExceptionalOutSignals[6] _ " PcBusSrcOffSetPCBA NotPcBusSrcOffSetPCBA PcBusSrcPipe3BA NotPcBusSrcPipe3BA PcBusSrcStackBA NotPcBusSrcStackBA PcBusSrcXopGenBA NotPcBusSrcXopGenBA PcBusSrcTrapGenBA NotPcBusSrcTrapGenBA PcBusSrcAlpBetGamDelBA NotPcBusSrcAlpBetGamDelBA PcBusSrcXBA NotPcBusSrcXBA PcBusSrcPcBA NotPcBusSrcPcBA X2ALitSourceNone0BA NotX2ALitSourceNone0BA "; ExceptionalOutSignals[5] _ NIL; ExceptionalOutSignals[4] _ NIL; ExceptionalOutSignals[3] _ " NotCRegOffBA.0 NotPushScBA "; -- CRegOffBA.0 and PushScBA not used ExceptionalOutSignals[2] _ NIL; ExceptionalOutSignals[1] _ NIL; ExceptionalOutSignals[0] _ " AluOpIsOp47BA NotAluOpIsOp47BA CondSelIsOp57BA NotCondSelIsOp57BA X1ASrcStackLAc NotX1ASrcStackLAc X1ASrcStackPAc NotX1ASrcStackPAc X1ASrcSLimitAc NotX1ASrcSLimitAc X1ADstSLimitAc X1ADstStackBA NotX1ADstStackBA "; END. †IFUSrcInstrDecode.mesa Copyright c 1986 by Xerox Corporation. All rights reserved. Last Edited by Curry, October 21, 1986 10:11:23 pm PDT Last Edited by: Louis Monier February 10, 1987 7:45:41 pm PST IF (cellType _ CoreFrame.ReadFrameCache[cachedName])=NIL THEN { IF WatchStats.GetWatchStats[].vmFree < 10000 THEN SIGNAL IFUSrc.Rollback[NIL]; CoreFrame.WriteFrameCache[cellType]}; ΚJ˜šœ™Icodešœ Οmœ1™