IFUBitSlice2.rose
Copyright © 1984 by Xerox Corporation. All rights reserved.
Last edited by: McCreight, September 11, 1984 3:49:30 pm PDT
Last edited by: Curry, September 28, 1984 10:14:09 am PDT
Library IFUBitSlice1;
Directory DragOpsCross, DragonMicrocode;
Imports Dragon, BitOps, DragonIFU;
IPCStack: CELL [
XBus     = INT[32], -- bit slice
PCPipeToStackBA < INT[32],
SelPipeToStackBA < BOOL, -- control slice
IPCStkWrtClkA   < INT[16],
IPCStkRdClkB   < INT[16],
PhA    < BOOL,
PhB    < BOOL
]
State
pcStack: ARRAY [0..16) OF Dragon.HexWord
EvalSimple
pcIn: Dragon.HexWord ← Dragon.LongFromDouble[
IF
SelPipeToStackBA THEN PCPipeToStackBA ELSE XBus]; -- static logic
IF IPCStkWrtClkA # 0 THEN -- accelerator
BEGIN
m: CARDINAL ← 1;
FOR j: CARDINAL IN [0..16) DO
m ← m+m;
IF BitOps.WAND[IPCStkWrtClkA, m] # 0 THEN pcStack[j] ← pcIn;
ENDLOOP;
END;
IF IPCStkRdClkB # 0 THEN -- accelerator
BEGIN
m: CARDINAL ← 1;
FOR j: CARDINAL IN [0..16) DO
m ← m+m;
IF BitOps.WAND[IPCStkRdClkB, m] # 0 THEN XBus ← Dragon.LongToDouble[pcStack[j]];
ENDLOOP;
END;
ENDCELL;
ILStack: CELL [
XBus     = INT[32], -- bit slice
LPipeToStackBA  < INT[8],
SelPipeToStackBA < BOOL, -- control slice
ILStkWrtClkA  < INT[16],
ILStkRdClkB   < INT[16],
PhA    < BOOL,
PhB    < BOOL
]
State
lStack: ARRAY [0..16) OF Dragon.HexByte
EvalSimple
lIn: Dragon.HexByte ← IF SelPipeToStackBA THEN LPipeToStackBA ELSE
BitOps.ECFD[XBus, 32, 24, 8]; -- static logic
IF ILStkWrtClkA # 0 THEN -- accelerator
BEGIN
m: CARDINAL ← 1;
FOR j: CARDINAL IN [0..16) DO
m ← m+m;
IF BitOps.WAND[ILStkWrtClkA, m] # 0 THEN lStack[j] ← lIn;
ENDLOOP;
END;
IF ILStkRdClkB # 0 THEN -- accelerator
BEGIN
m: CARDINAL ← 1;
FOR j: CARDINAL IN [0..16) DO
m ← m+m;
IF BitOps.WAND[ILStkRdClkB, m] # 0 THEN
XBus ← BitOps.ILID[lStack[j], XBus, 32, 24, 8];
ENDLOOP;
END;
ENDCELL;
IBLFormation: CELL [
XBus    < INT[32], -- bit slice
OpBA    < INT[8],
AlphaBA   < INT[8],
BetaBA   < INT[8],
SAB    < INT[8],
SBA    < INT[8],
BRegBA   > INT[8],
LAB    > INT[8],
LBA    > INT[8],
BSum0B   < EnumType["DragonMicrocode.RegSum0"], -- control slice
BSum1B   < EnumType["DragonMicrocode.RegSum1"],
LSum0BA  < EnumType["DragonMicrocode.RegSum0"],
LSum1BA  < EnumType["DragonMicrocode.RegSum1"],
PhA    < BOOL,
PhB    < BOOL
]
EvalSimple
addBus0, sum: Dragon.HexByte;
addBus1: [-4..256);
IF PhB THEN
BEGIN
LBALAB;
addBus0 ← SELECT BSum0B FROM
s  => SAB,
l  => LAB,
cBase => DragonIFU.PRtoByte[euConstant],
aBase => DragonIFU.PRtoByte[euAux],
iRef => DragonIFU.PRtoByte[ifuXBus]+4,
zero => 0,
ENDCASE => ERROR;
addBus1 ← SELECT BSum1B FROM
op47  => OpBA MOD 16,
alpha  => AlphaBA,
alpha03 => AlphaBA/16,
alpha47 => AlphaBA MOD 16,
beta  => BetaBA,
beta03  => BetaBA/16,
beta47  => BetaBA MOD 16,
minus4 => -4,
minus3 => -3,
minus2 => -2,
minus1 => -1,
zero  => 0,
one  => 1,
two  => 2,
three  => 3,
ENDCASE => ERROR;
END;
IF PhA THEN
BEGIN
addBus0 ← SELECT LSum0BA FROM
l   => LBA,
s   => SBA,
xBus  => BitOps.ECFD[XBus, 32, 16, 8],
zero  => 0,
ENDCASE => ERROR;
addBus1 ← SELECT LSum1BA FROM
alpha  => AlphaBA,
zero  => 0,
ENDCASE => ERROR;
END;
sum ← (addBus0+addBus1+256) MOD 256;
IF PhB THEN
BRegBA ← SELECT BSum0B FROM
s, l => sum MOD 128,
ENDCASE => sum;
IF PhA THEN LAB ← sum MOD 128;
ENDCELL;
ICFormation: CELL [
XBus    < INT[32], -- bit slice
OpBA    < INT[8],
AlphaBA   < INT[8],
BetaBA   < INT[8],
LAB    < INT[8],
SAB    < INT[8],
ARegBA   < INT[8],
BRegBA   < INT[8],
EUCRegAB  > INT[8],
EUCRegBA  > INT[8],
CSum0B   < EnumType["DragonMicrocode.RegSum0"], -- control slice
CSum1B   < EnumType["DragonMicrocode.RegSum1"],
KillPipeAB  < BOOL,
ARegMatchesC1A > BOOL,
ARegMatchesC2A > BOOL,
BRegMatchesC1A > BOOL,
BRegMatchesC2A > BOOL,
KBusEUToIFUBA > BOOL, -- on following A phase
PhA    < BOOL,
PhB    < BOOL
]
State
cPipe: ARRAY [0..2] OF ARRAY Dragon.Phase OF Dragon.HexByte
EvalSimple
noStore: Dragon.HexByte = DragonIFU.PRtoByte[euJunk];
addBus0, sum: Dragon.HexByte;
addBus1: [-4..256);
IF PhB THEN
BEGIN
addBus0 ← SELECT CSum0B FROM
s  => SAB,
l  => LAB,
cBase => DragonIFU.PRtoByte[euConstant],
aBase => DragonIFU.PRtoByte[euAux],
iRef => DragonIFU.PRtoByte[ifuXBus]+4,
zero => 0,
ENDCASE => ERROR;
addBus1 ← SELECT CSum1B FROM
op47  => OpBA MOD 16,
alpha  => AlphaBA,
alpha03 => AlphaBA/16,
alpha47 => AlphaBA MOD 16,
beta  => BetaBA,
beta03  => BetaBA/16,
beta47  => BetaBA MOD 16,
minus4 => -4,
minus3 => -3,
minus2 => -2,
minus1 => -1,
zero  => 0,
one  => 1,
two  => 2,
three  => 3,
ENDCASE => ERROR;
sum ← (addBus0+addBus1+256) MOD 256;
cPipe[0][b] ← SELECT CSum0B FROM
s, l => sum MOD 128,
ENDCASE => sum;
cPipe[1][b] ← IF KillPipeAB THEN noStore ELSE cPipe[1][a];
cPipe[2][b] ← IF KillPipeAB THEN noStore ELSE cPipe[2][a];
EUCRegBA ← IF KillPipeAB THEN noStore ELSE EUCRegAB;
KBusEUToIFUBA ← DragonIFU.BytetoPR[cPipe[2][b]] IN DragOpsCross.IFURegs;
END;
IF PhA THEN
BEGIN
cPipe[1][a] ← cPipe[0][b];
cPipe[2][a] ← cPipe[1][b];
EUCRegAB ← cPipe[2][b];
END;
ARegMatchesC1A ← (ARegBA = cPipe[1][b]); -- static logic
ARegMatchesC2A ← (ARegBA = cPipe[2][b]);
BRegMatchesC1A ← (BRegBA = cPipe[1][b]);
BRegMatchesC2A ← (BRegBA = cPipe[2][b]);
ENDCELL
IASFormation: CELL [
XBus    < INT[32], -- bit slice
OpBA    < INT[8],
AlphaBA   < INT[8],
BetaBA   < INT[8],
LAB    < INT[8],
LBA    < INT[8],
ARegBA   > INT[8],
SAB    > INT[8],
SBA    > INT[8],
PopABA   < BOOL, -- control slice
PopBBA   < BOOL,
PushCBA   < BOOL,
ASum0B   < EnumType["DragonMicrocode.RegSum0"],
ASum1B   < EnumType["DragonMicrocode.RegSum1"],
SSum0BA   < EnumType["DragonMicrocode.RegSum0"],
SSum1BA   < EnumType["DragonMicrocode.RegSum1"],
PhA    < BOOL,
PhB    < BOOL
]
EvalSimple
addBus0, sum: Dragon.HexByte;
addBus1: [-4..256);
IF PhB THEN
BEGIN
SBASAB;
addBus0 ← SELECT ASum0B FROM
s  => SAB,
l  => LAB,
cBase => DragonIFU.PRtoByte[euConstant],
aBase => DragonIFU.PRtoByte[euAux],
iRef => DragonIFU.PRtoByte[ifuXBus]+4,
zero => 0,
ENDCASE => ERROR;
addBus1 ← SELECT ASum1B FROM
op47  => OpBA MOD 16,
alpha  => AlphaBA,
alpha03 => AlphaBA/16,
alpha47 => AlphaBA MOD 16,
beta  => BetaBA,
beta03  => BetaBA/16,
beta47  => BetaBA MOD 16,
minus4 => -4,
minus3 => -3,
minus2 => -2,
minus1 => -1,
zero  => 0,
one  => 1,
two  => 2,
three  => 3,
ENDCASE => ERROR;
END;
IF PhA THEN
BEGIN
addBus0 ← SELECT SSum0BA FROM
s   => SBA,
l   => LBA,
xBus  => BitOps.ECFD[XBus, 32, 24, 8],
zero  => 0,
ENDCASE => ERROR;
addBus1 ← SELECT SSum1BA FROM
alpha  => AlphaBA,
deltaS  =>
(IF PopABA THEN -1 ELSE 0)+
(IF PopBBA THEN -1 ELSE 0)+
(IF PushCBA THEN 1 ELSE 0),
zero  => 0,
one  => 1,
ENDCASE => ERROR;
END;
sum ← (addBus0+addBus1+256) MOD 256;
IF PhB THEN
ARegBA ← SELECT ASum0B FROM
s, l => sum MOD 128,
ENDCASE => sum;
IF PhA THEN SAB ← sum MOD 128;
ENDCELL;
ISLimitTest: CELL [
XBus    < INT[32], -- bit slice
EUCRegBA  < INT[8],
BRegBA   < INT[8],
SAB    < INT[8],
EUStkOvflBA > BOOL, -- control slice
PhA    < BOOL,
PhB    < BOOL
]
State
sLimit: ARRAY Dragon.Phase OF Dragon.HexByte
EvalSimple
IF PhB THEN
BEGIN
sLimit[b] ← sLimit[a];
EUStkOvflBA ← ((SAB+(255-sLimit[a] -- NOT sLimit[a] -- )) MOD 128) IN [0..15);
END;
IF PhA THEN
BEGIN
sLimit[a] ← IF EUCRegBA = DragonIFU.PRtoByte[ifuSLimit]
THEN BitOps.ECFD[XBus, 32, 24, 8] ELSE sLimit[b];
IF BRegBA = DragonIFU.PRtoByte[ifuSLimit] THEN
BEGIN
XBus ← BitOps.ICID[0, XBus, 32, 0, 24];
XBus ← BitOps.ICID[sLimit[b], XBus, 32, 24, 8];
END;
END;
ENDCELL;
IFUBitSlice: CELL [
XBus    = INT[32], -- bit slice
IPDataB    < INT[32],
IPAddrBA  > INT[32],
IPDataParityOddB > BOOL, -- control slice
NoJumpClkB   < BOOL,
JumpToXAClkB  < BOOL,
JumpToXBClkB  < BOOL,
JumpToTrapClkB < BOOL,
JumpToSumClkB  < BOOL,
AddBetaAlphaClkB < BOOL,
AddAlphaClkB  < BOOL,
AddXAClkB   < BOOL,
PipeSumBA   < BOOL,
PipeSuccessorBA  < BOOL,
PipeNormalBA  < BOOL,
IncrPrefetchPCBA < BOOL,
IncrPCBA   < BOOL,
NoIncrPCBA   < BOOL,
CJumpOtherWayAB < BOOL,
IBufWrtWdClkB < INT[4],
IBufRdByteClkA < INT[16],
BufHasAtLeast1A < BOOL,
BufHasAtLeast2A < BOOL,
BufHasAtLeast3A < BOOL,
BufHasAtLeast5A < BOOL,
InstReadyAB   > BOOL,
OpLengthAB   > INT[3],
XLitByte3PhAorB  < BOOL,
XZeroByte2PhA  < BOOL,
XLitByte2PhAorB < BOOL,
XZeroByte01PhA  < BOOL,
XLitByte01PhAorB < BOOL,
EUStkOvflBA > BOOL,
CSum0B    < EnumType["DragonMicrocode.RegSum0"],
CSum1B    < EnumType["DragonMicrocode.RegSum1"],
KillPipeAB   < BOOL,
ARegMatchesC1A > BOOL,
ARegMatchesC2A > BOOL,
BRegMatchesC1A > BOOL,
BRegMatchesC2A > BOOL,
KBusEUToIFUBA > BOOL,
PopABA   < BOOL,
PopBBA   < BOOL,
PushCBA   < BOOL,
ASum0B   < EnumType["DragonMicrocode.RegSum0"],
ASum1B   < EnumType["DragonMicrocode.RegSum1"],
SSum0BA   < EnumType["DragonMicrocode.RegSum0"],
SSum1BA   < EnumType["DragonMicrocode.RegSum1"],
BSum0B   < EnumType["DragonMicrocode.RegSum0"],
BSum1B   < EnumType["DragonMicrocode.RegSum1"],
LSum0BA  < EnumType["DragonMicrocode.RegSum0"],
LSum1BA  < EnumType["DragonMicrocode.RegSum1"],
SelPipeToStackBA < BOOL,
IPCStkWrtClkA  < INT[16],
IPCStkRdClkB  < INT[16],
ILStkWrtClkA  < INT[16],
ILStkRdClkB   < INT[16],
PhA    < BOOL,
PhB    < BOOL
]
Expand
NotIPDataB: INT[32]; -- bit slice
PreOpA: INT[8];
PreAlphaA: INT[8];
PreBetaA: INT[8];
PreGammaA: INT[8];
PreDeltaA: INT[8];
OpAB: INT[8];
AlphaAB: INT[8];
BetaAB: INT[8];
GammaAB: INT[8];
DeltaAB: INT[8];
OpBA : INT[8];
AlphaBA: INT[8];
BetaBA: INT[8];
LAB: INT[8];
LBA: INT[8];
SAB: INT[8];
SBA: INT[8];
ARegBA: INT[8];
BRegBA: INT[8];
EUCRegAB: INT[8];
EUCRegBA: INT[8];
PCPipeToStackBA: INT[32];
LPipeToStackBA: INT[8];
The bit slice is arranged top to bottom so that there are fewer than 25 bit slice lines per cell (4 for XBus, 4 for PCPipeToStackBA, and one each for OpAB..LPipeToStackBA), and the data section is 8 bit slices wide. This means a total of 200 bit slice lines, or 1.4 mm of width just for the bit slice lines.
ipDataParity: IPDataParity[];
pcHandler: IPCHandler[];
prefetchBuffer: IPrefetchBuffer[];
iReg: IReg[];
iPCStack: IPCStack[];
sLimitTest: ISLimitTest[];
cFormation: ICFormation[];
asFormation: IASFormation[];
blFormation: IBLFormation[];
iLStack: ILStack[]
ENDCELL