DIRECTORY Core, CoreCreate, CoreOps, IFU1Public, Ports, REFBit, Rosemary; IFU1PublicImpl: CEDAR PROGRAM IMPORTS CoreCreate, CoreOps, Ports, REFBit, Rosemary EXPORTS IFU1Public = BEGIN PortWire: PUBLIC PROC [name: Core.ROPE, size: NAT_0, dr: Ports.Drive_none, pwrVal: Ports.Level _ L] RETURNS[wire: Core.Wire] = { wire _ CoreCreate.Seq[name, (IF size=1 THEN 0 ELSE size)]; [] _ Ports.InitPort[ wire: wire, levelType: (SELECT size FROM 0,1=>b, <=16=>c, <=32=>lc, ENDCASE=>ERROR), initDrive: dr ]; [] _ Ports.InitTesterDrive[ wire: wire, initDrive: (SELECT dr FROM none=>force, force, expect => none, ENDCASE=>expect)]; IF dr=infinite THEN [] _ Rosemary.SetFixedWire[wire, pwrVal]}; IfuInitializedPublic: PUBLIC PROC RETURNS[public: Core.Wire] = { II: TYPE = IFU1Public.II; ii: II _ LAST[II]; public _ CoreOps.CreateWires[ii.ORD+1]; public[II[KBus ].ORD] _ PortWire["KBus", 32, drive ]; public[II[EUAluOp2AB ].ORD] _ PortWire["EUAluOp2AB", 4, drive ]; public[II[EUCondSel2AB ].ORD] _ PortWire["EUCondSel2AB", 4, drive ]; public[II[EUCondition2B ].ORD] _ PortWire["EUCondition2B"]; public[II[EURdFromPBus3AB ].ORD] _ PortWire["EURdFromPBus3AB", 1, drive ]; public[II[EUWriteToPBus3AB ].ORD] _ PortWire["EUWriteToPBus3AB", 1, drive ]; public[II[UserMode2BA ].ORD] _ PortWire["UserMode2BA", 1, drive ]; public[II[DPCmdA ].ORD] _ PortWire["DPCmdA", 8, drive ]; public[II[DPRejectB ].ORD] _ PortWire["DPRejectB"]; public[II[DPFaultB ].ORD] _ PortWire["DPFaultB", 4]; public[II[IPData ].ORD] _ PortWire["IPData", 32]; public[II[IPCmdFetchA ].ORD] _ PortWire["IPCmdFetchA", 1, drive ]; public[II[IPRejectB ].ORD] _ PortWire["IPRejectB"]; public[II[IPFaultingB ].ORD] _ PortWire["IPFaultingB"]; public[II[DShA ].ORD] _ PortWire["DShA"]; public[II[DShB ].ORD] _ PortWire["DShB"]; public[II[DShRd ].ORD] _ PortWire["DShRd"]; public[II[DShWt ].ORD] _ PortWire["DShWt"]; public[II[DShIn ].ORD] _ PortWire["DShIn"]; public[II[DShOut ].ORD] _ PortWire["DShOut", 1, drive ]; public[II[ResetAB ].ORD] _ PortWire["ResetAB"]; public[II[RescheduleAB ].ORD] _ PortWire["RescheduleAB"]; public[II[PhA ].ORD] _ PortWire["PhA"]; public[II[PhB ].ORD] _ PortWire["PhB"]; public[II[NotPhA ].ORD] _ PortWire["NotPhA"]; public[II[NotPhB ].ORD] _ PortWire["NotPhB"]; public[II[IDPlaNotPhA ].ORD] _ PortWire["IDPlaNotPhA"]; public[II[Vdd ].ORD] _ PortWire["Vdd", 1, infinite, H]; public[II[Gnd ].ORD] _ PortWire["Gnd", 1, infinite, L]; public[II[PadVdd ].ORD] _ PortWire["PadVdd", 1, infinite, H]; public[II[PadGnd ].ORD] _ PortWire["PadGnd", 1, infinite, L]}; scanDrInv: PUBLIC IFU1Public.ScanRef _ ScanDrInv[]; ScanDrInv: PUBLIC PROC[scan: IFU1Public.ScanRef _ NIL] RETURNS[IFU1Public.ScanRef] = { logicalBit: CARDINAL _ 0; format: REFBit.Format; IF scan=NIL THEN scan _ NEW[IFU1Public.ScanRec]; format _ REFBit.Desc[scan].fieldForm; FOR fldFrmIdx: CARDINAL IN [0..format.size) DO -- detects Decoded Enumerated Type LSBs field: REFBit.FormatRec _ format[fldFrmIdx]; logicalBit _ logicalBit + field.bitSize; IF field.bitSize>1 AND field.name=NIL AND field.nameInv#NIL THEN REFBit.Set[scan, logicalBit-1, NOT REFBit.Get[scan, logicalBit-1]] ENDLOOP; scan.MPOut.notBcLoadStage1 _ NOT scan.MPOut.notBcLoadStage1; scan.FCOut.notInstReady _ NOT scan.FCOut.notInstReady; RETURN[scan]}; SetScanBit: PUBLIC PROC[scan: IFU1Public.ScanRef, bit: NAT, val: BOOL] = { inv: BOOL _ REFBit.Get[scanDrInv, bit]; REFBit.Set[scan, bit, val#inv]}; GetScanBit: PUBLIC PROC[scan: IFU1Public.ScanRef, bit: NAT] RETURNS[ val: BOOL] = { inv: BOOL _ REFBit.Get[scanDrInv, bit]; val _ inv#REFBit.Get[scan, bit]}; END. ‚IFU1PublicImpl.mesa Copyright c 1986 by Xerox Corporation. All rights reserved. Don Curry January 29, 1987 1:57:00 pm PST Êz˜™Jšœ Ïmœ1™J˜——š œžœžœžœ˜@Jšžœžœžœ˜Jšœžœžœžœ˜Jšœ žœ˜'Jšœžœ žœ&˜>Jšœžœžœ(˜DJšœžœžœ*˜GJšœžœžœ˜