IFU1Public.mesa
Copyright © 1986 by Xerox Corporation. All rights reserved.
Don Curry April 2, 1987 5:26:00 pm PST
DIRECTORY Core, Ports, Rope, IFU1PLAInstrDecode, IFU1PLAFetchControl, IFU1PLAPass, IFU1PLAStackControl, IFU1PLAMainPipeControl, IFU1PLAInterlock;
IFU1Public: CEDAR DEFINITIONS
= BEGIN
CurrentIFU1Version: NAT[0..256) = 1;
II: TYPE = {
KBus,
EUAluOp2AB, EUCondSel2AB, EUCondition2B, EURdFromPBus3AB, EUWriteToPBus3AB,
UserMode2BA,
DPCmdA, DPRejectB, DPFaultB,
IPData, IPCmdFetchA, IPRejectB, IPFaultingB,
DShA, DShB, DShRd, DShWt, DShIn, DShOut,
ResetAB, RescheduleAB, PhA, PhB, NotPhA, NotPhB, IDPlaNotPhA,
Vdd, Gnd, PadVdd, PadGnd};
ScanRef:   TYPE = REF ScanRec;
ScanRec:   TYPE = MACHINE DEPENDENT RECORD[
ILIn:  IFU1PLAInterlock.InterlockIn,
ILOut: IFU1PLAInterlock.InterlockOut,
MPIn: IFU1PLAMainPipeControl.MainPipeControlIn,
MPOut: IFU1PLAMainPipeControl.MainPipeControlOut,
SBIn:  IFU1PLAStackControl.StackBControlIn,
SBOut: IFU1PLAStackControl.StackBControlOut,
SAIn:  IFU1PLAStackControl.StackAControlIn,
SAOut: IFU1PLAStackControl.StackAControlOut,
SDIn:  IFU1PLAStackControl.StackDecodeIn,
SROut: IFU1PLAStackControl.StackDecodeRdOut,
SLOut: IFU1PLAStackControl.StackDecodeWtLOut,
SPOut: IFU1PLAStackControl.StackDecodeWtPOut,
LtIO:  IFU1PLAPass.LtDrPadIO,
FCIn:  IFU1PLAFetchControl.FetchControlIn,
FCOut: IFU1PLAFetchControl.FetchControlOut,
FWIn: IFU1PLAFetchControl.FetchWtDecodeIn,
FWOut: IFU1PLAFetchControl.FetchWtDecodeOut,
FRIn:  IFU1PLAFetchControl.FetchRdDecodeIn,
FROut: IFU1PLAFetchControl.FetchRdDecodeOut,
RtIO:  IFU1PLAPass.RtDrPadIO,
IDOut0: IFU1PLAInstrDecode.InstrDecodeOut0,
IDOut1: IFU1PLAInstrDecode.InstrDecodeOut1,
IDOut2: IFU1PLAInstrDecode.InstrDecodeOut2,
IDOut3: IFU1PLAInstrDecode.InstrDecodeOut3,
IDOut4: IFU1PLAInstrDecode.InstrDecodeOut4,
IDOut5: IFU1PLAInstrDecode.InstrDecodeOut5,
IDOut6: IFU1PLAInstrDecode.InstrDecodeOut6,
IDIn:  IFU1PLAInstrDecode.InstrDecodeIn,
Debug: LONG CARDINAL ];
IfuInitializedPublic: PROC RETURNS[public: Core.Wire];
scanDrInv: ScanRef;      -- True for elements which are stored inverted
ScanDrInv: PROC[scan: ScanRef ← NIL] -- Inverts elements which are stored inverted
RETURNS[IFU1Public.ScanRef];
SetScanBit: PROC[scan: ScanRef, bit: NAT,     val: BOOL]; -- applies scanDrInv
GetScanBit: PROC[scan: ScanRef, bit: NAT] RETURNS[ val: BOOL]; -- applies scanDrInv
PortWire: PROC
[name: Rope.ROPE, size: NAT𡤀, dr: Ports.Drive ← none, pwrVal: Ports.Level ← L]
RETURNS[wire: Core.Wire];
END.