DIRECTORY CacheOps, Core, CoreClasses, CoreFlat, Dragon, DragOpsCross, IFU2, LizardCache, LizardHeart, LizardLiver, Ports, Rosemary, RosemaryUser; Cluster2: CEDAR DEFINITIONS = BEGIN Instances: TYPE = {iCache, eCache, eu, ifu}; historySize: NAT = 20; ClusterState: TYPE = RECORD [ cycle: INT _ 0, phase: Dragon.Phase _ a, data: ARRAY Instances OF REF ANY _ ALL[NIL] ]; OpaqueKitchenSink: TYPE = REF ANY; KitchenSink: TYPE = REF KitchenSinkRec; KitchenSinkRec: TYPE = RECORD [ controlPanel: ControlPanel _ NIL, log: Core.STREAM _ NIL, lizardSimulation: LizardSimulation _ NIL, rosemarySimulation: Rosemary.Simulation _ NIL, rosemaryStores: LIST OF REF ANY _ NIL, clusterIOPort: Ports.Port _ NIL, vm: CacheOps.VirtualMemory _ NIL, iCache, eCache: CacheOps.Cache _ NIL, euSimulation: Rosemary.Simulation _ NIL, euPort: Ports.Port _ NIL, euSimulationTruthPort: Ports.Port _ NIL, euSimulationTestPort: Ports.Port _ NIL, euFlatInstance: CoreFlat.FlatInstance _ NIL, euCyclesFromReject: CARDINAL _ 0, euReject: CoreFlat.FlatWire _ NIL, euDisplay: RosemaryUser.RoseDisplay _ NIL, diagnostics: Core.ROPE _ NIL, cluster: Core.CellType _ NIL, coreInsts: ARRAY Instances OF CoreClasses.CellInstance _ ALL[NIL], state: ARRAY [0..historySize) OF ClusterState ]; LizardSimulation: TYPE = REF LizardSimulationRec; LizardSimulationRec: TYPE = RECORD [ processor: LizardHeart.Processor _ NIL, control: LizardHeart.Control _ nextInst, euCache: LizardCache.CacheBase, lastInstrOps: LIST OF REF ANY -- RegStore, CacheTrans -- _ NIL ]; ControlPanel: TYPE = REF ControlPanelRec; ControlPanelRec: TYPE = RECORD [ diagnostic: Core.ROPE _ NIL, cycle: INT _ 0, slowFromCycle: INT _ 10000000, instrCount: INT _ 0, slowFromInstr: INT _ 10000000, phase: Dragon.Phase _ a, stopInPh: ARRAY Dragon.Phase OF BOOL _ ALL[TRUE], repeatPhase: BOOL _ FALSE, continueTestFromAbort: BOOL _ FALSE, reset, resched: BOOL _ FALSE, enaECacheLog: BOOL _ FALSE, enaIFULog: BOOL _ FALSE, enaEULog: BOOL _ FALSE, lizardToo: BOOL _ TRUE, emulateBreakpoint: BOOL _ TRUE, randomSeed: INT _ 0, randomCycleLimit: INT _ 0, running: BOOL _ FALSE, msg: Core.ROPE _ NIL ]; StartNewLizard: PROC [ m: REF -- CacheOps.VM -- ] RETURNS [ sim: LizardSimulation ]; SuccessHalt: ERROR; Breakpoint: SIGNAL; DefaultCheckSynch: IFU2.CheckSynchProc; CSProcRec: TYPE = RECORD [proc: IFU2.CheckSynchProc]; csProcRec: CSProcRec; -- for easy replacement MakeCluster: PROC RETURNS [ks: KitchenSink]; DoCluster: PROC [ks: KitchenSink, diagnostic: Core.ROPE _ NIL]; GetPublicBool: PROC [ks: KitchenSink, signal: ATOM] RETURNS [value: BOOL]; SetPublicBool: PROC [ks: KitchenSink, signal: ATOM, value: BOOL]; SetPublic: PROC [ks: KitchenSink, signal: ATOM, value: REF ANY]; SetPublicAndSettle: PROC [ks: KitchenSink, signal: ATOM, value: REF ANY]; END. žCluster2.mesa Copyright c 1986 by Xerox Corporation. All rights reserved. McCreight, May 13, 1986 2:28:43 pm PDT Barth, April 28, 1986 12:14:11 pm PDT Κ˜šœ ™ Icodešœ Οmœ1™