
<<IFUPLAInstrDecode.mesa>>
<<Copyright © 1984 by Xerox Corporation.  All rights reserved.>>
<<Last edited by Twilliams, August 27, 1984 6:28:59 pm PDT>>
<<Last edited by Curry, July 9, 1986 7:32:33 pm PDT>>
    <<Last edited by Herrmann, August 14, 1985 12:42:42 pm PDT>>
    <<Last edited by McCreight, March 20, 1986 6:46:39 pm PST>>

DIRECTORY
Basics,
Dragon,
DragOpsCross,
IFUPLAMainControl,
PLAOps;

IFUPLAInstrDecode: CEDAR DEFINITIONS IMPORTS Basics =
BEGIN

instrDecodePLA: PLAOps.PLA;

<<InstrDecodeProc:         PROC[args: InstrDecodeIn]         RETURNS[result: InstrDecodeOut];>>

InstrDecodeIn: TYPE = RECORD [    -- default must be zero for use initializing sigificance arg

state:                Dragon.HexByte _ 0,
instReady:        BOOL _ FALSE,
op:                DragOpsCross.Inst _ LOOPHOLE[0],
alpha:                Dragon.HexByte _ 0,
beta:                Dragon.HexByte _ 0,
pushPending:    BOOL _ FALSE,
popPending:        BOOL _ FALSE,
userMode0:        BOOL _ FALSE ];

InstrDecodeOut: TYPE = RECORD [
instStarting0:            BOOL                            _ FALSE,
nextMacro:            NextMacro                    _ get,
microCycleNext:        MicroCycleNext                _ clear,
protMicroCycle:        BOOL                            _ FALSE,    -- multicycle exceptions
pcNext:                PCNext                        _ incr,
pcBusSrc:                PCBusSrc                        _ pc,
pcPipeSrc:            PCPipeSrc                    _ thisPC,
kPadsIn0:                BOOL                            _ FALSE,
push0:                BOOL                            _ FALSE,
pop0:                    BOOL                            _ FALSE,

x1ADstSLimit:        BOOL                            _ FALSE,
x1ASrcSLimit:        BOOL                            _ FALSE,
x1ADstStatus:        BOOL                            _ FALSE,
x2ASrcStatus0:        BOOL                            _ FALSE,
x1ADstStack:            BOOL                            _ FALSE,
x1ASrcStack:            BOOL                            _ FALSE,
x1ASrcStackL:        BOOL                            _ FALSE,
x1ASrcStackP:        BOOL                            _ FALSE,
xBusStackL:            BOOL                            _ FALSE, -- otherwise PC
xBusStackEldest:        BOOL                            _ FALSE, -- otherwise youngest

aReg:                    ABReg                        _ constantZero,
bReg:                    ABReg                        _ constantZero,
cReg:                    CReg                            _ inhibitStore,
cIsField0:                BOOL                            _ FALSE,
lSource:                LSource                        _ [ l, zero ],
sSource:                SSource                        _ [ s, deltaS ],
popSa:                    BOOL                            _ FALSE,
popSb:                BOOL                            _ FALSE,
pushSc:                BOOL                            _ FALSE,

x2ALitSource:        X2ALitSource                _ none,
kIsRtOp0:                BOOL                            _ FALSE,
fCtlIsRtOp0:            BOOL                            _ FALSE,

aluOp:                Dragon.ALUOps                _ Or,
aluOpIsOp47:            BOOL                            _ FALSE,
condSel:                Dragon.CondSelects            _ False,
condSelIsOp57:        BOOL                            _ FALSE,
condEffect0:            CondEffect                    _ macroTrap,
dPCmnd:                Dragon.PBusCommands        _ NoOp,
dPCmndIsRd0:        BOOL                            _ FALSE,
dPCmndSel:            DPCmndSel                    _ normal,

clearTrapsEnbled:        BOOL                        _ FALSE,
clearUserMode:            BOOL                        _ FALSE
];

InstrDecodeOut0: TYPE = RECORD [
nextMacro:            NextMacro                    _ get,
pcNext:                PCNext                        _ incr,
pcBusSrc:                PCBusSrc                        _ pc,
pcPipeSrc:            PCPipeSrc                    _ thisPC,
x2ALitSource:        X2ALitSource                _ none,
kPadsIn0:                BOOL                            _ FALSE,
push0:                BOOL                            _ FALSE ];
InstrDecodeOut1: TYPE = RECORD [
instStarting0:            BOOL                            _ FALSE,
microCycleNext:        MicroCycleNext                _ clear,
protMicroCycle:        BOOL                            _ FALSE,    -- multicycle exceptions
clearTrapsEnbled:    BOOL                            _ FALSE,
clearUserMode:        BOOL                            _ FALSE,
pop0:                    BOOL                            _ FALSE,
dPCmnd:                Dragon.PBusCommands        _ NoOp,
dPCmndIsRd0:        BOOL                            _ FALSE,
dPCmndSel:            DPCmndSel                    _ normal ];
InstrDecodeOut2: TYPE = RECORD [
aReg:                    ABReg                        _ constantZero ];
InstrDecodeOut3: TYPE = RECORD [
bReg:                    ABReg                        _ constantZero ];
InstrDecodeOut4: TYPE = RECORD [
kIsRtOp0:                BOOL                            _ FALSE,
fCtlIsRtOp0:            BOOL                            _ FALSE,
pushSc:                BOOL                            _ FALSE,
cReg:                    CReg                            _ inhibitStore ];
InstrDecodeOut5: TYPE = RECORD [
lSource:                LSource                        _ [ l, zero ],
sSource:                SSource                        _ [ s, deltaS ],
popSa:                    BOOL                            _ FALSE,
popSb:                BOOL                            _ FALSE ];
InstrDecodeOut6: TYPE = RECORD [
aluOp:                Dragon.ALUOps                _ Or,
aluOpIsOp47:            BOOL                            _ FALSE,
condSel:                Dragon.CondSelects            _ False,
condSelIsOp57:        BOOL                            _ FALSE,
condEffect0:            CondEffect                    _ macroTrap,
x1ADstSLimit:        BOOL                            _ FALSE,
x1ASrcSLimit:        BOOL                            _ FALSE,
x1ADstStatus:        BOOL                            _ FALSE,
x2ASrcStatus0:        BOOL                            _ FALSE,
x1ADstStack:            BOOL                            _ FALSE,
x1ASrcStack:            BOOL                            _ FALSE,
x1ASrcStackL:        BOOL                            _ FALSE,
x1ASrcStackP:        BOOL                            _ FALSE,
xBusStackL:            BOOL                            _ FALSE, -- otherwise PC
xBusStackEldest:        BOOL                            _ FALSE, -- otherwise youngest
cIsField0:                BOOL                            _ FALSE
];

InstrDecodeOutCount: INT = 7;

DefaultMicro:    InstrDecodeOut = [];
NoOpMicro:        InstrDecodeOut = [
nextMacro:            hold,
pcNext:                fromPCBus,
microCycleNext:        next];
Delayed:            InstrDecodeOut = [
nextMacro:            hold,
pcNext:                fromPCBus,
microCycleNext:        hold,
condEffect0: bubble ];
Trap:                InstrDecodeOut = [
nextMacro:            jump,
pcNext:                fromPCBus,
pcBusSrc:                trapGen, 
push0:                TRUE,
clearTrapsEnbled:    TRUE ];
SingleByteXop:    InstrDecodeOut    = [
nextMacro:            jump,
pcNext:                fromPCBus,
pcBusSrc:                xopGen,
pcPipeSrc:            seqPC,
push0:                TRUE ];
MultiByteXop:    InstrDecodeOut    = [
nextMacro:            jump,
pcNext:                fromPCBus,
pcBusSrc:                xopGen,
pcPipeSrc:            seqPC,
push0:                TRUE,
x2ALitSource:        alpBetGamDel,
cReg:                    [s, offset, one],
pushSc:                TRUE ];

fixedMicroJump: Dragon.HexByte = 64;

<<A decoded enumerated type can be used to directly generate multiplex controls.>>
<<The type can be coded as {0, 1} or {0, 1, 2, 4, 8 ...} or {0, 3, 5, 9, 17 ...}.>>
<<The first and last cases have the advantage that zero can be used a default multiplex control (lsb = 0 => no other bit is true).>>
<<In all cases it's possible to name the bits and/or their inverses using the enumerated type element names.>>

ExceptionCode:    TYPE = IFUPLAMainControl.ExceptionCode;
CondEffect:        TYPE = IFUPLAMainControl.CondEffect;
NextMacro:        TYPE = MACHINE DEPENDENT    {get(0), jump(3), hold(5)};
MicroCycleNext:    TYPE = MACHINE DEPENDENT    {clear(0), next(3), hold(5)};
PCNext:            TYPE = MACHINE DEPENDENT    {incr(0), fromPCBus(1)};
PCBusSrc:        TYPE = MACHINE DEPENDENT {
pc        ( 0),    offSetPC    ( 3),    stack        ( 5),     alpBetGamDel    (  9),
x        (17),    pipe3        (33),    trapGen    (65),     xopGen            (129) };
PCPipeSrc:        TYPE = MACHINE DEPENDENT    {thisPC(0), seqPC(3), offSetPC(5)};
DPCmndSel:        TYPE = MACHINE DEPENDENT    {normal(0), beta(3)};

X2ALitSource:            TYPE = MACHINE DEPENDENT {
none(0), alpBetGamDel(3), alphaBeta(5), beta(9), alpha(17)};

ABReg:    TYPE = RECORD
[lt: ABCSourceLt,    rt: ABCSourceRt, off: PlusOffset        _ zero,        mod: Mod _ full];
CReg:        TYPE = RECORD
[lt: ABCSourceLt,    rt: ABCSourceRt, off: MinusOffset    _ minus4,    mod: Mod _ full];
Mod:        TYPE = MACHINE DEPENDENT    {full(0), half(1)};
ABCSourceLt: TYPE = MACHINE DEPENDENT {
cBase(0), aBase(3), zero(5), -- Mod = full
s(9), l(17) -- Mod = half
};
ABCSourceRt:    TYPE = MACHINE DEPENDENT {
offset(0),    alpha(3),    alpha47(5),
op47(9),    beta(17),    beta03(33),    beta47(65)};
PlusOffset:    TYPE = MACHINE DEPENDENT {
zero(0),            one(1),            two(2),            three(3),
minus4(4),        minus3(5),        minus2(6),        minus1(7)};
MinusOffset:    TYPE = MACHINE DEPENDENT {
minus4(0),    minus3(1),    minus2(2),    minus1(3),
zero(4),        one(5),        two(6),        three(7)};

LSource:        TYPE = RECORD [ lt: LSourceLt, rt: LSourceRt ];
LSourceLt:    TYPE = MACHINE DEPENDENT     {l(0),            s(3),        zero(5),    l3(9)};
LSourceRt:    TYPE = MACHINE DEPENDENT     {zero(0),        alpha(3),    stack(5),    one(9)};
SSource:        TYPE = RECORD [ lt: SSourceLt, rt: SSourceRt ];
SSourceLt:    TYPE = MACHINE DEPENDENT
{s(0),            l(3),        s2(5),        s3(9)};
SSourceRt:    TYPE = MACHINE DEPENDENT     {deltaS(0),    alpha(3),        zero(5),    one(9)};

<<These must agree with DragOpsCross.ProcessorRegister>>
abStackTop:        ABReg    = [ s        , offset, zero ];
cStackTop:        CReg        = [ s        , offset, zero ];
constantZero:        ABReg    = [ cBase    , offset, zero ];
euGF:                ABReg    = [ aBase    , offset, zero ];
inhibitStore:        CReg        = [ cBase    , offset, minus4 ];
fromIfuXBus:        ABReg    = [ cBase    , offset, minus3 ];
toIfuXBus:        CReg        = [ cBase    , offset, minus3 ];
euField:            CReg        = [ cBase    , offset, minus1 ];

ByteTopSig: PROC[topBits: CARDINAL] RETURNS[byte: Dragon.HexByte] = INLINE
{RETURN[Basics.BITAND[Basics.BITSHIFT[377B, (8-topBits)], 377B]]};

InstrTopSig: PROC[topBits: CARDINAL] RETURNS[DragOpsCross.Inst] = INLINE
{RETURN[LOOPHOLE[ByteTopSig[topBits]]]};

<<Used by InstrDecode>>
GenInstrDecodePLA1:    GenInstrDecodePLAProc;
GenInstrDecodePLA2:    GenInstrDecodePLAProc;
GenInstrDecodePLA3:    GenInstrDecodePLAProc;
GenInstrDecodePLA4:    GenInstrDecodePLAProc;
GenInstrDecodePLA5:    GenInstrDecodePLAProc;
GenInstrDecodePLAProc: TYPE = PROC [BE: IDBE, Set: IDSet, old: PLAOps.BoolExpr]
RETURNS[current: PLAOps.BoolExpr];
IDBE: TYPE = PROC [m, d: InstrDecodeIn] RETURNS[PLAOps.BoolExpr];
IDSet: TYPE = PROC[s: PLAOps.BoolExpr _NIL, m, d: InstrDecodeIn _[], out: InstrDecodeOut];

END.