[Indigo]<Dragon>IFU>IFUPLA>IFUPLAFetchControlImpl.mesa!10

IFUPLAFetchControlImpl.mesa

Last edited by Curry, July 8, 1986 7:53:03 pm PDT

McCreight, June 6, 1986 6:11:48 pm PDT

DIRECTORY

Commander,

Dragon,

DragOpsCross,

IFUPLAFetchControl,

IO,

PLAOps;

IFUPLAFetchControlImpl: CEDAR PROGRAM

IMPORTS Commander, IO, PLAOps =

BEGIN OPEN IFUPLAFetchControl, PO: PLAOps;

FetchControlPLA: PLAOps.PLA;

FetchControlProc: PROC[args: FetchControlIn] RETURNS[result: FetchControlOut];

GenFetchControlPLA: PUBLIC PROC = {

pBusFaultIsSig: Dragon.PBusFaults ← LAST [Dragon.PBusFaults];

jump: PO.BoolExpr ← BE[m:[nextMacroJump: TRUE], d:[nextMacroJump: TRUE]];

enabled: PO.BoolExpr ← BE[m:[iPFaulted: TRUE], d:[iPFaulted: FALSE]];

reject: PO.BoolExpr ← BE[m:[iPReject: TRUE], d:[iPReject: TRUE]];

jumpPending: PO.BoolExpr ← BE[m:[jumpPending: TRUE], d:[jumpPending: TRUE]];

fetching: PO.BoolExpr ← BE[m:[fetching: TRUE], d:[fetching: TRUE]];

roomFor1: PO.BoolExpr ← PO.Not[BE[m:[fetchBytesM1: 28], d:[fetchBytesM1: 12]] ];

roomFor2: PO.BoolExpr ← PO.Not[BE[m:[fetchBytesM1: 24], d:[fetchBytesM1: 8]] ];

iPFaulted: PO.BoolExpr ← BE[m:[iPFaulted: TRUE], d:[iPFaulted: TRUE]];

newFault: PO.BoolExpr ← BE[m:[iPFaulting: TRUE], d:[iPFaulting: TRUE]];

jmpOrJmpPend: PO.BoolExpr ← PO.Or[jump, jumpPending];

roomForFetch: PO.BoolExpr ← PO.Or[roomFor2, PO.And[PO.Not[fetching], roomFor1]];

Set[out:[jumpPending: TRUE], s:PO.And[enabled, jmpOrJmpPend, reject ] ];

Set[out:[newFetch: TRUE], -- sets IPCmnd3A to Fetch in next A

s:PO.And[

enabled,

PO.Not[reject],

PO.Or[roomForFetch, jmpOrJmpPend] ] ];

Set[out:[incrPrefetch: TRUE], -- increment addr (AFTER sending old on next phase A)

s:PO.And[enabled, PO.Not[reject], roomForFetch, PO.Not[jmpOrJmpPend]] ];

Set[out:[fetching: TRUE], -- enables write in next B

s:PO.And[

enabled,

PO.Or[

PO.And[ reject, fetching],

PO.And[PO.Not[reject], roomForFetch],

PO.And[PO.Not[reject], jmpOrJmpPend] ] ] ];

Set[out:[iPFaulted: TRUE],

s:PO.And[

PO.Not[jmpOrJmpPend],

PO.Or[BE[m:[reset: TRUE], d:[reset: TRUE]], newFault, iPFaulted] ] ];

Set[out:[fetchWtIndexCtl: clear], s: jmpOrJmpPend ];

Set[out:[fetchWtIndexCtl: hold],

s:PO.And[

PO.Not[jmpOrJmpPend],

PO.Or[PO.Not[fetching], reject, iPFaulted] ] ];

Set[out:[fetchWtIndexCtl: inc],

s:PO.And[

PO.Not[jmpOrJmpPend],

fetching,

PO.Not[reject],

PO.Not[iPFaulted] ] ];

};

BE: PROC [m, d: FetchControlIn] RETURNS[PO.BoolExpr] = {

mRef: REF FetchControlIn ← NARROW[FetchControlPLA.mask];

dRef: REF FetchControlIn ← NARROW[FetchControlPLA.data];

mRef^ ← m; dRef^ ← d; RETURN[PO.GetBEForDataMask[FetchControlPLA]]};

Set: PROC [s: PO.BoolExpr ← NIL, m, d: FetchControlIn ← [ ], out: FetchControlOut] = {

res: REF FetchControlOut ← NARROW[FetchControlPLA.out];

IF s=NIL

THEN s ← BE[m,d]

ELSE s ← PO.And[s, BE[m,d] ];

res^ ← out; PO.SetOutForBE[FetchControlPLA, s]};

GenFetchControl: Commander.CommandProc = {

filename: IO.ROPE ← PO.DefaultCMDLine[cmd.commandLine, defaultFile];

FetchControlPLA ← PO.NewPLA["IFUPLAFetchControl.FetchControlIn", "IFUPLAFetchControl.FetchControlOut"];

GenFetchControlPLA[];

[ ] ← PO.ConvertTermListToCompleteSum[FetchControlPLA.termList, FALSE, FALSE, cmd.out];

[ ] ← PO.FindAMinimalCover[FetchControlPLA.termList, 120, cmd.out];

PO.WritePLAFile[filename, cmd.out, FetchControlPLA] };

defaultFile: IO.ROPE = "IFUPLAFetchControl.ttt";

doc: IO.ROPE = "Expects the name of a ttt file";

Commander.Register[key:"GenFetchControl", proc: GenFetchControl, doc: doc];

END.