DIRECTORY CD,CDDirectory,CDPinObjects,Commander,Convert,IFUAsm,IO,PW,IFUPW,Rope;IFUAsmStack: CEDAR PROGRAM	IMPORTS CD, CDDirectory, CDPinObjects, Commander, Convert, IFUAsm, IO, PW, IFUPW, RopeEXPORTS IFUAsm =BEGIN OPEN IFUPW;GND: ROPE = IFUPW.GND;VDD: ROPE = IFUPW.VDD;stackRP: IFUPW.RowParams = IFUDataColNSeq;StackPCPass16:	List = LIST["JunkPC0AB",	"JunkPC1AB"];StackLPass16:		List = LIST["JunkL0AB",	"JunkL1AB"];OpAlphaBetaBA:	LIST OF REF _ IFUPW.LISTn["OpBA.", NIL, "AlphaBA.", "BetaBA."];StackPCBitsTop: LIST OF REF = IFUPW.LISTn["XBus.",OpAlphaBetaBA,NIL,"PCStackWtDataA.","PCStackRdDataA."];StackPCBits: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {delY: INT;cell	_ CDDirectory.Fetch[design, "StackBit"].object;delY	_ CD.InterestSize[cell].y;cell	_ GenRow[design, stackRP, [PW.Inst[design, cell, LIST["Body", "ExtraVWire"	], FALSE],PW.Inst[design, cell, LIST["Body",					], FALSE],PW.Inst[design, cell, LIST["Body", "ExtraVWire"	], FALSE],PW.Inst[design, cell, LIST["Body", "ExtraVWire"	], FALSE] ] ];cell	_ PW.ArrayY[design, cell, 16];cell	_ RenameBitArrayAndAssignPins[design, cell, "P", delY, StackPCBitsTop, StackGapTop, StackPCPass16, stackRP]};StackGapTop: LIST OF REF = IFUPW.LISTn["XBus.",OpAlphaBetaBA];StackGap: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {cell		_ CDDirectory.Fetch[design, "StackBitSeparation"].object;cell		_ GenRow[design, stackRP, [PW.Inst[design, cell, LIST["ExtraVWire"		], FALSE],PW.Inst[design, cell, LIST[						], FALSE],PW.Inst[design, cell, LIST["ExtraVWire"		], FALSE],PW.Inst[design, cell, LIST["ExtraVWire"		], FALSE] ] ];cell	_ IFUPW.RenameObjAndAssignRowPins[design, cell, "StackGap", FALSE,StackGapTop, StackLBitsTop, NIL, NIL, stackRP] };StackLBitsTop: LIST OF REF = IFUPW.LISTn["XBus.",OpAlphaBetaBA];StackLBits: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {delY: INT;cell	_ CDDirectory.Fetch[design, "StackBit"].object;delY	_ CD.InterestSize[cell].y;cell	_ GenRow[design, stackRP, [PW.Inst[design, cell, LIST[			"ExtraVWire"	], FALSE],PW.Inst[design, cell, LIST[								], FALSE],PW.Inst[design, cell, LIST[			"ExtraVWire"	], FALSE],PW.Inst[design, cell, LIST["Body",	"ExtraVWire"	], FALSE] ] ];cell	_ PW.ArrayY[design, cell, 16];cell	_ PW.FlipY[design, cell];cell	_ RenameBitArrayAndAssignPins[design, cell, "L", delY, StackLBitsTop, StackLBot, StackLPass16, stackRP] };StackLBot: LIST OF REF = IFUPW.LISTn["XBus.",OpAlphaBetaBA,NIL,List4[NIL,  NIL,  NIL,  "LStackWtDataA."],List4[NIL,  NIL,  NIL,  "LStackRdDataA."] ];GenRow: PROC[design: CD.Design, rp: RowParams, bytebit: ARRAY[0..4) OF CD.Object]RETURNS[row: CD.Object] = {cells:	PW.ListOb;FOR ii: INT DECREASING IN [0..rp.rngByte*rp.rngBit) DObyte, index: INT;[byte, index] _ IFUPW.ByteBitFromIndex[ii, rp];cells _ CONS[ bytebit[byte], cells];ENDLOOP;row _ PW.AbutListX[design, cells] };RenameBitArrayAndAssignPins: PUBLIC PROC[design:			CD.Design,cell:				CD.Object,porl:				ROPE,delY:				INT,top:				LIST OF REF	_ NIL,bot:				LIST OF REF	_ NIL,pass:				List _ NIL,rp:					RowParams ]RETURNS[newObject: CD.Object] = {root: ROPE _ Rope.Cat["Stack", porl, "Bits"];StackAssignNames: IFUPW.PinNameProc = {oldPinName: ROPE _ CDPinObjects.GetName[pin];SELECT side FROMleft		=> {rowIndex:	INT _ pin.location.y/delY;name _ SELECT Convert.IntFromRope[oldPinName] FROM2 => IO.PutFR["StkRdAc.%g", IO.int[rowIndex]],0 => IO.PutFR["StkLd%gAc.%g", IO.rope[porl], IO.int[rowIndex]],1 => ListIndexItem[pass, rowIndex],ENDCASE => ERROR};right, none	=> name _ NIL;top, bottom	=> {list:		List;byte, bit:	INT;column:	INT	_ ((pin.location.x MOD cellWidth)-leftTail)/metPitch;[byte, bit]		_ ByteBitFromIndex[pin.location.x/cellWidth, rp];list				_ ExpandList[byte, bit, IF side=top THEN top ELSE bot];list				_ FixGVInList[list];name				_ ListIndexItem[list, column];IF name=NIL THEN ERROR};ENDCASE			=> ERROR};newObject _ RenameObjAndPins[design, cell, root, StackAssignNames]};module:		ROPE _ "IFUAsmStack";Stack: PUBLIC IFUPW.Frame _ IFUPW.NFSFUP[module, y, LIST[StackPCBits,StackGap,StackLBits ] ];	StackCT:	Commander.CommandProc	={IFUPW.AssembleFrame[IFUAsm.RefDesign[], Stack, cmd ] };Commander.Register			[proc:			StackCT,	key:	module];END.      IFUAsmStack.mesa Copyright c 1985 by Xerox Corporation.  All rights reserved.Last Edited by Curry January 28, 1986 7:18:31 pm PSTThe IFU stack has 32 metal2 channels available for passing signals across the data column.*********************StackPCBusIO,StackLBusIO ] ]; Э╩┐  Ш ЪЬЩJЪЬ<Щ<JЪЬ4Щ4ЧJЩ Ъ╧k	ЬШ
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