IFUAsmStack:
CEDAR
PROGRAM
IMPORTS CD, CDDirectory, CDPinObjects, Commander, Convert, IFUAsm, IO, PW, IFUPW, Rope
EXPORTS IFUAsm =
BEGIN OPEN IFUPW;
GND: ROPE = IFUPW.GND;
VDD: ROPE = IFUPW.VDD;
stackRP: IFUPW.RowParams = IFUDataColNSeq;
The IFU stack has 32 metal2 channels available for passing signals across the data column.
StackPCPass16: List = LIST["JunkPC0AB", "JunkPC1AB"];
StackLPass16: List = LIST["JunkL0AB", "JunkL1AB"];
OpAlphaBetaBA: LIST OF REF ← IFUPW.LISTn["OpBA.", NIL, "AlphaBA.", "BetaBA."];
StackPCBitsTop:
LIST
OF
REF =
IFUPW.LISTn[
"XBus.",
OpAlphaBetaBA,
NIL,
"PCStackWtDataA.",
"PCStackRdDataA."];
StackPCBits:
PROC[design:
CD.Design]
RETURNS[cell:
CD.Object] = {
delY: INT;
cell ← CDDirectory.Fetch[design, "StackBit"].object;
delY ← CD.InterestSize[cell].y;
cell ← GenRow[design, stackRP, [
PW.Inst[design, cell, LIST["Body", "ExtraVWire" ], FALSE],
PW.Inst[design, cell, LIST["Body", ], FALSE],
PW.Inst[design, cell, LIST["Body", "ExtraVWire" ], FALSE],
PW.Inst[design, cell, LIST["Body", "ExtraVWire" ], FALSE] ] ];
cell ← PW.ArrayY[design, cell, 16];
cell ← RenameBitArrayAndAssignPins[
design, cell, "P", delY, StackPCBitsTop, StackGapTop, StackPCPass16, stackRP]};
StackGapTop:
LIST
OF
REF =
IFUPW.LISTn[
"XBus.",
OpAlphaBetaBA];
StackGap:
PROC[design:
CD.Design]
RETURNS[cell:
CD.Object] = {
cell ← CDDirectory.Fetch[design, "StackBitSeparation"].object;
cell ← GenRow[design, stackRP, [
PW.Inst[design, cell, LIST["ExtraVWire" ], FALSE],
PW.Inst[design, cell, LIST[ ], FALSE],
PW.Inst[design, cell, LIST["ExtraVWire" ], FALSE],
PW.Inst[design, cell, LIST["ExtraVWire" ], FALSE] ] ];
cell ←
IFUPW.RenameObjAndAssignRowPins[
design, cell, "StackGap", FALSE,
StackGapTop, StackLBitsTop, NIL, NIL, stackRP] };
StackLBitsTop:
LIST
OF
REF =
IFUPW.LISTn[
"XBus.",
OpAlphaBetaBA];
StackLBits:
PROC[design:
CD.Design]
RETURNS[cell:
CD.Object] = {
delY: INT;
cell ← CDDirectory.Fetch[design, "StackBit"].object;
delY ← CD.InterestSize[cell].y;
cell ← GenRow[design, stackRP, [
PW.Inst[design, cell, LIST[ "ExtraVWire" ], FALSE],
PW.Inst[design, cell, LIST[ ], FALSE],
PW.Inst[design, cell, LIST[ "ExtraVWire" ], FALSE],
PW.Inst[design, cell, LIST["Body", "ExtraVWire" ], FALSE] ] ];
cell ← PW.ArrayY[design, cell, 16];
cell ← PW.FlipY[design, cell];
cell ← RenameBitArrayAndAssignPins[
design, cell, "L", delY, StackLBitsTop, StackLBot, StackLPass16, stackRP] };
StackLBot:
LIST
OF
REF =
IFUPW.LISTn[
"XBus.",
OpAlphaBetaBA,
NIL,
List4[NIL, NIL, NIL, "LStackWtDataA."],
List4[NIL, NIL, NIL, "LStackRdDataA."] ];
*********************
GenRow:
PROC[design:
CD.Design, rp: RowParams, bytebit:
ARRAY[0..4)
OF
CD.Object]
RETURNS[row: CD.Object] = {
cells: PW.ListOb;
FOR ii:
INT
DECREASING
IN [0..rp.rngByte*rp.rngBit)
DO
byte, index: INT;
[byte, index] ← IFUPW.ByteBitFromIndex[ii, rp];
cells ← CONS[ bytebit[byte], cells];
ENDLOOP;
row ← PW.AbutListX[design, cells] };
RenameBitArrayAndAssignPins:
PUBLIC
PROC[
design: CD.Design,
cell: CD.Object,
porl: ROPE,
delY: INT,
top: LIST OF REF ← NIL,
bot: LIST OF REF ← NIL,
pass: List ← NIL,
rp: RowParams ]
RETURNS[newObject: CD.Object] = {
root: ROPE ← Rope.Cat["Stack", porl, "Bits"];
StackAssignNames:
IFUPW.PinNameProc = {
oldPinName: ROPE ← CDPinObjects.GetName[pin];
SELECT side
FROM
left => {
rowIndex: INT ← pin.location.y/delY;
name ←
SELECT Convert.IntFromRope[oldPinName]
FROM
2 => IO.PutFR["StkRdAc.%g", IO.int[rowIndex]],
0 => IO.PutFR["StkLd%gAc.%g", IO.rope[porl], IO.int[rowIndex]],
1 => ListIndexItem[pass, rowIndex],
ENDCASE => ERROR};
right, none => name ← NIL;
top, bottom => {
list: List;
byte, bit: INT;
column: INT ← ((pin.location.x MOD cellWidth)-leftTail)/metPitch;
[byte, bit] ← ByteBitFromIndex[pin.location.x/cellWidth, rp];
list ← ExpandList[byte, bit, IF side=top THEN top ELSE bot];
list ← FixGVInList[list];
name ← ListIndexItem[list, column];
IF name=NIL THEN ERROR};
ENDCASE => ERROR};
newObject ← RenameObjAndPins[design, cell, root, StackAssignNames]};
module:
ROPE ← "IFUAsmStack";
Stack:
PUBLIC
IFUPW.Frame ←
IFUPW.
NFSFUP[module, y,
LIST[
StackPCBusIO,
StackPCBits,
StackGap,
StackLBits ] ];
StackLBusIO ] ];
StackCT: Commander.CommandProc =
{IFUPW.AssembleFrame[IFUAsm.RefDesign[], Stack, cmd ] };
Commander.Register [proc: StackCT, key: module];
END.