IFUAsmABCPipe.mesa
Copyright c 1985 by Xerox Corporation. All rights reserved.
Last Edited by June 5, 1985 3:28:37 am PDT
Curry, December 11, 1985 9:21:48 am PST
DIRECTORY
CD,
Commander,
IFUAsm,
IFUPLAInstrDecode,
IFUPW,
Rope;
IFUAsmABCPipe: CEDAR PROGRAM
IMPORTS Commander, IFUAsm, IFUPW
EXPORTS IFUAsm =
BEGIN
GND: Rope.ROPE = IFUPW.GND;
VDD: Rope.ROPE = IFUPW.VDD;
abcPipeRP: IFUPW.RowParams = IFUPW.IFUDataColNSeq;
exceptCodeAB: IFUPW.List = LIST[
"ExceptCodeAB.0", "ExceptCodeAB.1", "ExceptCodeAB.2", "ExceptCodeAB.3",
"ExceptCodeAB.4", "ExceptCodeAB.5", "ExceptCodeAB.6", "ExceptCodeAB.7"];
microStateAB: IFUPW.List = IFUPW.List8[
"StateAB.0", "StateAB.1", "StateAB.2", "StateAB.3",
"StateAB.4", "StateAB.5", "StateAB.6", "StateAB.7"];
euDControls: IFUPW.List = IFUPW.List8[
"EUAluLeftSrc1BA.0", "EUAluLeftSrc1BA.1",
"EUAluRightSrc1BA.0", "EUAluRightSrc1BA.1",
"EUStore2ASrc1BA.0", "EUStore2ASrc1BA.1",
NIL, NIL];
fixedJump: IFUPW.List = IFUPW.CardToList8[IFUPLAInstrDecode.fixedMicroJump];
fieldAddr: IFUPW.List = IFUPW.ProcRegToList[euField];
junkAddr: IFUPW.List = IFUPW.ProcRegToList[euJunk];
marAddr:  IFUPW.List = IFUPW.ProcRegToList[euMAR];
ABCMicroStateOutTop: LIST OF REF = IFUPW.LISTn[
"XBus.",
IFUPW.List4["AReg0BA.", "BReg0BA.", "CReg0BA.", "StateBA."],
NIL,
IFUPW.List4[NIL,    NIL,   NIL,   "StateAB."]];
ABCMicroStateOut: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.SwitchBoxRow[
design: design,
name:  "IFUAsmABCPipe.ABCMicroStateOut",
rowType: IFUPW.cmosMet2,
topRP: abcPipeRP,
top:  ABCMicroStateOutTop,
left:  exceptCodeAB,
right:  microStateAB,
bot:  ABCMicroStateMuxATop,
botRP: abcPipeRP ]};
ABCMicroStateMuxATop: LIST OF REF = IFUPW.LISTn[
"XBus.",
IFUPW.List4["AReg0BA.", "BReg0BA.", "CReg0BA.", "StateBA."],
NIL,
IFUPW.List4[NIL,    NIL,   NIL,   "StateAB."],
IFUPW.List4[NIL,    NIL,   NIL,   "ExceptCodeAB."]];
ABCMicroStateMuxA: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.IFUMuxRow[
design: design,
name:  "IFUAsmABCPipe.ABCMicroStateMuxA",
top:  ABCMicroStateMuxATop,
leftCtl:  LIST["MicroStateContAB", "MicroStateJumpAB", "MicroStateExcepAB"],
in:  IFUPW.LISTn[
IFUPW.LISTn[      NIL, NIL, NIL,  "StateBA."],
IFUPW.LISTn[      NIL, NIL, NIL,  fixedJump],
IFUPW.LISTn[      NIL, NIL, NIL,  "ExceptCodeAB."] ],
out:  IFUPW.LISTn[IFUPW.List4[ NIL, NIL, NIL,  "StateA."]],
bot:  ABCLatch1ATop,
rp:   abcPipeRP ]};
ABCLatch1ATop: LIST OF REF = IFUPW.LISTn[
"XBus.",
IFUPW.List4["AReg0BA.", "BReg0BA.", "CReg0BA.", NIL],
IFUPW.List4[NIL,    NIL,   NIL,   "StateA."],
IFUPW.List4[NIL,    NIL,   NIL,   "StateAB."] ];
ABCLatch1A: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.IFUGPCellRow[
design: design,
name:  "IFUAsmABCPipe.ABCLatch1A",
type:   IFUPW.LISTn["GPLatch"],
top:  ABCLatch1ATop,
leftCtl:  LIST["PhA", "VBB"],
in:  IFUPW.LISTn[IFUPW.LISTn["AReg0BA.", "BReg0BA.", "CReg0BA.", "StateA."] ],
out: IFUPW.LISTn[IFUPW.List4["AReg1AB.", "BReg1AB.", "CReg1AB.", "StateAB."]],
bot:  ABCMux1BTop,
rp:   abcPipeRP ]};
ABCMux1BTop: LIST OF REF = IFUPW.LISTn[
"XBus.",
IFUPW.List4["AReg0BA.", "BReg0BA.",  NIL,   NIL],
IFUPW.List4["AReg1AB.", "BReg1AB.",  "CReg1AB.",  NIL] ];
ABCMux1B: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.IFUMuxRow[
design: design,
name:  "IFUAsmABCPipe.ABCMux1B",
top:  ABCMux1BTop,
leftCtl:  LIST["Pipe1KillAB", "Pipe1AdvAB"],
in:  IFUPW.LISTn[
IFUPW.LISTn[  GND,   GND,   junkAddr, GND],
IFUPW.LISTn[  "AReg1AB.", "BReg1AB.", "CReg1AB.", NIL] ],
out:  IFUPW.LISTn[IFUPW.List4["AReg1B.",  "BReg1B.", "CReg1B.", NIL]],
bot:  ABCLatch1BTop,
rp:   abcPipeRP ]};
ABCLatch1BTop: LIST OF REF = IFUPW.LISTn[
"XBus.",
IFUPW.List4["AReg0BA.", "BReg0BA.", NIL,   NIL],
NIL,
IFUPW.List4["AReg1B.",  "BReg1B.", "CReg1B.",  NIL] ];
ABCLatch1B: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.IFUGPCellRow[
design: design,
name:  "IFUAsmABCPipe.ABCLatch1B",
type:   IFUPW.LISTn["GPLatch"],
top:  ABCLatch1BTop,
leftCtl: LIST["NotPipe1CycBc", "VBB"],
in:   IFUPW.LISTn[IFUPW.List4["AReg1B.", "BReg1B.", "CReg1B.", NIL]],
out:  IFUPW.LISTn[IFUPW.List4["AReg1BA.", "BReg1BA.", "CReg1BA.", NIL]],
bot:  ABCMatch1PrepTop,
rp:   abcPipeRP ]};
ABCMatch1PrepTop: LIST OF REF = IFUPW.LISTn[
"XBus.",
IFUPW.List4["AReg0BA.", "BReg0BA.", NIL,   NIL],
IFUPW.List4["AReg1BA.", "BReg1BA.", "CReg1BA.",  NIL] ];
ABCMatch1Prep: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.SwitchBoxRow[
design: design,
name:  "IFUAsmABCPipe.ABCMatch1Prep",
rowType: IFUPW.cmosMet2,
topRP: abcPipeRP,
top:  ABCMatch1PrepTop,
left:  NIL,
right:  NIL,
bot:  ABCMatch1GateTop,
botRP:  abcPipeRP ]};
ABCMatch1GateTop: LIST OF REF = IFUPW.LISTn[
"XBus.",
IFUPW.LISTn["AReg0BA.", "BReg0BA.", NIL,   NIL],
IFUPW.List4["AReg1BA.", "BReg1BA.", "CReg1BA.",  NIL],
IFUPW.List4["CReg1BA.", "CReg1BA.", "CReg1BA.",  NIL] ]; -- duplicate
ABCMatch1Gate: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.IFUGPCellRow[
design: design,
name:  "IFUAsmABCPipe.ABCMatch1Gate",
type:   IFUPW.LISTn["GPXor"],
top:  ABCMatch1GateTop,
leftCtl: NIL,
in:   LIST[
IFUPW.LISTn["AReg0BA.", "BReg0BA.", fieldAddr, NIL],
IFUPW.List4["CReg1BA.", "CReg1BA.", "CReg1BA.",  NIL] ],
out:  LIST[
IFUPW.List4["AC2x.",  "BC2x.",  "CF2x.",   NIL]],
bot:  ABCMatch1Top,
rp:   abcPipeRP ]};
ABCMatch1Top: LIST OF REF = IFUPW.LISTn[
"XBus.",
IFUPW.LISTn["AReg0BA.", "BReg0BA.", NIL,   NIL],
IFUPW.List4["AReg1BA.", "BReg1BA.", "CReg1BA.",  NIL],
IFUPW.List4["AC2x.",  "BC2x.",  "CF2x.",   NIL] ];
ABCMatch1: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.IFUMatchRow[
design: design,
name:  "IFUAsmABCPipe.ABCMatch1",
chkFor: LIST[GND],
top:  ABCMatch1Top,
in1:  3,     -- input index
col2:  4,     -- blank column
col3:  5,     -- blank column
sideOuts: IFUPW.List4["AC2MatchB", "BC2MatchB", "C2IsFieldB", NIL],
outsSide: left,
bot:  CLatch2ATop,
rp:   abcPipeRP ]};
CLatch2ATop: LIST OF REF = IFUPW.LISTn[
"XBus.",
IFUPW.List4["AReg0BA.", "BReg0BA.",  NIL,   NIL],
IFUPW.List4["AReg1BA.", "BReg1BA.",  "CReg1BA.",  NIL] ];
CLatch2A: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.IFUGPCellRow[
design: design,
name:  "IFUAsmABCPipe.CLatch2A",
type:   IFUPW.LISTn["GPLatch"],
top:  CLatch2ATop,
leftCtl: LIST["PhA", "VBB"],
in:   LIST[IFUPW.List4[NIL,  NIL,  "CReg1BA.", NIL] ],
out:  LIST[IFUPW.List4[NIL,  NIL,  "CReg2AB.",  NIL]],
bot:  CMux2BTop,
rp:   abcPipeRP ]};
CMux2BTop: LIST OF REF = IFUPW.LISTn[
"XBus.",
IFUPW.List4["AReg0BA.", "BReg0BA.",  NIL,   NIL],
IFUPW.List4["AReg1BA.", "BReg1BA.",  "CReg2AB.",  NIL] ];
CMux2B: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.IFUMuxRow[
design: design,
name:  "IFUAsmABCPipe.CMux2B",
top:  CMux2BTop,
leftCtl: LIST["Pipe2KillAB", "Pipe2AdvAB"],
in:  IFUPW.LISTn[
IFUPW.LISTn[  GND,   GND,   junkAddr, NIL],
IFUPW.LISTn[  NIL,   NIL,   "CReg2AB.", NIL] ],
out:  IFUPW.LISTn[IFUPW.LISTn[NIL,  NIL,  "CReg2B.", NIL]],
bot:  CLatch2BTop,
rp:   abcPipeRP ]};
CLatch2BTop: LIST OF REF = IFUPW.LISTn[
"XBus.",
IFUPW.List4["AReg0BA.", "BReg0BA.",  NIL,   NIL],
IFUPW.List4["AReg1BA.", "BReg1BA.",  NIL,   NIL],
IFUPW.List4[NIL,    NIL,    "CReg2B.",  NIL] ];
CLatch2B: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.IFUGPCellRow[
design: design,
name:  "IFUAsmABCPipe.CLatch2B",
type:   IFUPW.LISTn["GPLatch"],
top:  CLatch2BTop,
leftCtl: LIST["NotPipe2CycBc", "VBB"],
in:   IFUPW.LISTn[IFUPW.List4[NIL, NIL, "CReg2B.",  NIL]],
out:   IFUPW.LISTn[IFUPW.List4[NIL, NIL, "CReg2BA.",  NIL]],
bot:  ABCMatch2PrepTop,
rp:   abcPipeRP ]};
ABCMatch2PrepTop: LIST OF REF = IFUPW.LISTn[
"XBus.",
IFUPW.List4["AReg0BA.", "BReg0BA.",  NIL,   NIL],
IFUPW.List4["AReg1BA.", "BReg1BA.",  "CReg2BA.",  NIL] ];
ABCMatch2Prep: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.SwitchBoxRow[
design: design,
name:  "IFUAsmABCPipe.ABCMatch2Prep",
rowType: IFUPW.cmosMet2,
topRP: abcPipeRP,
top:  ABCMatch2PrepTop,
left:  NIL,
right:  NIL,
bot:  ABCMatch2GateTop,
botRP:  abcPipeRP ]};
ABCMatch2GateTop: LIST OF REF = IFUPW.LISTn[
"XBus.",
IFUPW.LISTn["AReg0BA.", "BReg0BA.", NIL,   NIL],
IFUPW.List4["AReg1BA.", "BReg1BA.", "CReg2BA.",  NIL],
IFUPW.List4["CReg2BA.", "CReg2BA.",  "CReg2BA.",  NIL] ]; -- duplicate
ABCMatch2Gate: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.IFUGPCellRow[
design: design,
name:  "IFUAsmABCPipe.ABCMatch2Gate",
type:   IFUPW.LISTn["GPXor"],
top:  ABCMatch2GateTop,
leftCtl: NIL,
in:   LIST[
IFUPW.LISTn["AReg0BA.", "BReg0BA.", fieldAddr, NIL],
IFUPW.List4["CReg2BA.", "CReg2BA.", "CReg2BA.",  NIL] ],
out:  LIST[
IFUPW.List4["AC3x.",  "BC3x.",  "CF3x.",   NIL]],
bot:  ABCMatch2Top,
rp:   abcPipeRP ]};
ABCMatch2Top: LIST OF REF = IFUPW.LISTn[
"XBus.",
NIL,
IFUPW.List4["AReg1BA.", "BReg1BA.",  "CReg2BA.",  NIL],
IFUPW.List4["AC3x.",  "BC3x.",   "CF3x.",   NIL] ];  -- duplicate
ABCMatch2: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.IFUMatchRow[
design: design,
name:  "IFUAsmABCPipe.ABCMatch2",
chkFor: LIST[GND],
top:  ABCMatch2Top,
in1:  3,  -- input index
col2:  4,  -- blank column
col3:  5,  -- blank column
sideOuts: IFUPW.List4["AC3MatchB", "BC3MatchB", "C3IsFieldB", NIL],
outsSide: left,
bot:  CLatch3ATop,
rp:   abcPipeRP ]};
CLatch3ATop: LIST OF REF = IFUPW.LISTn[
"XBus.",
NIL,
IFUPW.List4["AReg1BA.", "BReg1BA.",  "CReg2BA.",  NIL] ];
CLatch3A: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.IFUGPCellRow[
design: design,
name:  "IFUAsmABCPipe.CLatch3A",
type:   IFUPW.LISTn["GPLatch"],
top:  CLatch3ATop,
leftCtl: LIST["PhA", "VBB"],
in:   LIST[IFUPW.List4[NIL, NIL, "CReg2BA.", NIL] ],
out:  LIST[IFUPW.List4[NIL, NIL, "CReg3AB.",  NIL]],
bot:  CMux3BTop,
rp:   abcPipeRP ]};
CMux3BTop: LIST OF REF = IFUPW.LISTn[
"XBus.",
NIL,
IFUPW.List4["AReg1BA.", "BReg1BA.", "CReg3AB.",  NIL] ];
CMux3B: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.IFUMuxRow[
design: design,
name:  "IFUAsmABCPipe.CMux3B",
top:  CMux3BTop,
leftCtl: LIST["Pipe3FaultAB", "Pipe3TrapAB", "Pipe3AdvAB"],
in:  IFUPW.LISTn[
IFUPW.LISTn[  NIL,   NIL,   marAddr,  NIL],
IFUPW.LISTn[  NIL,   NIL,   junkAddr, NIL],
IFUPW.LISTn[  NIL,   NIL,   "CReg3AB.", NIL] ],
out:  IFUPW.LISTn[IFUPW.LISTn[NIL, NIL, "CReg3B.", NIL]],
bot:  CLatch3BTop,
rp:   abcPipeRP ]};
CLatch3BTop: LIST OF REF = IFUPW.LISTn[
"XBus.",
IFUPW.List4[NIL,    NIL,   "CReg3B.",  NIL],
IFUPW.List4["AReg1BA.", "BReg1BA.", NIL,   NIL] ];
CLatch3B: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.IFUGPCellRow[
design: design,
name:  "IFUAsmABCPipe.CLatch3B",
type:   IFUPW.LISTn["GPLatch"],
top:  CLatch3BTop,
leftCtl: LIST["NotPipe3CycBc", "VBB"],
in:   IFUPW.LISTn[IFUPW.List4[NIL, NIL, "CReg3B.",  NIL]],
out:   IFUPW.LISTn[IFUPW.List4[NIL, NIL, "CReg3BA.",  NIL]],
bot:  ABCDrXBusTop,
rp:   abcPipeRP ]};
ABCDrXBusTop: LIST OF REF = IFUPW.LISTn[
"XBus.",
NIL,
IFUPW.List4["AReg1BA.", "BReg1BA.", "CReg3BA.", NIL] ];
ABCDrXBus: PROC[design: CD.Design] RETURNS[cell: CD.Object] = {
cell ← IFUPW.IFUGPCellRow[
design: design,
name:  "IFUAsmABCPipe.ABCDrXBus",
type:  IFUPW.LISTn["GPTriDr"],
top:  ABCDrXBusTop,
leftCtl: LIST["PhB", "not.PhB"],
in:   LIST[IFUPW.LISTn["AReg1BA.", "BReg1BA.", "CReg3BA.",  euDControls] ],
out:  LIST["XBus."],
bot:  ABCPipeBot,
rp:   abcPipeRP ]};
ABCPipeBot: LIST OF REF = IFUPW.LISTn[
"XBus.",
NIL,
NIL,
IFUPW.LISTn[NIL, NIL, NIL, euDControls]];
module:  Rope.ROPE ← "IFUAsmABCPipe";
ABCPipe: PUBLIC IFUPW.Frame ← IFUPW.NFSFUP[module, y, LIST[
ABCMicroStateOut,
ABCMicroStateMuxA,
ABCLatch1A,
ABCMux1B,
ABCLatch1B,
ABCMatch1Prep,
ABCMatch1Gate,
ABCMatch1,
CLatch2A,
CMux2B,
CLatch2B,
ABCMatch2Prep,
ABCMatch2Gate,
ABCMatch2,
CLatch3A,
CMux3B,
CLatch3B,
ABCDrXBus ] ];
ABCPipeCT: Commander.CommandProc =
{IFUPW.AssembleFrame[IFUAsm.RefDesign[], ABCPipe, cmd ] };
Commander.Register   [proc:   ABCPipeCT, key: module];
END.