EURamImpl.mesa
Copyright © 1985 by Xerox Corporation. All rights reserved.
Louis Monier June 17, 1986 2:25:11 pm PDT
Barth, June 17, 1986 4:02:10 pm PDT
Bertrand Serlet August 11, 1986 11:58:52 pm PDT
Last Edited by: Louis Monier February 19, 1987 11:00:43 am PST
DIRECTORY CoreCreate, EUInner, EUUtils, PWCore, Sisyph;
EURamImpl:
CEDAR
PROGRAM
IMPORTS CoreCreate, EUUtils, PWCore, Sisyph
EXPORTS EUInner =
BEGIN OPEN CoreCreate, EUInner;
-- (ramA, ramB, cBus)[0..32), selRam((selA, selB, selC)[0..nRows), (selALow, selBLow, selCLow)[0..4) ), Vdd, Gnd, nPrech
CreateEURam:
PUBLIC PROC [cx: Sisyph.Context]
RETURNS [ct: CellType] = {
ct ← EUUtils.Fetch["EURam"];
IF ct=
NIL
THEN {
ct ← Sisyph.ES["EURam.sch", cx];
EUUtils.Store["EURam", ct];
};
};
-- The complete array: a mess because of these ROM bits
-- The row 33 (= constAdr/4) is made of four words of ROM.
-- The row zero is on top (because of CONS and AbutY)
-- (naBit, bBit, cBit, ncBit)[0..32)[0..4), (selA, selB, selC)[0..nRows), Vdd, Gnd
CreateRamArray:
PUBLIC
PROC [cx: Sisyph.Context]
RETURNS [cellType: CellType] = {
insts: CellInstances ← NIL;
ramRow: CellType ← Sisyph.ES["RamRow.sch", cx];
flipRomRow: CellType ← PWCore.RotateCellType[CreateRomRow[cx], $FlipY];
flipRamRow: CellType ← PWCore.RotateCellType[ramRow, $FlipY];
IF EUUtils.constAdr/4 MOD 2=0 THEN ERROR; -- else change the orientation of the rom row!
FOR i:
NAT
IN [0..EUUtils.nRows)
DO
insts ←
CONS[
Instance[
SELECT
TRUE
FROM
i=EUUtils.constAdr/4 => flipRomRow,
i MOD 2 = 0 => ramRow,
ENDCASE => flipRamRow,
["selA", Index["selA", i]], ["selB", Index["selB", i]], ["selC", Index["selC", i]]
],
insts];
ENDLOOP;
cellType ← Cell[name: "RamArray",
public: Wires["Vdd", "Gnd", Seq["selA", EUUtils.nRows], Seq["selB", EUUtils.nRows], Seq["selC", EUUtils.nRows],
Seq["naBit", 32, Seq[size: 4]], Seq["bBit", 32, Seq[size: 4]], Seq["cBit", 32, Seq[size: 4]], Seq["ncBit", 32, Seq[size: 4]] ],
instances: insts];
PWCore.SetAbutY[cellType];
};
-- The ROM row
-- (naBit, bBit, cBit, ncBit)[0..32)[0..4), selA, selB, selC, Vdd, Gnd
CreateRomRow:
PROC [cx: Sisyph.Context]
RETURNS [cellType: CellType] = {
rom0: CellType ← Sisyph.ES["Rom0Cell.sch", cx];
rom1: CellType ← Sisyph.ES["Rom1Cell.sch", cx];
stitch: CellType ← Sisyph.ES["RamStitch.sch", cx];
rom0000: CellType ← CreateRomQuad[rom0, rom0, rom0, rom0, stitch]; -- msb
rom0011: CellType ← CreateRomQuad[rom0, rom0, rom1, rom1, stitch];
rom0101: CellType ← CreateRomQuad[rom0, rom1, rom0, rom1, stitch]; -- lsb
-- 0 is msb, on the left, and must be at the beginning of the list
insts: CellInstances ← NIL;
insts ←
CONS[Instance[rom0101,
["naBit", Index["naBit", 31]], ["bBit", Index["bBit", 31]],
["cBit", Index["cBit", 31]], ["ncBit", Index["ncBit", 31]]], insts];
insts ←
CONS[Instance[rom0011,
["naBit", Index["naBit", 30]], ["bBit", Index["bBit", 30]],
["cBit", Index["cBit", 30]], ["ncBit", Index["ncBit", 30]]], insts];
FOR i:
NAT
DECREASING
IN [0..30)
DO
insts ←
CONS[Instance[rom0000,
["naBit", Index["naBit", i]], ["bBit", Index["bBit", i]],
["cBit", Index["cBit", i]], ["ncBit", Index["ncBit", i]]], insts];
ENDLOOP;
cellType ← Cell[name: "RomRow",
public: Wires[Seq["naBit", 32, Seq[size: 4]], Seq["bBit", 32, Seq[size: 4]], Seq["cBit", 32, Seq[size: 4]], Seq["ncBit", 32, Seq[size: 4]], "selA", "selB", "selC", "Vdd", "Gnd"],
instances: insts];
PWCore.SetAbutX[cellType];
};
-- (naBit, bBit, cBit, ncBit)[0..4), selA, selB, selC, Vdd, Gnd
CreateRomQuad:
PROC [b0, b1, b2, b3, stitch: CellType]
RETURNS [cellType: CellType] = {
rom0: CellInstance ← Instance[b0,
["naBit", "naBit[0]"], ["bBit", "bBit[0]"], ["cBit", "cBit[0]"], ["ncBit", "ncBit[0]"]];
ram1: CellInstance ← Instance[b1,
["naBit", "naBit[1]"], ["bBit", "bBit[1]"], ["cBit", "cBit[1]"], ["ncBit", "ncBit[1]"]];
ram2: CellInstance ← Instance[b2,
["naBit", "naBit[2]"], ["bBit", "bBit[2]"], ["cBit", "cBit[2]"], ["ncBit", "ncBit[2]"]];
ram3: CellInstance ← Instance[b3,
["naBit", "naBit[3]"], ["bBit", "bBit[3]"], ["cBit", "cBit[3]"], ["ncBit", "ncBit[3]"]];
s: CellInstance ← Instance[stitch];
cellType ← Cell[name: "RomQuadSt",
public: Wires["Vdd", "Gnd", "selA", "selB", "selC",
Seq["naBit", 4], Seq["bBit", 4], Seq["cBit", 4], Seq["ncBit", 4]],
instances: LIST [rom0, ram1, ram2, ram3, s]];
PWCore.SetAbutX[cellType];
};
END.