DIRECTORY CD, Core, CoreClasses, CoreGeometry, CoreProperties, PWCore, PWCoreRoute, Sisyph;MyPWCoreRouteImpl: CEDAR PROGRAM				IMPORTS CoreGeometry, CoreProperties, PWCore, PWCoreRoute, Sisyph =BEGINSchChannel: PWCore.AttributesProc = {DecideIfInX: PROC [i1, i2: CD.Instance] RETURNS [inX: BOOL] ~ {dx: INT _ ABS[i1.location.x-i2.location.x];dy: INT _ ABS[i1.location.y-i2.location.y];RETURN[dx>dy];};CheckEachPin: CoreGeometry.EachWirePinProc = {SELECT side FROMbottom => IF inX THEN bottomOrLeftWires _ CONS[wire, bottomOrLeftWires];top => IF inX THEN topOrRightWires _ CONS[wire, topOrRightWires];right => IF ~inX THEN topOrRightWires _ CONS[wire, topOrRightWires];left => IF ~inX THEN bottomOrLeftWires _ CONS[wire, bottomOrLeftWires];ENDCASE => ERROR;};channelData: PWCoreRoute.ChannelData;inX, verticalM2, flushTopOrRight: BOOL;prop: REF;bottomOrLeftWires, topOrRightWires: LIST OF Core.Wire _ NIL;decoration: CoreGeometry.Decoration _ Sisyph.mode.decoration;data: CoreClasses.RecordCellType _ NARROW[cellType.data];i1, i2: CD.Instance;prop _ CoreProperties.GetCellTypeProp[cellType, $Metal2IsVertical];verticalM2 _ IF prop#NIL THEN NARROW[prop, REF BOOL]^ ELSE TRUE;prop _ CoreProperties.GetCellTypeProp[cellType, $FlushTopOrRight];flushTopOrRight _ IF prop#NIL THEN NARROW[prop, REF BOOL]^ ELSE TRUE;IF data.size#2 THEN ERROR;	-- exactly two cells per channeli1 _ CoreGeometry.GetTransf[decoration, data.instances[0]];i2 _ CoreGeometry.GetTransf[decoration, data.instances[1]];inX _ DecideIfInX[i1, i2];PWCore.SortInstances[Sisyph.mode.decoration, cellType, IF inX THEN PWCore.SortInX ELSE PWCore.SortInY];[] _ CoreGeometry.EnumerateWireSides[decoration, cellType, CheckEachPin];channelData _ NEW[PWCoreRoute.ChannelDataRec _ [inX: inX,extend: TRUE,	extendTopOrRight: flushTopOrRight,bottomOrLeftWires: bottomOrLeftWires, topOrRightWires: topOrRightWires,trunkLayer: IF verticalM2 THEN "metal" ELSE "metal2",branchLayer: IF verticalM2 THEN "metal2" ELSE "metal",wireWidthProc: PWCoreRoute.GndAndVdd25Met2MinWidth]];CoreProperties.PutCellTypeProp[cellType, $ChannelData, channelData];}; layoutProc: PWCore.LayoutProc;decorateProc: PWCore.DecorateProc;[layoutProc, decorateProc] _ PWCore.GetLayoutAtomRegistration[$Channel];[] _ PWCore.RegisterLayoutAtom[$CR, layoutProc, decorateProc, SchChannel];END.      MyPWCoreRouteImpl.mesaCopyright c 1985, 1986 by Xerox Corporation.  All rights reserved.Louis Monier August 23, 1986 11:04:20 pm PDTLast Edited by: Louis Monier September 30, 1986 1:22:29 pm PDT-- the cellType is a record with exactly two instances[cellType: Core.CellType]-- inX if dx>dy; I know that tis implementation is bogus; used CDBasics[wire: Core.Wire, instance: CD.Instance, min: INT, max: INT, side: CoreGeometry.Side, layer: CD.Layer] RETURNS [quit: BOOL _ FALSE]-- remember to include only atomic wires!!!Ê	  ˜ –"Cedar" stylešœ™Jšœ
Ïmœ7™BIcode™,K™>—J™ JšÏk	œžœO˜[J˜ šÏnœžœžœ˜$Jšžœ<˜CJšž˜J˜ K™6•StartOfExpansion6 -- [cellType: Core.CellType] RETURNS [obj: CD.Object]šÐbn
œ˜%KšÐck™KšœG™Gš
Ÿœžœ
žœžœžœ˜?Kšœžœžœ˜+Kšœžœžœ˜+Kšžœ˜K˜—–‡ -- [wire: Core.Wire, instance: CD.Instance, min: INT, max: INT, side: CoreGeometry.Side, layer: CD.Layer] RETURNS [quit: BOOL _ FALSE]šŸœ"˜.Kš¡ƒ™ƒK™+šžœž˜Kšœ
žœžœžœ˜HKšœžœžœžœ˜AKšœ	žœžœžœ˜DKšœžœžœžœ˜GKšžœžœ˜—Kšœ˜—Kšœ%˜%Kšœ"žœ˜'Kšœžœ˜
Kšœ$žœžœžœ˜<Kšœ=˜=Kšœ#žœ˜9Kšœžœ
˜KšœC˜CKšœžœžœžœžœžœžœžœžœ˜@KšœB˜BKšœžœžœžœžœžœžœžœžœ˜EK˜ KšžœžœžœÏc ˜;Kšœ;˜;Kšœ;˜;Kšœ˜Kšœ7žœžœžœ˜gKšœI˜IK˜ šœžœ˜0Kšœ	˜	Jšœžœ˜Jšœ"˜"Jšœ&˜&Jšœ!˜!Jšœžœžœ	žœ
˜5Jšœžœžœ
žœ	˜6Jšœ5˜5—KšœD˜DKšœ˜—J–6 -- [cellType: Core.CellType] RETURNS [obj: CD.Object]˜ Kšœ˜Kšœ"˜"KšœH˜HJšœJ˜JJ˜ Jšžœ˜Jšœ˜J˜ —— …—    	B  a  