<> <> <> <> DIRECTORY CD, Core, CoreCreate; PadFrame: CEDAR DEFINITIONS = BEGIN <<-- Core level: the top level cellType describing a chip is a record cellType containing n+1 instances: n pads and the inner. Every pad instance carries the property packagePinProp which is used to derive its geometrical position in the pad frame. The only instance without this property is the inner.>> <<-- Layout: the layout atom is $PadFrame. The layout proc creates the four sides, inserts automatically extra power pads, places the inner and calls Onion to do the routing. The resulting cell is flattened so that the extra power pads and the routing are expanded, and the Core description matches the layout.>> <<-- Every pad cellType must have a public wire named "Pad" (for Bonnie).>> packagePinProp: ATOM; -- on instances; type REF NAT; interpretation depends on package padFrameParamsProp: ATOM; -- on cellType; type PadFrameParameters padDesign: CD.Design; PadFrameParameters: TYPE = REF PadFrameParametersRec; PadFrameParametersRec: TYPE = RECORD [ radialLayer: CD.Layer, ringLayer: CD.Layer, nbPadsX, nbPadsY: NAT, -- one pad is the corner in every side innerPos: CD.Position _ [0, 0] -- position of the inner. Default means center it ]; AddPad: PUBLIC PROC [iL: CoreCreate.CellInstances, pad: CoreCreate.WR, type: ATOM, pos: NAT, pa1, pa2, pa3, pa4: CoreCreate.PA _ []] RETURNS [newInsts: CoreCreate.CellInstances]; AddPads: PUBLIC PROC [iL: CoreCreate.CellInstances, pad: Core.Wire, type: ATOM, posL: LIST OF NAT, pa1, pa2, pa3, pa4: CoreCreate.PA _ []] RETURNS [newInsts: CoreCreate.CellInstances]; Segment: PUBLIC PROC [first, size: NAT] RETURNS [list: LIST OF NAT _ NIL]; <<>> END.