EU2DP.mesa
Copyright © 1985 by Xerox Corporation. All rights reserved.
Louis Monier March 18, 1986 0:57:36 am PST
DIRECTORY Core, EU2Arith, EU2Utils;
EU2DP: CEDAR DEFINITIONS = BEGIN OPEN EU2Arith, EU2Utils;
-- PGE
Vdd, Gnd: NAT; -- in
-- from and to pad frame
fromIFU: NAT; -- in from pads
toIFU: NAT; -- out to pads during A
toPBus: NAT; -- out to pads any time
fromPBus: NAT; -- in B from pads
-- to RAM control
ramAdr: NAT; -- ramAdr[0..3)[Hi[0..6), Low[0..2)]
-- from RAM control to RAM
selA, selB, selC, selALow, selBLow, selCLow: NAT; -- 2AB
dRamRead: NAT;
-- to control
-- from kReg register
leftSrc, rightSrc, st2ASrc, loadField: NAT; -- out to control during 1BA
-- from ALU
zero, carryOut, res, opL, opR: NAT; -- out to control during 2AB
-- from right register
fd:
NAT;
-- out to control during 2AB
insertFd, maskFd, shiftFd: NAT;
-- from control
-- registers
pipeRegsSel:
NAT;
-- in
dRead, sel: NAT;
-- alu
carryIn, op: NAT; -- in
-- field unit
insert, mask, shift, sh: NAT; -- in
EU2DPState: TYPE = REF EU2DPStateRec;
EU2DPStateRec:
TYPE =
RECORD[
-- registers
simRegs: ARRAY SourceRange OF CARD, -- some of them are not states
-- register file
ram: ARRAY [0..nbWords) OF CARD];
CreateEU2DataPath: PROC RETURNS [Core.CellType];
END.
-- distributed inside simRegs[kReg]
aAdr, bAdr, cAdr: CARD, -- actually, only bytes
cIsField: BOOL,
EUAluLeftSrc1BA: Dragon.ALULeftSources,
-- 2 bits {aBus(0), rBus(1), cBus(2), reserve3(3)}
EUAluRightSrc1BA: Dragon.ALURightSources,
-- 3 bits {bBus(0), rBus(1), cBus(2), kBus(3), fCtlReg(4)}
EUStore2ASrc1BA: Dragon.Store2ASources,
-- 2 bits {bBus(0), rBus(1), cBus(2), reserve3(3)}