IOTstPad.thy
Last Edited by: Monier, June 21, 1985 3:40:39 pm PDT
CIRCUIT[Lambda ← 1, Temp ← 25] = {
Vdd: node;
powerSupply: voltage[Vdd, Gnd] = 5.0;
! ThymeBasics.thy
! CMOS2.0u25C.thy
Pad Output Buffer
PData, Data, DataI, DriveLow, PDriveLow, nDriveHigh, NnDriveHigh, VVdd, VGnd: node;
VVddSupply: inductor[Vdd, VVdd] = (32/7)*5.0nH;
VGndSupply: inductor[VGnd, Gnd] = (32/7)*5.0nH;
?: inductor[PData, Data] = 5.0nH;
Q1: CTran[DataI, VVdd, nDriveHigh | W ← 32];
Q2: CTran[Vdd, VVdd, nDriveHigh | W ← 32];
Q3: ETran[Vdd, nDriveHigh, NnDriveHigh | W ← 32];
Q4: ETran[DataI, NnDriveHigh, VGnd | W ← 32];
Q5: CTran[DataI, VVdd, PDriveLow | W ← 64];
Q6: CTran[Gnd, PDriveLow, DriveLow | W ← 64];
Q7: ETran[DataI, DriveLow, VGnd | W ← 16];
Q8: ETran[Gnd, DriveLow, VGnd | W ← 16];
Q9: CTran[nDriveHigh, VVdd, PData | W ← 600];
Q10: ETran[DriveLow, PData, VGnd | W ← 300];
C1: capacitor[Data, Gnd] = 50pF;
?: RectWave[DataI | period ← 100ns, width ← 50ns, tRise ← 10ns, tFall ← 10ns, tDelay ← 20ns];
};
PLOT["CrossRAM output buffer", :1ns, -1, 6, Data, DataI, DriveLow, PDriveLow, nDriveHigh, NnDriveHigh, VVddSupply^:10mA, VGndSupply^:10mA];
RUN[tMax ← 100ns];