GenRBC.mesa
Copyright © 1984, 1985 by Xerox Corporation. All rights reserved.
Edward Fiala February 7, 1986 5:17:09 pm PST
This diagnostic tests the arithmetic conditional jumps RJGB(J), RJGEB(J), RJLB(J), and RJLEB(J); and the conditional trap opcodes RBC, BC, and QBC. When correctly executed it terminates with a HALT[177777b] at PC = 4014042B on instruction 403 cycle 1074.
DIRECTORY
DragOpsCross USING [XopBase, TrapBase, TrapWidthBytes, bytesPerWord, TrapIndex, Word],
--XopBase, TrapBase, TrapWidthBytes, Inst, wordsPerPage, bytesPerWord, charsPerWord, bitsPerByte, bitsPerCharacter, bitsPerWord, logWordsPerPage, logBitsPerByte, logBitsPerChar, logBytesPerWord, logCharsPerWord, logBitsPerWord, logBytesPerPage, PageCount, PageNumber, maxPagesInVM, SixBitIndex, FiveBitIndex, Word, TwoWords, FourBitIndex, Half, ThreeBitIndex, FourHalves, TwoHalves, Byte, ZerosByte, OnesByte, EightBytes, FourBytes, ByteIndex, BytesPerWord, TwoBytes, Comparison, ByteAddress, WordAddress, FieldDescriptor, TrapWidthWords, KernalLimit, TrapIndex, StackUnderflowTrap, IFUPageFaultTrap, ResetTrap, IFUStackOverflowTrap, EUStackOverflowTrap, RescheduleTrap, ALUCondOver, ALUCondBC, ALUCondIL, ALUCondDO, EUPageFault, EUWriteFault, AUFault, euStack, euJunk, euMAR, euField, euConstant, euAux, euBogus, euLast, ifuXBus, ifuStatus, ifuSLimit, ifuYoungestL, ifuYoungestPC, ifuEldestL, ifuEldestPC, ifuBogus, ifuL, ifuS, ifuPC, ifuLast, IFUStatusRec, IFUStackIndex, IFUStackSize, IFUOverflow, EUStackIndex, EUStackSize, EULocalIndex, EULocals, EUAuxIndex, EUAuxRegs, EUConstIndex, EUConstants, IOLocation, ioRescheduleRequest, ioResetRequest
DragOpsCrossUtils USING [IntToWord, CardToWord],
--BytePCToWordAddress, WordAddressToBytePC, IOOperandToCard, CardToIOOperand, FieldDescriptorToCard, CardToFieldDescriptor, StatusToWord, WordToStatus, BytesToWord, BytesToHalf, WordToBytes, HalfToBytes, HalvesToWord, WordToHalves, HighHalf, LowHalf, LeftHalf, RightHalf, SwapHalves, WordToInt, IntToWord, WordToCard, HalfToCard, ByteToCard, CardToWord, CardToHalf, CardToByte, DragAnd, DragOr, DragXor, DragNot, VanillaAdd, VanillaSub, AddDelta, HalfNot, HalfAnd, HalfOr, HalfXor, HalfShift, DoubleWordShiftLeft, SingleWordShiftLeft, SingleWordShiftRight, TrapIndexToBytePC, XopToBytePC
HandCoding, --Has opcode and register defs.
HandCodingPseudos, --GenLabel, GenLabelHere, SetLabel, Halt, Pause, MakeLabelGlobal, UseLabel8B, UseLabel16, UseLabel32, ProcedureEntry, ProcedureExit, EnableTraps, IndexedJump, SetupField, ExtractField, ShiftLeft, LoadProcessorReg, StoreProcessorReg, DisableTraps, CauseReschedule, CauseReset, GetSPLimit, SetSPLimit, GetL, SetL, GetYoungestPC, GetYoungestL, GetEldestPC, GetEldestL, SetYoungestPC, SetYoungestL, SetEldestPC, SetEldestL
HandCodingSupport; --Area, GetCurrentArea, ReserveData, SetOutputPC, GetProc, PutProc, ProcList, NewArea, GenWithArea, Gen1WithArea, ForceOut, GetOutputPC, WordAlign, OutputByte, OutputOneByte, OutputAlphaBeta, OutputAlphaBetaGammaDelta, OutputWord
GenRBC: CEDAR PROGRAM
IMPORTS DragOpsCrossUtils, HandCoding, HandCodingPseudos, HandCodingSupport
= BEGIN OPEN DragOpsCrossUtils, HandCoding, HandCodingPseudos, HandCodingSupport;
Word: TYPE = DragOpsCross.Word;
In this diagnostic, the auxiliary registers are called aux0, aux1, ..., aux15; the locals are called reg0, reg1, ..., reg15; and the constants are called const0, const1, ..., const15.
const2 contains -1.
const3 is used as an enabling flag for the bounds-check subroutine.
const6 contains 4 for bounds-check trap subroutine.
aux0: AuxRegSpec = [aux[0]];
aux1: AuxRegSpec = [aux[1]];
aux2: AuxRegSpec = [aux[2]];
aux3: AuxRegSpec = [aux[3]];
aux4: AuxRegSpec = [aux[4]];
aux5: AuxRegSpec = [aux[5]];
aux6: AuxRegSpec = [aux[6]];
aux14: AuxRegSpec = [aux[14]];
aux15: AuxRegSpec = [aux[15]];
const5: ConstSpec = [const[5]];
const6: ConstSpec = [const[6]];
const7: ConstSpec = [const[7]];
const8: ConstSpec = [const[8]];
const9: ConstSpec = [const[9]];
const10: ConstSpec = [const[10]];
const11: ConstSpec = [const[11]];
All: PROC = {
The Xop trap locations assigned to each opcode are at at opcode*TrapWidthBytes + xopBase*bytesPerWord = 4,000,000B + 20B * opcode, and the trap location assigned to each trap are at TrapIndex*TrapWidthBytes + TrapBase*bytesPerWord = 4,002,000B + 20B * TrapIndex. The TrapIndex definitions are in DragOpsCross.
FillXop: PROC [inst: CARDINAL, dest: Label] = {
SetOutputPC[inst * DragOpsCross.TrapWidthBytes + DragOpsCross.XopBase * DragOpsCross.bytesPerWord];
drJDB[UseLabel16[dest]];
};
FillTrap: PROC [tx: DragOpsCross.TrapIndex, dest: Label] = {
SetOutputPC[LOOPHOLE[tx, CARDINAL] * DragOpsCross.TrapWidthBytes + DragOpsCross.TrapBase * DragOpsCross.bytesPerWord];
drJDB[UseLabel16[dest]];
};
area: Area = GetCurrentArea[];
savePC: LONG CARDINAL;
start: Label = GenLabel[];
dummy: Label = GenLabel[];
BoundsCheck: Label = GenLabel[];
BCUnexpected: Label = GenLabel[];
enterRJBTest: Label = GenLabel[];
enterRBCTest: Label = GenLabel[];
Test RJxB and RJxBJ opcodes on <a, b>, <b, a>, and <a, a>, where x = G, GE, L, or LE.
GenRJB: PROC = {
a > b for all calls to RJBTest.
RJBTest: PROC [a, b: INT] ~ {
endTest: Label = GenLabel[];
badRJB: Label = GenLabel[];
okRJGBJ0: Label = GenLabel[];
okRJGB0: Label = GenLabel[];
okRJLEBJ1: Label = GenLabel[];
okRJLEB1: Label = GenLabel[];
okRJGEBJ0: Label = GenLabel[];
okRJGEB0: Label = GenLabel[];
okRJGEBJ1: Label = GenLabel[];
okRJGEB1: Label = GenLabel[];
okRJLEBJ0: Label = GenLabel[];
okRJLEB0: Label = GenLabel[];
okRJLBJ0: Label = GenLabel[];
okRJLB0: Label = GenLabel[];
ax: Word ← IntToWord[a];
bx: Word ← IntToWord[b];
drLIQB[bx]; drLIQB[ax];
First, test RJGB and RJGBJ.
drRJGBJ[topSrc, belowSrc, UseLabel8B[okRJGBJ0]]; Pause[]; SetLabel[okRJGBJ0];
drRJGB[topSrc, belowSrc, UseLabel8B[okRJGB0]]; Pause[]; SetLabel[okRJGB0];
Equal arguments should not jump.
drRJGBJ[topSrc, topSrc, UseLabel8B[badRJB]];
drRJGB[topSrc, topSrc, UseLabel8B[badRJB]];
Next, test RJLEB and RJLEBJ.
drRJLEBJ[topSrc, belowSrc, UseLabel8B[badRJB]];
drRJLEB[topSrc, belowSrc, UseLabel8B[badRJB]];
drRJLEBJ[topSrc, topSrc, UseLabel8B[okRJLEBJ1]]; Pause[]; SetLabel[okRJLEBJ1];
drRJLEB[topSrc, topSrc, UseLabel8B[okRJLEB1]]; Pause[]; SetLabel[okRJLEB1];
Thirdly, test RJGEB and RJGEBJ.
drRJGEBJ[topSrc, belowSrc, UseLabel8B[okRJGEBJ0]]; Pause[]; SetLabel[okRJGEBJ0];
drRJGEB[topSrc, belowSrc, UseLabel8B[okRJGEB0]]; Pause[]; SetLabel[okRJGEB0];
drRJGEBJ[topSrc, topSrc, UseLabel8B[okRJGEBJ1]]; Pause[]; SetLabel[okRJGEBJ1];
drRJGEB[topSrc, topSrc, UseLabel8B[okRJGEB1]]; Pause[]; SetLabel[okRJGEB1];
Fourthly, test RJLB and RJLBJ.
drRJLBJ[topSrc, belowSrc, UseLabel8B[badRJB]];
drRJLB[topSrc, belowSrc, UseLabel8B[badRJB]];
drRJLBJ[topSrc, topSrc, UseLabel8B[badRJB]];
drRJLB[popSrc, popSrc, UseLabel8B[badRJB]];
Now reverse the arguments
drLIQB[ax]; drLIQB[bx];
drRJGBJ[topSrc, belowSrc, UseLabel8B[badRJB]];
drRJGB[topSrc, belowSrc, UseLabel8B[badRJB]];
drRJLEBJ[topSrc, belowSrc, UseLabel8B[okRJLEBJ0]]; Pause[]; SetLabel[okRJLEBJ0];
drRJLEB[topSrc, belowSrc, UseLabel8B[okRJLEB0]]; Pause[]; SetLabel[okRJLEB0];
drRJGEBJ[topSrc, belowSrc, UseLabel8B[badRJB]];
drRJGEB[topSrc, belowSrc, UseLabel8B[badRJB]];
drRJLBJ[topSrc, belowSrc, UseLabel8B[okRJLBJ0]]; Pause[]; SetLabel[okRJLBJ0];
drRJLB[popSrc, belowSrcPop, UseLabel8B[okRJLB0]]; Pause[]; SetLabel[okRJLB0];
drJDB[UseLabel16[endTest]];
SetLabel[badRJB]; Pause[];
SetLabel[endTest];
};
SetLabel[enterRJBTest];
RJBTest[ 17777777777B, FIRST[INT]];
RJBTest[ 0B, FIRST[INT]];
RJBTest[-17777777777B, FIRST[INT]];
RJBTest[ 17777777777B, 0B];
RJBTest[ 1B, 0B];
RJBTest[ 0B, -1B];
};
RBC: If Ra < Rb (unsigned) then Rc ← Ra else trap
QBC: If Rs < Rb (unsigned) then Rd ← Rs else trap.
BC: If not Stack[S-1] < Stack[S] (unsigned) then trap; S ← S - 1.
GenRBC: PROC = {
Test the RBC, QBC, and BC opcodes on the value a and bound b.
RBCTest: PROC [a, b: LONG CARDINAL] ~ {
ax: Word ← CardToWord[a];
bx: Word ← CardToWord[b];
RBCok: Label ← GenLabel[];
RBCbad: Label ← GenLabel[];
IF a < b THEN {
drROR[const3, const0, const0]; --Indicate BC trap not expected.
drLIQB[bx];
drLIQB[ax];
drQBC[pushAtop, reg0];
drRBC[pushDst, reg1, reg0];
drRJEBJ[popSrc, reg1, UseLabel8B[RBCok]];
SetLabel[RBCbad]; Pause[]; SetLabel[RBCok];
drRJNEB[popSrc, reg1, UseLabel8B[RBCbad]];
drEXDIS[];
drLIQB[bx];
drBC[];
drLIQB[ax];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[RBCbad]];
}
ELSE {
drROR[const3, const2, const2]; --Indicate BC trap expected.
drLIQB[bx];
drLIQB[ax];
drQBC[pushAtop, reg0];
Pause[]; Pause[]; --Skipped by trap return
drRBC[pushDst, reg1, reg0];
Pause[]; --Skipped by trap return
drEXDIS[];
drLIQB[bx];
drBC[];
Pause[]; Pause[]; Pause[];
drLIQB[bx];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[RBCok]];
SetLabel[RBCbad]; Pause[];
SetLabel[RBCok];
drLIQB[ax];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[RBCbad]];
};
};
SetLabel[enterRBCTest];
RBCTest[0, 0];
RBCTest[0, 1];
RBCTest[1, 1];
RBCTest[17777777777B, 17777777777B];
RBCTest[17777777776B, 17777777777B];
RBCTest[37777777777B, 17777777777B];
RBCTest[20000000000B, 1];
RBCTest[20000000000B, 17777777777B];
};
WordAlign[area];
SetLabel[dummy]; --A breakpoint would be placed here if Pause[] and Halt[] didn't work
Pause[]; Pause[]; Pause[]; Pause[]; Pause[]; Halt[123B];
Trap here with the return PC pointing at an opcode which experienced a bounds check trap; this trap is always enabled, so no special enabling action is necessary. Unless const3 = -1, Pause[] (boounds check unexpected); otherwise, increment PC by 4 and return.
WordAlign[area];
SetLabel[BoundsCheck];
drALS[0]; --ALS[1 - nargs], where nargs includes 1 for IFUstatus
drLC3[];
drRJNEB[popSrc, const2, UseLabel8B[BCUnexpected]];
GetYoungestPC[]; --Advance return PC by 4
drRVADD[topDst, const6, topSrc]; --Must not use ADDB here because of Carry
SetYoungestPC[];
drRETK[377B]; --RETK[nResults - 1]
SetLabel[BCUnexpected]; Pause[];
Opcodes 0 and 377B are intercepted by the simulator, but make them trap to dummy here anyway.
savePC ← GetOutputPC[area];
FillTrap[ResetTrap, start];
FillTrap[ALUCondBC, BoundsCheck];
FillXop[0, dummy];
FillXop[377B, dummy];
SetOutputPC[savePC];
Simulator execution begins here on a Reset.
WordAlign[area]; SetLabel[start];
const0 is in a ROM, so it requires no initialization; const2 is initialized to -1 here; the other constants require no initialization for this diagnostic.
drASL[255];
When there is nothing on the stack, S should be at L-1
drLIQB[IntToWord[-1]];
drROR[const2, topSrc, popSrc]; --Put -1 in const2.
drLIB[4];
drROR[const6, topSrc, popSrc]; --Put 4 in const6 for BC trap
drROR[const3, const0, const0]; --Indicate BC trap not expected.
GenRJB[];
GenRBC[];
Halt[177777B]; --Terminate here at the end of the program
};
END.