DIRECTORY
DragOpsCross USING [XopBase, TrapBase, TrapWidthBytes, bytesPerWord, TrapIndex, Word],
--Word, wordsPerPage, bytesPerWord, charsPerWord, bitsPerByte, bitsPerCharacter, bitsPerWord, bytesPerPage, logWordsPerPage, logBitsPerByte, logBitsPerChar, logBytesPerWord, logCharsPerWord, logBitsPerWord, logBytesPerPage, PageCount, PageNumber, maxPagesInVM, SixBitIndex, FiveBitIndex, TwoWords, FourBitIndex, Half, ThreeBitIndex, FourHalves, TwoHalves, Byte, ZerosByte, OnesByte, EightBytes, FourBytes, ByteIndex, BytesPerWord, TwoBytes, Comparison, ByteAddress, WordAddress, FieldDescriptor, RegIndex, PadByte, Lit8, Op4, Op8, JDist8, Inst, OIFormat, OQBformat, LRformat, QRformat, ShortRegQR, OBformat, LRBformat, RRformat, ODBformat, LRRBformat, RJBformat, ShortRegRJB, JBBformat, TrapWidthWords, TrapWidthBytes, XopBase, TrapBase, KernalLimit, TrapIndex, StackUnderflowTrap, IFUPageFaultTrap, ResetTrap, IFUStackOverflowTrap, EUStackOverflowTrap, RescheduleTrap, ALUCondFalse, ALUCondEZ, ALUCondLZ, ALUCondLE, ALUCondSpare, ALUCondNE, ALUCondGE, ALUCondGZ, ALUCondOver, ALUCondBC, ALUCondIL, ALUCondDO, ALUCondNotOver, ALUCondNB, ALUCondNI, ModeFault, MemAccessFault, IOAccessFault, EUPageFault, EUWriteFault, AUFault, euStack, euJunk, euToKBus, euMAR, euField, euConstant, euAux, euBogus, euLast, ifuYoungestL, ifuYoungestPC, ifuEldestL, ifuEldestPC, ifuSLimit, ifuBogus, ifuL, ifuS, ifuPC, ifuLast, EURegs, EULegalRegs, IFURegs, IFULegalRegs, StackedStatusWord, IFUStackIndex, IFUStackSize, IFUOverflow, EUStackIndex, EUStackSize, EULocalIndex, EULocals, EUAuxIndex, EUAuxRegs, EUConstIndex, EUConstants, IOLocation, ioRescheduleRequest, ioResetRequest, IOOperand, PCmdFormat, PCmdByteSelect, PCmdClass, PCmdSpace, PCmdDirection
DragOpsCrossUtils USING [CardToWord],
--InstToBytes, InstToFormat, BytePCToWordAddress, WordAddressToBytePC, IOOperandToCard, CardToIOOperand, FieldDescriptorToCard, CardToFieldDescriptor, BytesToWord, BytesToHalf, WordToBytes, HalfToBytes, HalvesToWord, WordToHalves, HighHalf, LowHalf, LeftHalf, RightHalf, SwapHalves, WordToInt, IntToWord, WordToCard, HalfToCard, ByteToCard, CardToWord, CardToHalf, CardToByte, DragAnd, DragOr, DragXor, DragNot, VanillaAdd, VanillaSub, AddDelta, HalfNot, HalfAnd, HalfOr, HalfXor, HalfShift, DoubleWordShiftLeft, SingleWordShiftLeft, SingleWordShiftRight, XopToBytePC, TrapIndexToBytePC, FieldUnit
HandCoding, --Has opcode and register defs.
HandCodingPseudos, --Label, SetLabel, GenLabel, GenLabelHere, UseLabel8A, UseLabel8B, UseLabel16, UseLabel32, LReg, PReg, SReg, AddReg, SubReg, SetRegConst, MoveReg, MoveRegI, LRegI, IndexedJump, ProcedureEntry, ProcedureExit, SetupField, ExtractField, ShiftLeft, LoadProcessorReg, StoreProcessorReg, CauseReschedule, CauseReset, GetSPLimit, SetSPLimit, GetYoungestPC, GetYoungestStatus, GetEldestPC, GetEldestStatus, SetYoungestPC, SetYoungestStatus, SetEldestPC, SetEldestStatus, Pause, Halt
HandCodingSupport; --Area, GetProc, PutProc, ProcList, NewArea, GenWithArea, Gen1WithArea, ForceOut, GetCurrentArea, LoadArea, GetOutputPC, SetOutputPC, WordAlign, ReserveData, OutputByte, OutputOneByte, OutputAlphaBeta, OutputAlphaBetaGammaDelta, OutputWord
GenMove:
CEDAR
PROGRAM
IMPORTS DragOpsCrossUtils, HandCoding, HandCodingPseudos, HandCodingSupport
= BEGIN OPEN DragOpsCrossUtils, HandCoding, HandCodingPseudos, HandCodingSupport;
Word: TYPE = DragOpsCross.Word;
const7: ConstSpec = [const[7]];
const8: ConstSpec = [const[8]];
const9: ConstSpec = [const[9]];
const10: ConstSpec = [const[10]];
const11: ConstSpec = [const[11]];
All:
PROC = {
Xops trap at opcode*TrapWidthBytes + xopBase*bytesPerWord = 4,000,000B + 20B * opcode.
FillXop:
PROC [inst:
CARDINAL, dest: Label] = {
SetOutputPC[inst * DragOpsCross.TrapWidthBytes + DragOpsCross.XopBase * DragOpsCross.bytesPerWord];
drJDB[UseLabel16[dest]];
};
A trap's location is TrapIndex*TrapWidthBytes + TrapBase*bytesPerWord =
4,002,000B + 20B * TrapIndex. TrapIndex definitions are in DragOpsCross.
FillTrap:
PROC [tx: DragOpsCross.TrapIndex, dest: Label] = {
SetOutputPC[LOOPHOLE[tx, CARDINAL] * DragOpsCross.TrapWidthBytes + DragOpsCross.TrapBase * DragOpsCross.bytesPerWord];
drJDB[UseLabel16[dest]];
};
area: Area = GetCurrentArea[];
enterEXDISTest: Label = GenLabel[];
enterDUPTest: Label = GenLabel[];
enterLCTest: Label = GenLabel[];
enterLRTest: Label = GenLabel[];
enterSRTest: Label = GenLabel[];
In each test, an opcode of type "move" is tested by first loading a value X into the destination and a value X' into the source; then the source is moved to the destination; next, the correct value is loaded onto the stack with LIQB; and finally, the value in the destination is compared to the correct value on the stack with RJEBJ. Then the test is repeated with the value X originally in the source.
GenEXDIS:
PROC = {
ok1: Label ← GenLabel[];
ok2: Label ← GenLabel[];
w: Word ← CardToWord[1];
nw: Word ← CardToWord[37777777776B];
SetLabel[enterEXDISTest];
drLIQB[w]; drLIQB[nw]; drEXDIS[]; drLIQB[nw];
drRJEBJ[left: popSrc, right: belowSrc, dist: UseLabel8B[ok1]]; Pause[]; SetLabel[ok1];
drLIQB[w]; drEXDIS[]; drLIQB[w];
drRJEBJ[left: popSrc, right: belowSrcPop, dist: UseLabel8B[ok2]]; Pause[]; SetLabel[ok2];
};
GenDUP:
PROC = {
ok1: Label ← GenLabel[];
ok2: Label ← GenLabel[];
w: Word ← CardToWord[2];
nw: Word ← CardToWord[37777777775B];
SetLabel[enterDUPTest];
drLIQB[w]; drDUP[];
drRJEBJ[left: popSrc, right: belowSrcPop, dist: UseLabel8B[ok1]]; Pause[]; SetLabel[ok1];
drLIQB[nw]; drDUP[];
drRJEBJ[left: popSrc, right: belowSrcPop, dist: UseLabel8B[ok2]]; Pause[]; SetLabel[ok2];
};
GenLC:
PROC = {
badLC: Label ← GenLabel[]; okX11: Label ← GenLabel[];
w0: Word ← CardToWord[0];
w1: Word ← CardToWord[1];
w2: Word ← CardToWord[2];
w3: Word ← CardToWord[3];
w4: Word ← CardToWord[4];
wN2: Word ← CardToWord[37777777776B];
wN1: Word ← CardToWord[37777777777B];
wU7: Word ← CardToWord[100000B];
wX8: Word ← CardToWord[25252525252B];
wX9: Word ← CardToWord[12525252525B];
wX10: Word ← CardToWord[33333333333B];
wX11: Word ← CardToWord[12345670123B];
SetLabel[enterLCTest];
drLIQB[wX8]; drROR[const8, topSrc, popSrc];
drLIQB[wX9]; drROR[const9, topSrc, popSrc];
drLIQB[wX10]; drROR[const10, topSrc, popSrc];
drLIQB[wX11]; drROR[const11, topSrc, popSrc];
drLC0[]; drLC1[]; drLC2[]; drLC3[]; drLC4[]; drLC5[];
drLC6[]; drLC7[]; drLC8[]; drLC9[]; drLC10[]; drLC11[];
drRJEBJ[popSrc, const11, UseLabel8B[okX11]]; SetLabel[badLC]; Pause[]; SetLabel[okX11];
drRJNEB[popSrc, const10, UseLabel8B[badLC]];
drRJNEB[popSrc, const9, UseLabel8B[badLC]];
drRJNEB[popSrc, const8, UseLabel8B[badLC]];
drRJNEB[popSrc, const7, UseLabel8B[badLC]];
drRJNEB[popSrc, constN1, UseLabel8B[badLC]];
drRJNEB[popSrc, constN2, UseLabel8B[badLC]];
drRJNEB[popSrc, const4, UseLabel8B[badLC]];
drRJNEB[popSrc, const3, UseLabel8B[badLC]];
drRJNEB[popSrc, const2, UseLabel8B[badLC]];
drRJNEB[popSrc, const1, UseLabel8B[badLC]];
drRJNEB[popSrc, const0, UseLabel8B[badLC]];
};
Test LR0 to LR15. First, push 16 distinctive values onto the stack with LIB, LIDB, and LIQB; the 16 registers containing these values become LR0 to LR15. Then load these values onto the stack using LR0 to LR15. Finally, compare each of the stack values against the value in the local register.
GenLR:
PROC = {
badLR: Label = GenLabel[];
okLR15: Label = GenLabel[];
S is initially at L-1; push 16 values onto the stack which will become the local registers.
SetLabel[enterLRTest];
drLIB[4]; drLIB[10B]; drLIB[20B]; drLIB[40B]; drLIB[100B]; drLIB[200B];
drLIDB[400B]; drLIDB[1000B]; drLIDB[2000B]; drLIDB[4000B];
drLIDB[10000B]; drLIDB[20000B]; drLIDB[40000B]; drLIDB[100000B];
drLIQB[CardToWord[200000b]]; drLIQB[CardToWord[400000b]];
Now push the 16 LR's in sequence; then test their values.
drLRn[reg0]; drLRn[reg1]; drLRn[reg2]; drLRn[reg3];
drLRn[reg4]; drLRn[reg5]; drLRn[reg6]; drLRn[reg7];
drLRn[reg8]; drLRn[reg9]; drLRn[reg10]; drLRn[reg11];
drLRn[reg12]; drLRn[reg13]; drLRn[reg14]; drLRn[reg15];
drRJEBJ[popSrc, reg15, UseLabel8B[okLR15]]; SetLabel[badLR]; Pause[]; SetLabel[okLR15];
drRJNEB[popSrc, reg14, UseLabel8B[badLR]];
drRJNEB[popSrc, reg13, UseLabel8B[badLR]];
drRJNEB[popSrc, reg12, UseLabel8B[badLR]];
drRJNEB[popSrc, reg11, UseLabel8B[badLR]];
drRJNEB[popSrc, reg10, UseLabel8B[badLR]];
drRJNEB[popSrc, reg9, UseLabel8B[badLR]];
drRJNEB[popSrc, reg8, UseLabel8B[badLR]];
drRJNEB[popSrc, reg7, UseLabel8B[badLR]];
drRJNEB[popSrc, reg6, UseLabel8B[badLR]];
drRJNEB[popSrc, reg5, UseLabel8B[badLR]];
drRJNEB[popSrc, reg4, UseLabel8B[badLR]];
drRJNEB[popSrc, reg3, UseLabel8B[badLR]];
drRJNEB[popSrc, reg2, UseLabel8B[badLR]];
drRJNEB[popSrc, reg1, UseLabel8B[badLR]];
drRJNEB[popSrc, reg0, UseLabel8B[badLR]];
};
GenSR:
PROC = {
okSR0: Label = GenLabel[];
badSR: Label = GenLabel[];
SetLabel[enterSRTest];
drAS[16]; --Skip 16 registers which will be the local registers
drLIQB[CardToWord[1000000B]];
drLIQB[CardToWord[2000000B]];
drLIQB[CardToWord[4000000B]];
drLIQB[CardToWord[10000000B]];
drLIQB[CardToWord[20000000B]];
drLIQB[CardToWord[40000000B]];
drLIQB[CardToWord[100000000B]];
drLIQB[CardToWord[200000000B]];
drLIQB[CardToWord[400000000B]];
drLIQB[CardToWord[1000000000B]];
drLIQB[CardToWord[2000000000B]];
drLIQB[CardToWord[4000000000B]];
drLIQB[CardToWord[10000000000B]];
drLIQB[CardToWord[20000000000B]];
drLIB[1];
drLIB[2];
drSRn[reg0]; drSRn[reg1]; drSRn[reg2]; drSRn[reg3];
drSRn[reg4]; drSRn[reg5]; drSRn[reg6]; drSRn[reg7];
drSRn[reg8]; drSRn[reg9]; drSRn[reg10]; drSRn[reg11];
drSRn[reg12]; drSRn[reg13]; drSRn[reg14]; drSRn[reg15];
drAS[16];
drRJEBJ[popSrc, reg0, UseLabel8B[okSR0]]; SetLabel[badSR]; Pause[]; SetLabel[okSR0];
drRJNEB[popSrc, reg1, UseLabel8B[badSR]];
drRJNEB[popSrc, reg2, UseLabel8B[badSR]];
drRJNEB[popSrc, reg3, UseLabel8B[badSR]];
drRJNEB[popSrc, reg4, UseLabel8B[badSR]];
drRJNEB[popSrc, reg5, UseLabel8B[badSR]];
drRJNEB[popSrc, reg6, UseLabel8B[badSR]];
drRJNEB[popSrc, reg7, UseLabel8B[badSR]];
drRJNEB[popSrc, reg8, UseLabel8B[badSR]];
drRJNEB[popSrc, reg9, UseLabel8B[badSR]];
drRJNEB[popSrc, reg10, UseLabel8B[badSR]];
drRJNEB[popSrc, reg11, UseLabel8B[badSR]];
drRJNEB[popSrc, reg12, UseLabel8B[badSR]];
drRJNEB[popSrc, reg13, UseLabel8B[badSR]];
drRJNEB[popSrc, reg14, UseLabel8B[badSR]];
drRJNEB[popSrc, reg15, UseLabel8B[badSR]];
};
Begin at PC = userBasePC = 1010000B * 4, L = 1, S = 0 as established in GenDebugger. const0, 1, 2, and 3 are in a ROM and need no init.
drRVADD[c: const4, a: const3, b: const1];
drRVSUB[c: constN2, a: const0, b: const2];
drRVSUB[c: constN1, a: const0, b: const1];
Note that const7 is used here instead of NSI so that LC7 will be initialized for the test.
drLIDB[100000B]; drROR[c: const7, a: const0, b: popSrc];
GenEXDIS[];
GenDUP[];
GenLC[];
GenLR[];
GenSR[];
Halt[177777B]; --Terminate here at the end of the program
END.