GenLogic.mesa
Copyright © 1984, 1985 by Xerox Corporation. All rights reserved.
Edward Fiala February 7, 1986 4:45:06 pm PST
This diagnostic tests the logic opcodes ROR, RXOR, RAND, QOR, QAND, OR, and AND. When correctly executed it terminates with a HALT[177777b] at PC = 4031715B on instruction 2521 cycle 5110.
DIRECTORY
DragOpsCross USING [XopBase, TrapBase, TrapWidthBytes, bytesPerWord, TrapIndex, Word],
--XopBase, TrapBase, TrapWidthBytes, Inst, wordsPerPage, bytesPerWord, charsPerWord, bitsPerByte, bitsPerCharacter, bitsPerWord, logWordsPerPage, logBitsPerByte, logBitsPerChar, logBytesPerWord, logCharsPerWord, logBitsPerWord, logBytesPerPage, PageCount, PageNumber, maxPagesInVM, SixBitIndex, FiveBitIndex, Word, TwoWords, FourBitIndex, Half, ThreeBitIndex, FourHalves, TwoHalves, Byte, ZerosByte, OnesByte, EightBytes, FourBytes, ByteIndex, BytesPerWord, TwoBytes, Comparison, ByteAddress, WordAddress, FieldDescriptor, TrapWidthWords, KernalLimit, TrapIndex, StackUnderflowTrap, IFUPageFaultTrap, ResetTrap, IFUStackOverflowTrap, EUStackOverflowTrap, RescheduleTrap, ALUCondOver, ALUCondBC, ALUCondIL, ALUCondDO, EUPageFault, EUWriteFault, AUFault, euStack, euJunk, euMAR, euField, euConstant, euAux, euBogus, euLast, ifuXBus, ifuStatus, ifuSLimit, ifuYoungestL, ifuYoungestPC, ifuEldestL, ifuEldestPC, ifuBogus, ifuL, ifuS, ifuPC, ifuLast, IFUStatusRec, IFUStackIndex, IFUStackSize, IFUOverflow, EUStackIndex, EUStackSize, EULocalIndex, EULocals, EUAuxIndex, EUAuxRegs, EUConstIndex, EUConstants, IOLocation, ioRescheduleRequest, ioResetRequest
DragOpsCrossUtils USING [CardToWord],
--BytePCToWordAddress, WordAddressToBytePC, IOOperandToCard, CardToIOOperand, FieldDescriptorToCard, CardToFieldDescriptor, StatusToWord, WordToStatus, BytesToWord, BytesToHalf, WordToBytes, HalfToBytes, HalvesToWord, WordToHalves, HighHalf, LowHalf, LeftHalf, RightHalf, SwapHalves, WordToInt, IntToWord, WordToCard, HalfToCard, ByteToCard, CardToWord, CardToHalf, CardToByte, DragAnd, DragOr, DragXor, DragNot, VanillaAdd, VanillaSub, AddDelta, HalfNot, HalfAnd, HalfOr, HalfXor, HalfShift, DoubleWordShiftLeft, SingleWordShiftLeft, SingleWordShiftRight, TrapIndexToBytePC, XopToBytePC
HandCoding, --Has opcode and register defs.
HandCodingPseudos, --GenLabel, GenLabelHere, SetLabel, Halt, Pause, MakeLabelGlobal, UseLabel8B, UseLabel16, UseLabel32, ProcedureEntry, ProcedureExit, EnableTraps, IndexedJump, SetupField, ExtractField, ShiftLeft, LoadProcessorReg, StoreProcessorReg, DisableTraps, CauseReschedule, CauseReset, GetSPLimit, SetSPLimit, GetL, SetL, GetYoungestPC, GetYoungestL, GetEldestPC, GetEldestL, SetYoungestPC, SetYoungestL, SetEldestPC, SetEldestL
HandCodingSupport; --Area, GetCurrentArea, ReserveData, SetOutputPC, GetProc, PutProc, ProcList, NewArea, GenWithArea, Gen1WithArea, ForceOut, GetOutputPC, WordAlign, OutputByte, OutputOneByte, OutputAlphaBeta, OutputAlphaBetaGammaDelta, OutputWord
GenLogic: CEDAR PROGRAM
IMPORTS DragOpsCrossUtils, HandCoding, HandCodingPseudos, HandCodingSupport
= BEGIN OPEN DragOpsCrossUtils, HandCoding, HandCodingPseudos, HandCodingSupport;
Word: TYPE = DragOpsCross.Word;
In this diagnostic, the auxiliary registers are called aux0, aux1, ..., aux15; the locals are called reg0, reg1, ..., reg15; and the constants are called const0, const1, ..., const15.
aux0: AuxRegSpec = [aux[0]];
aux1: AuxRegSpec = [aux[1]];
aux2: AuxRegSpec = [aux[2]];
aux3: AuxRegSpec = [aux[3]];
aux4: AuxRegSpec = [aux[4]];
aux5: AuxRegSpec = [aux[5]];
aux6: AuxRegSpec = [aux[6]];
aux14: AuxRegSpec = [aux[14]];
aux15: AuxRegSpec = [aux[15]];
const5: ConstSpec = [const[5]];
const6: ConstSpec = [const[6]];
const7: ConstSpec = [const[7]];
const8: ConstSpec = [const[8]];
const9: ConstSpec = [const[9]];
const10: ConstSpec = [const[10]];
const11: ConstSpec = [const[11]];
All: PROC = {
Xops trap at opcode*TrapWidthBytes + xopBase*bytesPerWord = 4,000,000B + 20B * opcode.
FillXop: PROC [inst: CARDINAL, dest: Label] = {
SetOutputPC[inst * DragOpsCross.TrapWidthBytes + DragOpsCross.XopBase * DragOpsCross.bytesPerWord];
drJDB[UseLabel16[dest]];
};
A trap's location is TrapIndex*TrapWidthBytes + TrapBase*bytesPerWord =
4,002,000B + 20B * TrapIndex. TrapIndex definitions are in DragOpsCross.
FillTrap: PROC [tx: DragOpsCross.TrapIndex, dest: Label] = {
SetOutputPC[LOOPHOLE[tx, CARDINAL] * DragOpsCross.TrapWidthBytes + DragOpsCross.TrapBase * DragOpsCross.bytesPerWord];
drJDB[UseLabel16[dest]];
};
area: Area = GetCurrentArea[];
savePC: LONG CARDINAL;
start: Label = GenLabel[];
dummy: Label = GenLabel[];
enterRORTest: Label = GenLabel[];
enterRXORTest: Label = GenLabel[];
enterRANDTest: Label = GenLabel[];
enterRRWithRORTest: Label = GenLabel[];
enterQANDTest: Label = GenLabel[];
enterQRWithQORTest: Label = GenLabel[];
enterORTest: Label = GenLabel[];
enterANDTest: Label = GenLabel[];
GenROR executes 16 x 32 + 2 = 514 instructions. Its purpose is to test the OR hardware, not the RRR format.
GenROR: PROC = {
RORTests: PROC [w, nw: LONG CARDINAL] RETURNS [] ~ {
okROR: Label = GenLabel[];
badROR: Label = GenLabel[];
drLIQB[CardToWord[w]];
drLIQB[CardToWord[nw]];
drROR[pushDst, reg0, const0];
drRJEBJ[popSrc, reg0, UseLabel8B[okROR]]; SetLabel[badROR]; Pause[]; SetLabel[okROR];
drROR[pushDst, reg0, const1]; drRJNEB[popSrc, const1, UseLabel8B[badROR]];
drROR[pushDst, reg0, reg0]; drRJNEB[popSrc, reg0, UseLabel8B[badROR]];
drROR[pushDst, reg0, reg1]; drRJNEB[popSrc, const1, UseLabel8B[badROR]];
drROR[pushDst, const0, reg0]; drRJNEB[popSrc, reg0, UseLabel8B[badROR]];
drROR[pushDst, const1, reg0]; drRJNEB[popSrc, const1, UseLabel8B[badROR]];
drROR[belowDst, popSrc, belowSrc]; drRJNEB[popSrc, const1, UseLabel8B[badROR]];
};
SetLabel[enterRORTest];
drLIQB[CardToWord[37777777777B]];
drROR[const1, topSrc, popSrc]; --const1 ← -1
RORTests[1, 37777777776B];
RORTests[2, 37777777775B];
RORTests[4, 37777777773B];
RORTests[10B, 37777777767B];
RORTests[20B, 37777777757B];
RORTests[40B, 37777777737B];
RORTests[100B, 37777777677B];
RORTests[200B, 37777777577B];
RORTests[400B, 37777777377B];
RORTests[1000B, 37777776777B];
RORTests[2000B, 37777775777B];
RORTests[4000B, 37777773777B];
RORTests[10000B, 37777767777B];
RORTests[20000B, 37777757777B];
RORTests[40000B, 37777737777B];
RORTests[100000B, 37777677777B];
RORTests[200000B, 37777577777B];
RORTests[400000B, 37777377777B];
RORTests[1000000B, 37776777777B];
RORTests[2000000B, 37775777777B];
RORTests[4000000B, 37773777777B];
RORTests[10000000B, 37767777777B];
RORTests[20000000B, 37757777777B];
RORTests[40000000B, 37737777777B];
RORTests[100000000B, 37677777777B];
RORTests[200000000B, 37577777777B];
RORTests[400000000B, 37377777777B];
RORTests[1000000000B, 36777777777B];
RORTests[2000000000B, 35777777777B];
RORTests[4000000000B, 33777777777B];
RORTests[10000000000B, 27777777777B];
RORTests[20000000000B, 17777777777B];
};
Test the XOR hardware. Executes 16 * 32 + 2 = 514 instructions.
GenRXOR: PROC = {
RXORTests: PROC [w, nw: LONG CARDINAL] RETURNS [] ~ {
okRXOR: Label = GenLabel[];
badRXOR: Label = GenLabel[];
drLIQB[CardToWord[w]];
drLIQB[CardToWord[nw]];
drRXOR[pushDst, reg0, const0];
drRJEBJ[popSrc, reg0, UseLabel8B[okRXOR]]; SetLabel[badRXOR]; Pause[]; SetLabel[okRXOR];
drRXOR[pushDst, reg0, const1]; drRJNEB[popSrc, reg1, UseLabel8B[badRXOR]];
drRXOR[pushDst, reg0, reg0]; drRJNEB[popSrc, const0, UseLabel8B[badRXOR]];
drRXOR[pushDst, reg0, reg1]; drRJNEB[popSrc, const1, UseLabel8B[badRXOR]];
drRXOR[pushDst, const0, reg0]; drRJNEB[popSrc, reg0, UseLabel8B[badRXOR]];
drRXOR[pushDst, const1, reg0]; drRJNEB[popSrc, reg1, UseLabel8B[badRXOR]];
drRXOR[belowDst, popSrc, belowSrc]; drRJNEB[popSrc, const1, UseLabel8B[badRXOR]];
};
SetLabel[enterRXORTest];
drLIQB[CardToWord[37777777777B]];
drROR[const1, topSrc, popSrc]; --const1 ← -1
RXORTests[1, 37777777776B];
RXORTests[2, 37777777775B];
RXORTests[4, 37777777773B];
RXORTests[10B, 37777777767B];
RXORTests[20B, 37777777757B];
RXORTests[40B, 37777777737B];
RXORTests[100B, 37777777677B];
RXORTests[200B, 37777777577B];
RXORTests[400B, 37777777377B];
RXORTests[1000B, 37777776777B];
RXORTests[2000B, 37777775777B];
RXORTests[4000B, 37777773777B];
RXORTests[10000B, 37777767777B];
RXORTests[20000B, 37777757777B];
RXORTests[40000B, 37777737777B];
RXORTests[100000B, 37777677777B];
RXORTests[200000B, 37777577777B];
RXORTests[400000B, 37777377777B];
RXORTests[1000000B, 37776777777B];
RXORTests[2000000B, 37775777777B];
RXORTests[4000000B, 37773777777B];
RXORTests[10000000B, 37767777777B];
RXORTests[20000000B, 37757777777B];
RXORTests[40000000B, 37737777777B];
RXORTests[100000000B, 37677777777B];
RXORTests[200000000B, 37577777777B];
RXORTests[400000000B, 37377777777B];
RXORTests[1000000000B, 36777777777B];
RXORTests[2000000000B, 35777777777B];
RXORTests[4000000000B, 33777777777B];
RXORTests[10000000000B, 27777777777B];
RXORTests[20000000000B, 17777777777B];
};
Test the AND hardware; executes 16 * 32 + 2 = 514 instructions
GenRAND: PROC = {
RANDTests: PROC [w, nw: LONG CARDINAL] RETURNS [] ~ {
okRAND: Label = GenLabel[];
badRAND: Label = GenLabel[];
drLIQB[CardToWord[w]];
drLIQB[CardToWord[nw]];
drRAND[pushDst, reg0, const0];
drRJEBJ[popSrc, const0, UseLabel8B[okRAND]]; SetLabel[badRAND]; Pause[]; SetLabel[okRAND];
drRAND[pushDst, reg0, const1]; drRJNEB[popSrc, reg0, UseLabel8B[badRAND]];
drRAND[pushDst, reg0, reg0]; drRJNEB[popSrc, reg0, UseLabel8B[badRAND]];
drRAND[pushDst, reg0, reg1]; drRJNEB[popSrc, const0, UseLabel8B[badRAND]];
drRAND[pushDst, const0, reg0]; drRJNEB[popSrc, const0, UseLabel8B[badRAND]];
drRAND[pushDst, const1, reg0]; drRJNEB[popSrc, reg0, UseLabel8B[badRAND]];
drRAND[belowDst, popSrc, belowSrc]; drRJNEB[popSrc, const0, UseLabel8B[badRAND]];
};
SetLabel[enterRANDTest];
drLIQB[CardToWord[37777777777B]];
drROR[const1, topSrc, popSrc]; --const1 ← -1
RANDTests[1, 37777777776B];
RANDTests[2, 37777777775B];
RANDTests[4, 37777777773B];
RANDTests[10B, 37777777767B];
RANDTests[20B, 37777777757B];
RANDTests[40B, 37777777737B];
RANDTests[100B, 37777777677B];
RANDTests[200B, 37777777577B];
RANDTests[400B, 37777777377B];
RANDTests[1000B, 37777776777B];
RANDTests[2000B, 37777775777B];
RANDTests[4000B, 37777773777B];
RANDTests[10000B, 37777767777B];
RANDTests[20000B, 37777757777B];
RANDTests[40000B, 37777737777B];
RANDTests[100000B, 37777677777B];
RANDTests[200000B, 37777577777B];
RANDTests[400000B, 37777377777B];
RANDTests[1000000B, 37776777777B];
RANDTests[2000000B, 37775777777B];
RANDTests[4000000B, 37773777777B];
RANDTests[10000000B, 37767777777B];
RANDTests[20000000B, 37757777777B];
RANDTests[40000000B, 37737777777B];
RANDTests[100000000B, 37677777777B];
RANDTests[200000000B, 37577777777B];
RANDTests[400000000B, 37377777777B];
RANDTests[1000000000B, 36777777777B];
RANDTests[2000000000B, 35777777777B];
RANDTests[4000000000B, 33777777777B];
RANDTests[10000000000B, 27777777777B];
RANDTests[20000000000B, 17777777777B];
};
Test the RRR format addressing modes with ROR.
GenRRWithROR: PROC = {
topDstOK: Label = GenLabel[];
belowDstOK: Label = GenLabel[];
pushDstOK: Label = GenLabel[];
sta1OK: Label = GenLabel[];
sta1BAD: Label = GenLabel[];
stb1OK: Label = GenLabel[];
stb1BAD: Label = GenLabel[];
stc1OK: Label = GenLabel[];
stc1BAD: Label = GenLabel[];
std1OK: Label = GenLabel[];
std1BAD: Label = GenLabel[];
c1rr: Label = GenLabel[];
crrBAD: Label = GenLabel[];
a0cc: Label = GenLabel[];
accBAD: Label = GenLabel[];
r0cc: Label = GenLabel[];
rccBAD: Label = GenLabel[];
pcr15: Label = GenLabel[];
pcrBAD: Label = GenLabel[];
prc15: Label = GenLabel[];
prcBAD: Label = GenLabel[];
pca15: Label = GenLabel[];
pcaBAD: Label = GenLabel[];
pcb15: Label = GenLabel[];
pcbBAD: Label = GenLabel[];
SetLabel[enterRRWithRORTest];
drAL[13]; --put L at a random position (so that it isn't 0)
drASL[15]; --S ← L + 15 allowing space for local registers
Test 3 stack destinations
drLIB[1]; drSRn[reg0];
drLIB[4]; drSRn[reg1];
drLIB[8];
drROR[topDst, reg0, reg1]; --[s] ← reg0 OR reg1
drJEBBJ[5, UseLabel8B[topDstOK]]; Pause[]; SetLabel[topDstOK];
drLIB[8]; drLIB[16];
drROR[belowDst, reg0, reg1]; drDIS[]; --[s-1] ← reg0 OR reg1
drJEBBJ[5, UseLabel8B[belowDstOK]]; Pause[]; SetLabel[belowDstOK];
drLIB[8]; drLIB[16];
drROR[pushDst, reg0, reg1]; --[s+1] ← reg0 OR reg1 & s ← s+1
drJEBBJ[5, UseLabel8B[pushDstOK]]; Pause[]; SetLabel[pushDstOK];
drLIB[37B];
drROR[const1, topSrc, popSrc];
drLIB[30B];
drROR[reg0, popSrc, topSrc];
drLIB[7B];
drROR[aux0, topSrc, popSrc];
drASL[15]; --Reserve space for locals again
Test the A-input and B-input stack arguments; now have 37B in const1, 30B in reg0, and 7 in aux0.
drLIB[100B];
drLIB[40B];
drROR[pushDst, popSrc, aux0];
drAS[1];
drJEBBJ[47B, UseLabel8B[sta1OK]]; SetLabel[sta1BAD]; Pause[]; SetLabel[sta1OK];
drJNEBB[40B, UseLabel8B[sta1BAD]];
Now have 100B left on the stack.
drROR[pushDst, topSrc, aux0];
drJNEBB[107B, UseLabel8B[sta1BAD]];
drJNEBB[100B, UseLabel8B[sta1BAD]];
drLIB[20B];
drLIB[40B];
drROR[pushDst, belowSrc, aux0];
drJNEBB[27B, UseLabel8B[sta1BAD]];
drJNEBB[40B, UseLabel8B[sta1BAD]];
drJNEBB[20B, UseLabel8B[sta1BAD]];
drLIB[10B];
drLIB[100B];
drROR[pushDst, belowSrcPop, aux0];
drAS[1];
drJNEBB[17B, UseLabel8B[sta1BAD]];
drJNEBB[100B, UseLabel8B[sta1BAD]];
drDIS[];
drLIB[100B];
drLIB[40B];
drROR[pushDst, aux0, popSrc];
drAS[1];
drJEBBJ[47B, UseLabel8B[stb1OK]]; SetLabel[stb1BAD]; Pause[]; SetLabel[stb1OK];
drJNEBB[40B, UseLabel8B[stb1BAD]];
Now have 100B left on the stack.
drROR[pushDst, aux0, topSrc];
drJNEBB[107B, UseLabel8B[stb1BAD]];
drJNEBB[100B, UseLabel8B[stb1BAD]];
drLIB[20B];
drLIB[40B];
drROR[pushDst, aux0, belowSrc];
drJNEBB[27B, UseLabel8B[stb1BAD]];
drJNEBB[40B, UseLabel8B[stb1BAD]];
drJNEBB[20B, UseLabel8B[stb1BAD]];
drLIB[10B];
drLIB[100B];
drROR[pushDst, aux0, belowSrcPop];
drAS[1];
drJNEBB[17B, UseLabel8B[stb1BAD]];
drJNEBB[100B, UseLabel8B[stb1BAD]];
drDIS[];
drLIB[100B];
drLIB[40B];
drROR[pushDst, popSrc, reg0];
drAS[1];
drJEBBJ[70B, UseLabel8B[stc1OK]]; SetLabel[stc1BAD]; Pause[]; SetLabel[stc1OK];
drJNEBB[40B, UseLabel8B[stc1BAD]];
Now have 100B left on the stack.
drROR[pushDst, topSrc, reg0];
drJNEBB[130B, UseLabel8B[stc1BAD]];
drJNEBB[100B, UseLabel8B[stc1BAD]];
drLIB[20B];
drLIB[40B];
drROR[pushDst, belowSrc, reg0];
drJNEBB[30B, UseLabel8B[stc1BAD]];
drJNEBB[40B, UseLabel8B[stc1BAD]];
drJNEBB[20B, UseLabel8B[stc1BAD]];
drLIB[10B];
drLIB[100B];
drROR[pushDst, belowSrcPop, reg0];
drAS[1];
drJNEBB[30B, UseLabel8B[stc1BAD]];
drJNEBB[100B, UseLabel8B[stc1BAD]];
drDIS[];
drLIB[100B];
drLIB[40B];
drROR[pushDst, reg0, popSrc];
drAS[1];
drJEBBJ[70B, UseLabel8B[std1OK]]; SetLabel[std1BAD]; Pause[]; SetLabel[std1OK];
drJNEBB[40B, UseLabel8B[std1BAD]];
Now have 100B left on the stack.
drROR[pushDst, reg0, topSrc];
drJNEBB[130B, UseLabel8B[std1BAD]];
drJNEBB[100B, UseLabel8B[std1BAD]];
drLIB[20B];
drLIB[40B];
drROR[pushDst, reg0, belowSrc];
drJNEBB[30B, UseLabel8B[std1BAD]];
drJNEBB[40B, UseLabel8B[std1BAD]];
drJNEBB[20B, UseLabel8B[std1BAD]];
drLIB[10B];
drLIB[100B];
drROR[pushDst, reg0, belowSrcPop];
drAS[1];
drJNEBB[30B, UseLabel8B[std1BAD]];
drJNEBB[100B, UseLabel8B[std1BAD]];
drDIS[];
Initialize the 16 local registers to 2^n values
drASL[0];
drDIS[];
drLIB[1];  --reg0
drLIB[2];  --reg1
drLIB[4];  --reg2
drLIB[10B];  --reg3
drLIB[20B];  --reg4
drLIB[40B];  --reg5
drLIB[100B]; --reg6
drLIB[200B]; --reg7
drLIDB[400B]; --reg8
drLIDB[1000B]; --reg9
drLIDB[2000B]; --reg10
drLIDB[4000B]; --reg11
drLIDB[10000B]; --reg12
drLIDB[20000B]; --reg13
drLIDB[40000B]; --reg14
drLIDB[100000B]; --reg15
Write 11 constants (exclude 0).
drROR[const1, reg0, reg1]; --3B
drROR[const2, reg2, reg3]; --14B
drROR[const3, reg4, reg5]; --60B
drROR[const4, reg6, reg7]; --300B
drROR[const5, reg8, reg9]; --1400B
drROR[const6, reg10, reg11]; --6000B
drROR[const7, reg12, reg13]; --30000B
drROR[const8, reg14, reg15]; --140000B
drROR[const9, reg0, reg3]; --11B
drROR[const10, reg1, reg4]; --22B
drROR[const11, reg2, reg5]; --44B
Write 16 local registers, read the constant registers.
drROR[reg0, const1, const4]; --303B
drROR[reg1, const2, const5]; --1414B
drROR[reg2, const3, const6]; --6060B
drROR[reg3, const4, const7]; --30300B
drROR[reg4, const5, const8]; --141400B
drROR[reg5, const6, const9]; --6011B
drROR[reg6, const7, const10]; --30022B
drROR[reg7, const8, const11]; --140044B
drROR[reg8, const9, const0]; --11B
drROR[reg9, const10, const1]; --23B
drROR[reg10, const11, const2]; --54B
drROR[reg11, const0, const3]; --60B
drROR[reg12, const1, const5]; --1403B
drROR[reg13, const2, const6]; --6014B
drROR[reg14, const3, const7]; --30060B
drROR[reg15, const4, const8]; --140300B
Write 16 auxiliary registers, read the constant registers.
drROR[aux0, const1, const2]; --17B
drROR[aux1, const3, const4]; --360B
drROR[aux2, const5, const6]; --7400B
drROR[aux3, const7, const8]; --170000B
drROR[aux4, const9, const10]; --33B
drROR[aux5, const11, const1]; --47B
drROR[aux6, const2, const4]; --314B
drROR[aux7, const0, const5]; --1400B
drROR[aux8, const4, const0]; --300B
drROR[aux9, const5, const9]; --1411B
drROR[aux10, const6, const10]; --6022B
drROR[aux11, const7, const11]; --30044B
drROR[aux12, const8, const1]; --140003B
drROR[aux13, const9, const2]; --15B
drROR[aux14, const10, const3]; --62B
drROR[aux15, const11, const7]; --30044B
Verify writing the constants and reading the local registers.
drLIB[3B]; drRJEBJ[popSrc, const1, UseLabel8B[c1rr]]; SetLabel[crrBAD]; Pause[]; SetLabel[c1rr];
drLIB[14B]; drRJNEB[popSrc, const2, UseLabel8B[crrBAD]];
drLIB[60B]; drRJNEB[popSrc, const3, UseLabel8B[crrBAD]];
drLIB[300B]; drRJNEB[popSrc, const4, UseLabel8B[crrBAD]];
drLIDB[1400B]; drRJNEB[popSrc, const5, UseLabel8B[crrBAD]];
drLIDB[6000B]; drRJNEB[popSrc, const6, UseLabel8B[crrBAD]];
drLIDB[30000B]; drRJNEB[popSrc, const7, UseLabel8B[crrBAD]];
drLIDB[140000B]; drRJNEB[popSrc, const8, UseLabel8B[crrBAD]];
drLIB[11B]; drRJNEB[popSrc, const9, UseLabel8B[crrBAD]];
drLIB[22B]; drRJNEB[popSrc, const10, UseLabel8B[crrBAD]];
drLIB[44B]; drRJNEB[popSrc, const11, UseLabel8B[crrBAD]];
Verify writing the auxiliary registers and reading the constants.
drLIB[17B]; drRJEBJ[popSrc, aux0, UseLabel8B[a0cc]]; SetLabel[accBAD]; Pause[]; SetLabel[a0cc];
drLIB[360B]; drRJNEB[popSrc, aux1, UseLabel8B[accBAD]];
drLIDB[7400B]; drRJNEB[popSrc, aux2, UseLabel8B[accBAD]];
drLIDB[170000B]; drRJNEB[popSrc, aux3, UseLabel8B[accBAD]];
drLIB[33B]; drRJNEB[popSrc, aux4, UseLabel8B[accBAD]];
drLIB[47B]; drRJNEB[popSrc, aux5, UseLabel8B[accBAD]];
drLIB[314B]; drRJNEB[popSrc, aux6, UseLabel8B[accBAD]];
drLIDB[1400B]; drRJNEB[popSrc, aux7, UseLabel8B[accBAD]];
drLIB[300B]; drRJNEB[popSrc, aux8, UseLabel8B[accBAD]];
drLIDB[1411B]; drRJNEB[popSrc, aux9, UseLabel8B[accBAD]];
drLIDB[6022B]; drRJNEB[popSrc, aux10, UseLabel8B[accBAD]];
drLIDB[30044B]; drRJNEB[popSrc, aux11, UseLabel8B[accBAD]];
drLIDB[140003B]; drRJNEB[popSrc, aux12, UseLabel8B[accBAD]];
drLIB[15B]; drRJNEB[popSrc, aux13, UseLabel8B[accBAD]];
drLIB[62B]; drRJNEB[popSrc, aux14, UseLabel8B[accBAD]];
drLIDB[30044B]; drRJNEB[popSrc, aux15, UseLabel8B[accBAD]];
Verify writing the local registers and reading the constants.
drLIB[303B]; drRJEBJ[popSrc, reg0, UseLabel8B[r0cc]]; SetLabel[rccBAD]; Pause[]; SetLabel[r0cc];
drLIDB[1414B]; drRJNEB[popSrc, reg1, UseLabel8B[rccBAD]];
drLIDB[6060B]; drRJNEB[popSrc, reg2, UseLabel8B[rccBAD]];
drLIDB[30300B]; drRJNEB[popSrc, reg3, UseLabel8B[rccBAD]];
drLIDB[141400B]; drRJNEB[popSrc, reg4, UseLabel8B[rccBAD]];
drLIDB[6011B]; drRJNEB[popSrc, reg5, UseLabel8B[rccBAD]];
drLIDB[30022B]; drRJNEB[popSrc, reg6, UseLabel8B[rccBAD]];
drLIDB[140044B]; drRJNEB[popSrc, reg7, UseLabel8B[rccBAD]];
drLIB[11B]; drRJNEB[popSrc, reg8, UseLabel8B[rccBAD]];
drLIB[23B]; drRJNEB[popSrc, reg9, UseLabel8B[rccBAD]];
drLIB[54B]; drRJNEB[popSrc, reg10, UseLabel8B[rccBAD]];
drLIB[60B]; drRJNEB[popSrc, reg11, UseLabel8B[rccBAD]];
drLIDB[1403B]; drRJNEB[popSrc, reg12, UseLabel8B[rccBAD]];
drLIDB[6014B]; drRJNEB[popSrc, reg13, UseLabel8B[rccBAD]];
drLIDB[30060B]; drRJNEB[popSrc, reg14, UseLabel8B[rccBAD]];
drLIDB[140300B]; drRJNEB[popSrc, reg15, UseLabel8B[rccBAD]];
Push values from auxiliary registers read on the B port.
drROR[pushDst, const0, aux0];
drROR[pushDst, const0, aux1];
drROR[pushDst, const0, aux2];
drROR[pushDst, const0, aux3];
drROR[pushDst, const0, aux4];
drROR[pushDst, const0, aux5];
drROR[pushDst, const0, aux6];
drROR[pushDst, const0, aux7];
drROR[pushDst, const0, aux8];
drROR[pushDst, const0, aux9];
drROR[pushDst, const0, aux10];
drROR[pushDst, const0, aux11];
drROR[pushDst, const0, aux12];
drROR[pushDst, const0, aux13];
drROR[pushDst, const0, aux14];
drROR[pushDst, const0, aux15];
Push values from auxiliary registers read on the A port.
drROR[pushDst, aux0, const0];
drROR[pushDst, aux1, const0];
drROR[pushDst, aux2, const0];
drROR[pushDst, aux3, const0];
drROR[pushDst, aux4, const0];
drROR[pushDst, aux5, const0];
drROR[pushDst, aux6, const0];
drROR[pushDst, aux7, const0];
drROR[pushDst, aux8, const0];
drROR[pushDst, aux9, const0];
drROR[pushDst, aux10, const0];
drROR[pushDst, aux11, const0];
drROR[pushDst, aux12, const0];
drROR[pushDst, aux13, const0];
drROR[pushDst, aux14, const0];
drROR[pushDst, aux15, const0];
Push values from 16 local registers read on the B port.
drROR[pushDst, const0, reg0];
drROR[pushDst, const0, reg1];
drROR[pushDst, const0, reg2];
drROR[pushDst, const0, reg3];
drROR[pushDst, const0, reg4];
drROR[pushDst, const0, reg5];
drROR[pushDst, const0, reg6];
drROR[pushDst, const0, reg7];
drROR[pushDst, const0, reg8];
drROR[pushDst, const0, reg9];
drROR[pushDst, const0, reg10];
drROR[pushDst, const0, reg11];
drROR[pushDst, const0, reg12];
drROR[pushDst, const0, reg13];
drROR[pushDst, const0, reg14];
drROR[pushDst, const0, reg15];
Push values from 16 local registers read on the A port.
drROR[pushDst, reg0, const0];
drROR[pushDst, reg1, const0];
drROR[pushDst, reg2, const0];
drROR[pushDst, reg3, const0];
drROR[pushDst, reg4, const0];
drROR[pushDst, reg5, const0];
drROR[pushDst, reg6, const0];
drROR[pushDst, reg7, const0];
drROR[pushDst, reg8, const0];
drROR[pushDst, reg9, const0];
drROR[pushDst, reg10, const0];
drROR[pushDst, reg11, const0];
drROR[pushDst, reg12, const0];
drROR[pushDst, reg13, const0];
drROR[pushDst, reg14, const0];
drROR[pushDst, reg15, const0];
Pop and test the result of pushing 16 local registers read on the A port.
drLIDB[140300B];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[prc15]]; SetLabel[prcBAD]; Pause[]; SetLabel[prc15];
drLIDB[30060B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[prcBAD]];
drLIDB[6014B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[prcBAD]];
drLIDB[1403B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[prcBAD]];
drJNEBB[60B, UseLabel8B[prcBAD]];
drJNEBB[54B, UseLabel8B[prcBAD]];
drJNEBB[23B, UseLabel8B[prcBAD]];
drJNEBB[11B, UseLabel8B[prcBAD]];
drLIDB[140044B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[prcBAD]];
drLIDB[30022B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[prcBAD]];
drLIDB[6011B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[prcBAD]];
drLIDB[141400B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[prcBAD]];
drLIDB[30300B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[prcBAD]];
drLIDB[6060B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[prcBAD]];
drLIDB[1414B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[prcBAD]];
drJNEBB[303B, UseLabel8B[prcBAD]];
Pop and test the result of pushing 16 local registers read on the B port.
drLIDB[140300B];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[pcr15]]; SetLabel[pcrBAD]; Pause[]; SetLabel[pcr15];
drLIDB[30060B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcrBAD]];
drLIDB[6014B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcrBAD]];
drLIDB[1403B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcrBAD]];
drJNEBB[60B, UseLabel8B[pcrBAD]];
drJNEBB[54B, UseLabel8B[pcrBAD]];
drJNEBB[23B, UseLabel8B[pcrBAD]];
drJNEBB[11B, UseLabel8B[pcrBAD]];
drLIDB[140044B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcrBAD]];
drLIDB[30022B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcrBAD]];
drLIDB[6011B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcrBAD]];
drLIDB[141400B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcrBAD]];
drLIDB[30300B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcrBAD]];
drLIDB[6060B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcrBAD]];
drLIDB[1414B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcrBAD]];
drJNEBB[303B, UseLabel8B[pcrBAD]];
Pop and test the result of pushing 16 auxiliary registers read on the A port.
drLIDB[30044B];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[pca15]]; SetLabel[pcaBAD]; Pause[]; SetLabel[pca15];
drJNEBB[62B, UseLabel8B[pcaBAD]];
drJNEBB[15B, UseLabel8B[pcaBAD]];
drLIDB[140003B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcaBAD]];
drLIDB[30044B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcaBAD]];
drLIDB[6022B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcaBAD]];
drLIDB[1411B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcaBAD]];
drJNEBB[300B, UseLabel8B[pcaBAD]];
drLIDB[1400B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcaBAD]];
drJNEBB[314B, UseLabel8B[pcaBAD]];
drJNEBB[47B, UseLabel8B[pcaBAD]];
drJNEBB[33B, UseLabel8B[pcaBAD]];
drLIDB[170000B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcaBAD]];
drLIDB[7400B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcaBAD]];
drJNEBB[360B, UseLabel8B[pcaBAD]];
drJNEBB[17B, UseLabel8B[pcaBAD]];
Pop and test the result of pushing 16 auxiliary registers read on the B port.
drLIDB[30044B];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[pcb15]]; SetLabel[pcbBAD]; Pause[]; SetLabel[pcb15];
drJNEBB[62B, UseLabel8B[pcbBAD]];
drJNEBB[15B, UseLabel8B[pcbBAD]];
drLIDB[140003B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcbBAD]];
drLIDB[30044B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcbBAD]];
drLIDB[6022B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcbBAD]];
drLIDB[1411B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcbBAD]];
drJNEBB[300B, UseLabel8B[pcbBAD]];
drLIDB[1400B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcbBAD]];
drJNEBB[314B, UseLabel8B[pcbBAD]];
drJNEBB[47B, UseLabel8B[pcbBAD]];
drJNEBB[33B, UseLabel8B[pcbBAD]];
drLIDB[170000B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcbBAD]];
drLIDB[7400B];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[pcbBAD]];
drJNEBB[360B, UseLabel8B[pcbBAD]];
drJNEBB[17B, UseLabel8B[pcbBAD]];
};
Since the EU's 'AND' logic was tested in GenRAND above and the long addressing modes of QR opcodes are tested in GenQRWithQOR below, it is not necessary to test QAND very thoroughly here. But the variations on the short argument are tested here (const0, const1, topSrc, and popSrc).
GenQAND: PROC = {
c0OK1: Label = GenLabel[];
c1OK1: Label = GenLabel[];
a2OK1: Label = GenLabel[];
a2OK2: Label = GenLabel[];
s3OK1: Label = GenLabel[];
s4OK1: Label = GenLabel[];
s4OK2: Label = GenLabel[];
SetLabel[enterQANDTest];
QAND allows const0, const1, topSrc, or popSrc in the left argument and any register in the right argument; its destination is always [s].
drASL[0];
drDIS[];
drLIDB[33333B];  --Initialize reg0
drLIDB[11111B];  --Initialize reg1
drLIDB[151515B];
drROR[const1, popSrc, topSrc]; --Initialize const1
drLIDB[22222B];
drROR[aux2, popSrc, topSrc]; --Initialize aux2
drQAND[pushA0, reg0]; --Push const0 & reg0
drJEBBJ[0, UseLabel8B[c0OK1]]; Pause[]; SetLabel[c0OK1];
drQAND[pushA1, reg0]; --Push const1 & reg0
drLIDB[11111B]; --Test the QAND result
drRJEBJ[popSrc, belowSrc, UseLabel8B[c1OK1]]; Pause[]; SetLabel[c1OK1];
drLIDB[12345B];
drQAND[pushA1, aux2];
drJEBBJ[0, UseLabel8B[a2OK1]]; Pause[]; SetLabel[a2OK1];
Still have 12345B at [S].
drLIDB[53B];
drQAND[topAtop, belowSrc];
drJEBBJ[41B, UseLabel8B[s3OK1]]; Pause[]; SetLabel[s3OK1];
Still have 12345B at [S].
drLIDB[53B];
drQAND[pushAtop, belowSrc]; --Push 53B & 12345B
drJEBBJ[41B, UseLabel8B[s4OK1]]; Pause[]; SetLabel[s4OK1];
drAS[376B];  --Discard 53B and 12345B
drLIDB[11111B]; --Test that the stack wasn't screwed up
drRJEBJ[topSrc, belowSrc, UseLabel8B[s4OK2]]; Pause[]; SetLabel[s4OK2];
};
Test the QR format addressing modes with QOR by testing [topSrc, popSrc] x AnyReg. Ideally, [const0, const1] x AnyReg should also be tested here but presently aren't.
GenQRWithQOR: PROC = {
qsr7OK: Label = GenLabel[];
qsrBAD: Label = GenLabel[];
qsc6OK: Label = GenLabel[];
qscBAD: Label = GenLabel[];
qsa8OK: Label = GenLabel[];
qsaBAD: Label = GenLabel[];
qss0OK: Label = GenLabel[];
qss1OK: Label = GenLabel[];
qss2OK: Label = GenLabel[];
qss3OK: Label = GenLabel[];
qss4OK: Label = GenLabel[];
qss5OK: Label = GenLabel[];
qpr8OK: Label = GenLabel[];
qprBAD: Label = GenLabel[];
qpc6OK: Label = GenLabel[];
qpcBAD: Label = GenLabel[];
qpa8OK: Label = GenLabel[];
qpaBAD: Label = GenLabel[];
qps0OK: Label = GenLabel[];
qps1OK: Label = GenLabel[];
qps2OK: Label = GenLabel[];
qps3OK: Label = GenLabel[];
qps4OK: Label = GenLabel[];
qps5OK: Label = GenLabel[];
SetLabel[enterQRWithQORTest];
drASL[0];
drDIS[];
Initialize the 16 local registers to 2^n values (use values not exercised in the ROR test for variation).
drLIQB[CardToWord[200000B]]; --reg0
drLIQB[CardToWord[400000B]]; --reg1
drLIQB[CardToWord[1000000B]]; --reg2
drLIQB[CardToWord[2000000B]]; --reg3
drLIQB[CardToWord[4000000B]]; --reg4
drLIQB[CardToWord[10000000B]]; --reg5
drLIQB[CardToWord[20000000B]]; --reg6
drLIQB[CardToWord[40000000B]]; --reg7
drLIQB[CardToWord[100000000B]]; --reg8
drLIQB[CardToWord[200000000B]]; --reg9
drLIQB[CardToWord[400000000B]]; --reg10
drLIQB[CardToWord[1000000000B]]; --reg11
drLIQB[CardToWord[2000000000B]]; --reg12
drLIQB[CardToWord[4000000000B]]; --reg13
drLIQB[CardToWord[10000000000B]]; --reg14
drLIQB[CardToWord[20000000000B]]; --reg15
Initialize 11 constants (exclude 0).
drROR[const1, reg0, reg1]; --600000B
drROR[const2, reg2, reg3]; --3000000B
drROR[const3, reg4, reg5]; --14000000B
drROR[const4, reg6, reg7]; --60000000B
drROR[const5, reg8, reg9]; --300000000B
drROR[const6, reg10, reg11]; --1400000000B
drROR[const7, reg12, reg13]; --6000000000B
drROR[const8, reg14, reg15]; --30000000000B
drROR[const9, reg0, reg3]; --2200000B
drROR[const10, reg1, reg4]; --4400000B
drROR[const11, reg2, reg5]; --11000000B
Initialize 16 auxiliary registers.
drROR[aux0, const1, const2]; --3600000B
drROR[aux1, const3, const4]; --74000000B
drROR[aux2, const5, const6]; --1700000000B
drROR[aux3, const7, const8]; --36000000000B
drROR[aux4, const9, const10]; --6600000B
drROR[aux5, const11, const1]; --11600000B
drROR[aux6, const2, const4]; --63000000B
drROR[aux7, const0, const5]; --300000000B
drROR[aux8, const4, const0]; --60000000B
drROR[aux9, const5, const9]; --302200000B
drROR[aux10, const6, const10]; --1404400000B
drROR[aux11, const7, const11]; --6011000000B
drROR[aux12, const8, const1]; --30000600000B
drROR[aux13, const9, const2]; --3200000B
drROR[aux14, const10, const3]; --14400000B
drROR[aux15, const11, const7]; --6011000000B
Test [s] ← [s] or local register
drLIDB[1B]; drQOR[topAtop, reg0]; drLIQB[CardToWord[200001B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsrBAD]];
drLIDB[2B]; drQOR[topAtop, reg1]; drLIQB[CardToWord[400002B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsrBAD]];
drLIDB[4B]; drQOR[topAtop, reg2]; drLIQB[CardToWord[1000004B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsrBAD]];
drLIDB[10B]; drQOR[topAtop, reg3]; drLIQB[CardToWord[2000010B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsrBAD]];
drLIDB[20B]; drQOR[topAtop, reg4]; drLIQB[CardToWord[4000020B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsrBAD]];
drLIDB[40B]; drQOR[topAtop, reg5]; drLIQB[CardToWord[10000040B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsrBAD]];
drLIDB[100B]; drQOR[topAtop, reg6]; drLIQB[CardToWord[20000100B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsrBAD]];
drLIDB[200B]; drQOR[topAtop, reg7]; drLIQB[CardToWord[40000200B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qsr7OK]]; SetLabel[qsrBAD]; Pause[]; SetLabel[qsr7OK];
drLIDB[400B]; drQOR[topAtop, reg8]; drLIQB[CardToWord[100000400B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsrBAD]];
drLIDB[1000B]; drQOR[topAtop, reg9]; drLIQB[CardToWord[200001000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsrBAD]];
drLIDB[2000B]; drQOR[topAtop, reg10]; drLIQB[CardToWord[400002000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsrBAD]];
drLIDB[4000B]; drQOR[topAtop, reg11]; drLIQB[CardToWord[1000004000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsrBAD]];
drLIDB[10000B]; drQOR[topAtop, reg12]; drLIQB[CardToWord[2000010000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsrBAD]];
drLIDB[20000B]; drQOR[topAtop, reg13]; drLIQB[CardToWord[4000020000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsrBAD]];
drLIDB[40000B]; drQOR[topAtop, reg14]; drLIQB[CardToWord[10000040000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsrBAD]];
drLIDB[100000B]; drQOR[topAtop, reg15]; drLIQB[CardToWord[20000100000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsrBAD]];
Test [s] ← [s] or constant
drLIDB[10B]; drQOR[topAtop, const0];
drJNEBB[10B, UseLabel8B[qscBAD]];
drLIDB[100B]; drQOR[topAtop, const1];
drLIQB[CardToWord[600100B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qscBAD]];
drLIDB[1000B]; drQOR[topAtop, const2];
drLIQB[CardToWord[3001000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qscBAD]];
drLIDB[10000B]; drQOR[topAtop, const3];
drLIQB[CardToWord[14010000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qscBAD]];
drLIDB[100000B]; drQOR[topAtop, const4];
drLIQB[CardToWord[60100000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qscBAD]];
drLIQB[CardToWord[1000000B]]; drQOR[topAtop, const5];
drLIQB[CardToWord[301000000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qscBAD]];
drLIQB[CardToWord[10000000B]]; drQOR[topAtop, const6];
drLIQB[CardToWord[1410000000B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qsc6OK]]; SetLabel[qscBAD]; Pause[]; SetLabel[qsc6OK];
drLIQB[CardToWord[100000000B]]; drQOR[topAtop, const7];
drLIQB[CardToWord[6100000000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qscBAD]];
drLIQB[CardToWord[1000000000B]]; drQOR[topAtop, const8];
drLIQB[CardToWord[31000000000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qscBAD]];
drLIQB[CardToWord[10000000000B]]; drQOR[topAtop, const9];
drLIQB[CardToWord[10002200000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qscBAD]];
drLIQB[CardToWord[20000000B]]; drQOR[topAtop, const10];
drLIQB[CardToWord[24400000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qscBAD]];
drLIQB[CardToWord[11112222223B]]; drQOR[topAtop, const11];
drLIQB[CardToWord[11113222223B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qscBAD]];
Test [s] ← [s] or auxiliary register
drLIDB[4B]; drQOR[topAtop, aux0];
drLIQB[CardToWord[3600004B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsaBAD]];
drLIDB[20B]; drQOR[topAtop, aux1];
drLIQB[CardToWord[74000020B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsaBAD]];
drLIDB[100B]; drQOR[topAtop, aux2];
drLIQB[CardToWord[1700000100B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsaBAD]];
drLIDB[400B]; drQOR[topAtop, aux3];
drLIQB[CardToWord[36000000400B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsaBAD]];
drLIDB[2000B]; drQOR[topAtop, aux4];
drLIQB[CardToWord[6602000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsaBAD]];
drLIDB[10000B]; drQOR[topAtop, aux5];
drLIQB[CardToWord[11610000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsaBAD]];
drLIDB[40000B]; drQOR[topAtop, aux6];
drLIQB[CardToWord[63040000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsaBAD]];
drLIQB[CardToWord[200000B]]; drQOR[topAtop, aux7];
drLIQB[CardToWord[300200000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsaBAD]];
drLIQB[CardToWord[1000000B]]; drQOR[topAtop, aux8];
drLIQB[CardToWord[61000000B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qsa8OK]]; SetLabel[qsaBAD]; Pause[]; SetLabel[qsa8OK];
drLIQB[CardToWord[4000000B]]; drQOR[topAtop, aux9];
drLIQB[CardToWord[306200000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsaBAD]];
drLIQB[CardToWord[20000000B]]; drQOR[topAtop, aux10];
drLIQB[CardToWord[1424400000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsaBAD]];
drLIQB[CardToWord[100000000B]]; drQOR[topAtop, aux11];
drLIQB[CardToWord[6111000000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsaBAD]];
drLIQB[CardToWord[400000000B]]; drQOR[topAtop, aux12];
drLIQB[CardToWord[30400600000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsaBAD]];
drLIQB[CardToWord[2000000000B]]; drQOR[topAtop, aux13];
drLIQB[CardToWord[2003200000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsaBAD]];
drLIQB[CardToWord[10000000000B]]; drQOR[topAtop, aux14];
drLIQB[CardToWord[10014400000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsaBAD]];
drLIQB[CardToWord[20000000000B]]; drQOR[topAtop, aux15];
drLIQB[CardToWord[26011000000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qsaBAD]];
Test [s] ← [s] or [s]
drLIQB[CardToWord[20000000000B]];
drQOR[topAtop, topSrc];
drLIQB[CardToWord[20000000000B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qss0OK]]; Pause[]; SetLabel[qss0OK];
Test [s] ← [s] or [s]-
drLIQB[CardToWord[20000000000B]];
drQOR[topAtop, popSrc];
drAS[1]; drLIQB[CardToWord[20000000000B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qss1OK]]; Pause[]; SetLabel[qss1OK];
Test [s] ← [s] or [s-1]
drLIQB[CardToWord[22222222222B]];
drLIQB[CardToWord[12121212121B]];
drQOR[topAtop, belowSrc];
drLIQB[CardToWord[32323232323B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qss2OK]]; Pause[]; SetLabel[qss2OK];
drLIQB[CardToWord[22222222222B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qss3OK]]; Pause[]; SetLabel[qss3OK];
Test [s] ← [s] or [s-1]-
drLIQB[CardToWord[11111111111B]];
drLIQB[CardToWord[12121212121B]];
drQOR[topAtop, belowSrcPop]; drAS[1];
drLIQB[CardToWord[13131313131B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qss4OK]]; Pause[]; SetLabel[qss4OK];
drLIQB[CardToWord[11111111111B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qss5OK]]; Pause[]; SetLabel[qss5OK];
Test [s+1] ← [s] or local register
drLIDB[1B]; drQOR[pushAtop, reg0]; drLIQB[CardToWord[200001B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qprBAD]];
drDIS[];
drLIDB[2B]; drQOR[pushAtop, reg1]; drLIQB[CardToWord[400002B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qprBAD]];
drDIS[];
drLIDB[4B]; drQOR[pushAtop, reg2]; drLIQB[CardToWord[1000004B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qprBAD]];
drDIS[];
drLIDB[10B]; drQOR[pushAtop, reg3]; drLIQB[CardToWord[2000010B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qprBAD]];
drDIS[];
drLIDB[20B]; drQOR[pushAtop, reg4]; drLIQB[CardToWord[4000020B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qprBAD]];
drDIS[];
drLIDB[40B]; drQOR[pushAtop, reg5]; drLIQB[CardToWord[10000040B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qprBAD]];
drDIS[];
drLIDB[100B]; drQOR[pushAtop, reg6]; drLIQB[CardToWord[20000100B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qprBAD]];
drDIS[];
drLIDB[200B]; drQOR[pushAtop, reg7]; drLIQB[CardToWord[40000200B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qprBAD]];
drDIS[];
drLIDB[400B]; drQOR[pushAtop, reg8]; drLIQB[CardToWord[100000400B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qpr8OK]]; SetLabel[qprBAD]; Pause[]; SetLabel[qpr8OK];
drDIS[];
drLIDB[1000B]; drQOR[pushAtop, reg9]; drLIQB[CardToWord[200001000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qprBAD]];
drDIS[];
drLIDB[2000B]; drQOR[pushAtop, reg10]; drLIQB[CardToWord[400002000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qprBAD]];
drDIS[];
drLIDB[4000B]; drQOR[pushAtop, reg11]; drLIQB[CardToWord[1000004000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qprBAD]];
drDIS[];
drLIDB[10000B]; drQOR[pushAtop, reg12]; drLIQB[CardToWord[2000010000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qprBAD]];
drDIS[];
drLIDB[20000B]; drQOR[pushAtop, reg13]; drLIQB[CardToWord[4000020000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qprBAD]];
drDIS[];
drLIDB[40000B]; drQOR[pushAtop, reg14]; drLIQB[CardToWord[10000040000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qprBAD]];
drDIS[];
drLIDB[100000B]; drQOR[pushAtop, reg15]; drLIQB[CardToWord[20000100000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qprBAD]];
drDIS[];
Test [s+1] ← [s] or constant
drLIDB[10B]; drQOR[pushAtop, const0];
drJNEBB[10B, UseLabel8B[qpcBAD]];
drDIS[];
drLIDB[100B]; drQOR[pushAtop, const1];
drLIQB[CardToWord[600100B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpcBAD]];
drDIS[];
drLIDB[1000B]; drQOR[pushAtop, const2];
drLIQB[CardToWord[3001000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpcBAD]];
drDIS[];
drLIDB[10000B]; drQOR[pushAtop, const3];
drLIQB[CardToWord[14010000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpcBAD]];
drDIS[];
drLIDB[100000B]; drQOR[pushAtop, const4];
drLIQB[CardToWord[60100000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpcBAD]];
drDIS[];
drLIQB[CardToWord[1000000B]]; drQOR[pushAtop, const5];
drLIQB[CardToWord[301000000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpcBAD]];
drDIS[];
drLIQB[CardToWord[10000000B]]; drQOR[pushAtop, const6];
drLIQB[CardToWord[1410000000B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qpc6OK]]; SetLabel[qpcBAD]; Pause[]; SetLabel[qpc6OK];
drDIS[];
drLIQB[CardToWord[100000000B]]; drQOR[pushAtop, const7];
drLIQB[CardToWord[6100000000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpcBAD]];
drDIS[];
drLIQB[CardToWord[1000000000B]]; drQOR[pushAtop, const8];
drLIQB[CardToWord[31000000000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpcBAD]];
drDIS[];
drLIQB[CardToWord[10000000000B]]; drQOR[pushAtop, const9];
drLIQB[CardToWord[10002200000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpcBAD]];
drDIS[];
drLIQB[CardToWord[20000000B]]; drQOR[pushAtop, const10];
drLIQB[CardToWord[24400000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpcBAD]];
drDIS[];
drLIQB[CardToWord[11112222223B]]; drQOR[pushAtop, const11];
drLIQB[CardToWord[11113222223B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpcBAD]];
drDIS[];
Test [s+1] ← [s] or auxiliary register
drLIDB[4B]; drQOR[pushAtop, aux0];
drLIQB[CardToWord[3600004B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpaBAD]];
drDIS[];
drLIDB[20B]; drQOR[pushAtop, aux1];
drLIQB[CardToWord[74000020B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpaBAD]];
drDIS[];
drLIDB[100B]; drQOR[pushAtop, aux2];
drLIQB[CardToWord[1700000100B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpaBAD]];
drDIS[];
drLIDB[400B]; drQOR[pushAtop, aux3];
drLIQB[CardToWord[36000000400B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpaBAD]];
drDIS[];
drLIDB[2000B]; drQOR[pushAtop, aux4];
drLIQB[CardToWord[6602000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpaBAD]];
drDIS[];
drLIDB[10000B]; drQOR[pushAtop, aux5];
drLIQB[CardToWord[11610000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpaBAD]];
drDIS[];
drLIDB[40000B]; drQOR[pushAtop, aux6];
drLIQB[CardToWord[63040000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpaBAD]];
drDIS[];
drLIQB[CardToWord[200000B]]; drQOR[pushAtop, aux7];
drLIQB[CardToWord[300200000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpaBAD]];
drDIS[];
drLIQB[CardToWord[1000000B]]; drQOR[pushAtop, aux8];
drLIQB[CardToWord[61000000B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qpa8OK]]; SetLabel[qpaBAD]; Pause[]; SetLabel[qpa8OK];
drDIS[];
drLIQB[CardToWord[4000000B]]; drQOR[pushAtop, aux9];
drLIQB[CardToWord[306200000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpaBAD]];
drDIS[];
drLIQB[CardToWord[20000000B]]; drQOR[pushAtop, aux10];
drLIQB[CardToWord[1424400000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpaBAD]];
drDIS[];
drLIQB[CardToWord[100000000B]]; drQOR[pushAtop, aux11];
drLIQB[CardToWord[6111000000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpaBAD]];
drDIS[];
drLIQB[CardToWord[400000000B]]; drQOR[pushAtop, aux12];
drLIQB[CardToWord[30400600000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpaBAD]];
drDIS[];
drLIQB[CardToWord[2000000000B]]; drQOR[pushAtop, aux13];
drLIQB[CardToWord[2003200000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpaBAD]];
drDIS[];
drLIQB[CardToWord[10000000000B]]; drQOR[pushAtop, aux14];
drLIQB[CardToWord[10014400000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpaBAD]];
drDIS[];
drLIQB[CardToWord[20000000000B]]; drQOR[pushAtop, aux15];
drLIQB[CardToWord[26011000000B]];
drRJNEB[popSrc, belowSrcPop, UseLabel8B[qpaBAD]];
drDIS[];
Test [s+1] ← [s] or [s]
drLIQB[CardToWord[20000000000B]];
drQOR[pushAtop, topSrc];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qps0OK]]; Pause[]; SetLabel[qps0OK];
Test [s+1] ← [s] or [s]-
drLIQB[CardToWord[20000000000B]];
drQOR[pushAtop, popSrc]; drAS[1];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qps1OK]]; Pause[]; SetLabel[qps1OK];
Test [s+1] ← [s] or [s-1]
drLIQB[CardToWord[22222222222B]];
drLIQB[CardToWord[12121212121B]];
drQOR[pushAtop, belowSrc];
drLIQB[CardToWord[32323232323B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qps2OK]]; Pause[]; SetLabel[qps2OK];
drLIQB[CardToWord[12121212121B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qps3OK]]; Pause[]; SetLabel[qps3OK];
drDIS[];
Test [s+1] ← [s] or [s-1]-
drLIQB[CardToWord[11111111111B]];
drLIQB[CardToWord[12121212121B]];
drQOR[pushAtop, belowSrcPop]; drAS[1];
drLIQB[CardToWord[13131313131B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qps4OK]]; Pause[]; SetLabel[qps4OK];
drLIQB[CardToWord[12121212121B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[qps5OK]]; Pause[]; SetLabel[qps5OK];
drDIS[];
};
GenOR: PROC = {
or0OK: Label = GenLabel[];
or1OK: Label = GenLabel[];
or2OK: Label = GenLabel[];
orxOK: Label = GenLabel[];
SetLabel[enterORTest];
drASL[0];
drDIS[];
drLIQB[CardToWord[33333333333B]];
drLIQB[CardToWord[25252525252B]];
drLIQB[CardToWord[12525252525B]];
drOR[];
drLIQB[CardToWord[37777777777B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[or0OK]]; Pause[]; SetLabel[or0OK];
drLIQB[CardToWord[25252525252B]];
drLIQB[CardToWord[25252525252B]];
drOR[];
drLIQB[CardToWord[25252525252B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[or1OK]]; Pause[]; SetLabel[or1OK];
drLIQB[CardToWord[12525252525B]];
drLIQB[CardToWord[12525252525B]];
drOR[];
drLIQB[CardToWord[12525252525B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[or2OK]]; Pause[]; SetLabel[or2OK];
drLIQB[CardToWord[33333333333B]];
drRJEBJ[popSrc, belowSrc, UseLabel8B[orxOK]]; Pause[]; SetLabel[orxOK];
};
GenAND: PROC = {
and0OK: Label = GenLabel[];
and1OK: Label = GenLabel[];
and2OK: Label = GenLabel[];
andxOK: Label = GenLabel[];
SetLabel[enterANDTest];
drASL[0];
drDIS[];
drLIQB[CardToWord[33333333333B]];
drLIQB[CardToWord[25252525252B]];
drLIQB[CardToWord[12525252525B]];
drAND[];
drJEBBJ[0, UseLabel8B[and0OK]]; Pause[]; SetLabel[and0OK];
drLIQB[CardToWord[25252525252B]];
drLIQB[CardToWord[25252525252B]];
drAND[];
drLIQB[CardToWord[25252525252B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[and1OK]]; Pause[]; SetLabel[and1OK];
drLIQB[CardToWord[12525252525B]];
drLIQB[CardToWord[12525252525B]];
drAND[];
drLIQB[CardToWord[12525252525B]];
drRJEBJ[popSrc, belowSrcPop, UseLabel8B[and2OK]]; Pause[]; SetLabel[and2OK];
drLIQB[CardToWord[33333333333B]];
drRJEBJ[popSrc, belowSrc, UseLabel8B[andxOK]]; Pause[]; SetLabel[andxOK];
};
SetLabel[dummy];
Pause[]; Pause[]; Pause[]; Pause[]; Pause[]; Halt[123B];
Opcodes 0 and 377B are intercepted by the simulator, but make them trap to dummy here anyway.
savePC ← GetOutputPC[area];
FillTrap[ResetTrap, start];
FillXop[0, dummy];
FillXop[377B, dummy];
SetOutputPC[savePC];
WordAlign[area];
SetLabel[start]; --Simulator execution begins here on a Reset.
const0 is in a ROM, so it requires no initialization; the other constants are tested in this diagnostic and require no initialization.
drASL[255];
When there is nothing on the stack, S should be at L-1
GenROR[];
GenRXOR[];
GenRAND[];
GenRRWithROR[];
GenQAND[];
GenQRWithQOR[];
GenOR[];
GenAND[];
Halt[177777B]; --Terminate here at the end of the program
};
END.