DIRECTORY CD, CoreCompose, IO, PW, PWCore, Rope; CrossRAMDataBufferImpl: CEDAR PROGRAM IMPORTS CoreCompose, PW, PWCore EXPORTS = BEGIN OPEN CoreCompose; DataBuffer: ROPE = RegisterStructureProc[name: "DataBuffer", proc: CreateDataBuffer]; CreateDataBuffer: StructureProc = { columnOcts: INT _ GetInt[context, $columnOcts]; cellType _ CreateSequenceCell[ name: DataBuffer, baseCell: CreateStructure[name: "DataBufferBit", context: context], count: columnOcts, sequencePorts: "Bit, nBit, DataB"]; PWCore.SetArrayX[cellType: cellType]; }; DataBufferBit: ROPE = RegisterStructureProc[name: "DataBufferBit", proc: CreateDataBufferBit]; CreateDataBufferBit: StructureProc = { cellType _ CreateRecordCell[ name: DataBufferBit, context: context, public: CreateWires[context, "Vdd, Gnd, WriteB, nWriteB, ReadB, nReadB, DataB, Select[SEQ:select], Bit[SEQ:select], nBit[SEQ:select]"], instances: LIST [ [type: CreateStructure[name: "DataBufferOct", context: context]], [type: CreateStructure[name: "DecoderStitch", context: context]] ]]; PWCore.SetAbutX[cellType: cellType]; }; DataBufferOct: ROPE = RegisterStructureProc[name: "DataBufferOct", proc: CreateDataBufferOct]; CreateDataBufferOct: StructureProc = { cellType _ CreateRecordCell[ name: DataBufferOct, context: context, public: CreateWires[context, "Vdd, Gnd, WriteB, nWriteB, ReadB, nReadB, DataB, Select[SEQ:select], Bit[SEQ:select], nBit[SEQ:select]"], onlyInternal: CreateWires[context, "Buffer, nBuffer"], instances: LIST [ [type: CreateStructure[name: "BitLineConnectSeq", context: context]], [type: CreateStructure[name: "DataBufferMux", context: context]], [type: CreateStructure[name: "DataBufferMuxBit", context: context]], [type: CreateStructure[name: "BitDrive", context: context]] ]]; PWCore.SetAbutY[cellType: cellType]; }; DataBufferMuxBit: ROPE = RegisterStructureProc[name: "DataBufferMuxBit", proc: CreateDataBufferMux]; CreateDataBufferMux: StructureProc = { select: INT _ GetInt[context, $select]; static: BOOL _ GetBool[context, $static]; cellType _ CreateRecordCell[ name: DataBufferMuxBit, context: context, public: CreateWires[context, "Gnd, Buffer, nBuffer, Select[seq: select], Bit[seq: select], nBit[seq: select]"], instances: LIST [ [type: CreateStructure[name: "BitMuxEnd", context: context], -- just a PW.Get actual: "Select: Select[0], Bit: Bit[0], nBit: nBit[0]"], [type: CreateStructure[name: "BitMuxSeq", context: context], actual: "Select: Select[start: 1, len: select-1], Bit: Bit[start: 1, len: select-1], nBit: nBit[start: 1, len: select-1]"]]]; PWCore.SetAbutX[cellType: cellType]; }; BitMuxSeq: ROPE = RegisterStructureProc[name: "BitMuxSeq", proc: CreateBitMuxSeq]; CreateBitMuxSeq: StructureProc = { select: INT _ GetInt[context, $select]; cellType _ CreateSequenceCell[ name: BitMuxSeq, baseCell: CreateStructure[name: "BitMux", context: context], -- just a PW.Get count: select-1, sequencePorts: "Select, Bit, nBit"]; PWCore.SetArrayX[cellType: cellType]; }; BitMuxBit: ROPE = RegisterStructureProc[name: "BitMuxBit", proc: CreateBitMuxBit]; CreateBitMuxBit: StructureProc = { static: BOOL _ GetBool[context, $static]; cellType _ CreateRecordCell[ name: BitMuxBit, context: context, public: CreateWires[context, "Gnd, Select, Bit, nBit, Buffer, nBuffer"], instances: LIST [ [type: CreateTransistor[name: "Transistor", type: nE], actual: "gate: Select, ch1: Bit, ch2: Buffer"], [type: CreateTransistor[name: "Transistor", type: nE], actual: "gate: Select, ch1: nBit, ch2: nBuffer"]] ]; }; DataBufferMux: ROPE = RegisterStructureProc[name: "DataBufferMux", proc: CreateDataBufferMuxSelect]; CreateDataBufferMuxSelect: StructureProc = { select: INT _ GetInt[context, $select]; DataBufferMuxLayout: PROC[] RETURNS [obj: PW.Object] = { DataBufferMuxSelect: PW.XYFunction ={ resultingOb _ SELECT TRUE FROM y>x => BitSelNoPoly, y=x => BitSelContact, y BitSelPoly, ENDCASE => ERROR; }; design: CD.Design _ NARROW[GetRef[context, $sourceCDDesign]]; BitSelNoPoly: PW.Object _ PW.Get[design, "BitSelNoPoly"]; BitSelContact: PW.Object _ PW.Get[design, "BitSelContact"]; BitSelPoly: PW.Object _ PW.Get[design, "BitSelPoly"]; obj _ PW.MapFunction[NIL, DataBufferMuxSelect, 0, select, 0, select]; }; cellType _ CreateRecordCell[ name: DataBufferMux, context: context, public: CreateWires[context, "Gnd, Select[seq: select], Bit[seq: select], nBit[seq: select]"] ]; PWCore.SetLayout[cellType: cellType, cdObject: DataBufferMuxLayout[]]; }; BitDrive: ROPE = RegisterStructureProc[name: "BitDrive", proc: CreateBitDrive]; CreateBitDrive: StructureProc = { cellType _ CreateRecordCell[ name: BitDrive, context: context, public: CreateWires[context, "Vdd, Gnd, WriteB, nWriteB, ReadB, nReadB, DataB, Buffer, nBuffer"], onlyInternal: CreateWires[context, "ndatab"], instances: LIST [ [type: CreateStructure[name: "Inverter", context: context], actual: "Input: DataB, Output: ndatab"], [type: CreateStructure[name: "TristateBuffer", context: context], actual: "nInput: nBuffer, Drive: ReadB, nDrive: nReadB, Output: DataB"], [type: CreateStructure[name: "TristateBuffer", context: context], actual: "nInput: DataB, Drive: WriteB, nDrive: nWriteB, Output: nBuffer"], [type: CreateStructure[name: "TristateBuffer", context: context], actual: "nInput: ndatab, Drive: WriteB, nDrive: nWriteB, Output: Buffer"]]]; PWCore.SetGet[cellType: cellType, source: NARROW[GetRef[context, $sourceCDDesign]]]; }; BitLineConnectSeq: ROPE = RegisterStructureProc[name: "BitLineConnectSeq", proc: CreateBitLineConnectSeq]; CreateBitLineConnectSeq: StructureProc = { select: INT _ GetInt[context, $select]; cellType _ CreateSequenceCell[ name: BitLineConnectSeq, baseCell: CreateStructure[name: "BitLineConnect", context: context], count: select, sequencePorts: "Bit, nBit"]; PWCore.SetArrayX[cellType: cellType]; }; BitLineConnect: ROPE = RegisterStructureProc[name: "BitLineConnect", proc: CreateBitLineConnect]; CreateBitLineConnect: StructureProc = { cellType _ CreateRecordCell[ name: BitLineConnect, context: context, public: CreateWires[context, "Gnd, Bit, nBit"]]; PWCore.SetGet[cellType: cellType, source: NARROW[GetRef[context, $sourceCDDesign]]]; }; DecoderStitch: ROPE = RegisterStructureProc[name: "DecoderStitch", proc: CreateDecoderStitch]; CreateDecoderStitch: StructureProc = { select: INT _ GetInt[context, $select]; cellType _ CreateRecordCell[ name: DecoderStitch, context: context, public: CreateWires[context, "Vdd, Gnd, WriteB, nWriteB, ReadB, nReadB, Select[seq: select]"]]; PWCore.SetGet[cellType: cellType, source: NARROW[GetRef[context, $sourceCDDesign]]]; }; END. ˜CrossRAMDataBufferImpl.mesa Copyright c 1985 by Xerox Corporation. All rights reserved. Barth, September 20, 1985 2:12:36 pm PDT Louis Monier October 28, 1985 8:34:19 am PST Ports: Vdd, Gnd, WriteB, nWriteB, ReadB, nReadB, DataB, Select[0..select), Bit[0..select), nBit[0..select) Ports: Vdd, Gnd, WriteB, nWriteB, ReadB, nReadB, DataB, Select[0..select), Bit[0..select), nBit[0..select) Ports: Gnd, Select[0..select), Bit[0..select), nBit[0..select), Buffer, nBuffer Ports: Gnd, Select, Bit, nBit, Buffer, nBuffer Ports: Gnd, Select[0..select), Bit[0..select), nBit[0..select) CreateDataBufferMuxSelect: PUBLIC PROC [design: Design, select: NAT] RETURNS [cell: CellType] = { bitSel: CellType _ CreateBitSel[design: design]; muxCellType[BitSelNoPoly] _ CreateIdentityCell[design: design, name: "BitSelNoPoly", baseCell: bitSel, attribute: [$GenLayout, $Get]]; muxCellType[BitSelContact] _ CreateIdentityCell[design: design, name: "BitSelContact", baseCell: bitSel, attribute: [$GenLayout, $Get]]; muxCellType[BitSelPoly] _ CreateBitSelPoly[design: design]; cell _ CoreMapFunction.Create[ name: name, publicWire: CoreOps.CreateRecordWire[components: LIST [ CoreOps.CreateAtomWire[name: "Gnd"], CoreOps.CreateSequenceWire[name: "Select", base: CoreOps.CreateAtomWire[], count: select], CoreOps.CreateSequenceWire[name: "Bit", base: CoreOps.CreateAtomWire[], count: select], CoreOps.CreateSequenceWire[name: "nBit", base: CoreOps.CreateAtomWire[], count: select]]], args: muxCellType]; CoreOps.InsertCellType[design: design, cellType: cell]; PutAttributeOnCell[design: design, on: cell, attribute: [$GenLayout, $MapFn]]; }; BitSelNoPoly: NAT = 0; BitSelContact: NAT = 1; BitSelPoly: NAT = 2; MuxSelect: CoreMapFunction.XYFn = { IF y>x THEN RETURN[BitSelNoPoly]; IF y=x THEN RETURN[BitSelContact]; IF y™>Kšœžœ6 œ˜dš œ˜,Kšœžœ˜'š œžœžœžœ˜8š œžœ˜%šœžœžœž˜Kšœ˜Kšœ˜Kšœ˜Kšžœžœ˜—Kšœ˜—Kšœžœ žœ#˜=Kšœžœ žœ˜9Kšœžœ žœ˜;Kšœžœ žœ˜5Kšœžœ žœ-˜EKšœ˜—šœ˜Kšœ˜K˜Kšœ]˜]Kšœ˜—KšœF˜FKšœ˜K˜—J™š œžœžœžœžœ™aKšœ0™0Kšœ†™†Kšœˆ™ˆKšœ;™;šœ™Kšœ™šœ1žœ™7Kšœ$™$KšœZ™ZKšœW™WKšœZ™Z—Kšœ™—Kšœ7™7KšœN™NKšœ™K™—Kšœžœ™Kšœžœ™Kšœžœ™K™šœ#™#Kšžœžœžœ™!Kšžœžœžœ™"Kšžœžœžœ ™K™K™—JšœG™GKšœ žœA˜Oš œ˜!šœ˜Kšœ˜K˜Kšœa˜aKšœ-˜-šœžœ˜šœ;˜;Kšœ)˜)—šœA˜AKšœI˜I—šœA˜AKšœK˜K—šœA˜AKšœL˜L———Kšœ*žœ$˜TKšœ˜K˜—Jšœ™š œžœžœ™@Jšœžœ™šžœ"žœžœ™.Kšœ4™4Kšœ7žœ"™]K™—Kšœ™K™—Jšœ+™+š œžœžœ™DJšœžœ™šžœ"žœžœ™.KšœS™SKšœ7žœ1™lK™—Kšœ™K™—KšœžœS˜jš œ˜*Kšœžœ˜'šœ˜Kšœ˜KšœD˜DKšœ˜Kšœ˜—Kšœ%˜%Kšœ˜K˜—Jšœ™KšœžœM˜aš œ˜'šœ˜Kšœ˜K˜Kšœ0˜0—Kšœ*žœ$˜TKšœ˜K˜—JšœB™BKšœžœK˜^š œ˜&Kšœžœ˜'šœ˜Kšœ˜K˜Kšœ_˜_—Kšœ*žœ$˜TKšœ˜K˜—Kšžœ˜K˜—…—ª+þ