
    <<CrossRAMBottomImpl.mesa>>
        <<Copyright © 1985 by Xerox Corporation.  All rights reserved.>>
        <<Barth, October 15, 1985 3:44:55 pm PDT>>
        <<Louis Monier October 23, 1985 4:50:52 pm PDT>>
        <<>>
    DIRECTORY Core, CoreCompose, PWCore;

    CrossRAMBottomImpl: CEDAR PROGRAM
        IMPORTS CoreCompose, PWCore
        EXPORTS  = 
        BEGIN OPEN CoreCompose;

    <<columnOcts, addressDecoderBits: INT>>
    Bottom: ROPE = RegisterStructureProc[name: "Bottom", proc: CreateBottom];
    CreateBottom: StructureProc = {
        cellType _ CreateRecordCell[
            name: Bottom,
            context: context,
            public: CreateWires[context, "Vdd, nPrechargeB, AccessB, Bit[SEQ:8*columnOcts], nBit[SEQ:8*columnOcts]"],
            instances: LIST [
                [type: CreateStructure[name: "BottomDecoderLeft", context: context]],
                [type: CreateStructure[name: "DecoderSeq", context: context]],
                [type: CreateStructure[name: "BottomDecoderRight", context: context]],
                [type: CreateStructure[name: "Precharge", context: context]],
                [type: CreateStructure[name: "BottomRight", context: context]]]];
        PWCore.SetAbutX[cellType: cellType];
        };

<<Ports: Vdd>>
    DecoderSeq: ROPE = RegisterStructureProc[name: "DecoderSeq", proc: CreateDecoderSeq];
    CreateDecoderSeq: StructureProc = {
        cellType _ CreateSequenceCell[
            name: DecoderSeq,
            baseCell: CreateStructure[name: "BottomDecoder", context: context],
            count: GetInt[context: context, prop: $addressDecoderBits]];
        PWCore.SetArrayX[cellType: cellType];
        };

    BottomDecoder: ROPE = RegisterStructureProc[name: "BottomDecoder", proc: CreateBottomDecoder];
    CreateBottomDecoder: StructureProc = {
        cellType _ CreateRecordCell[
            name: BottomDecoder,
            context: context,
            public: CreateWires[context, "Vdd"]];
        PWCore.SetGet[cellType: cellType, source: NARROW[GetRef[context, $sourceCDDesign]]];
        };

    BottomDecoderLeft: ROPE = RegisterStructureProc[name: "BottomDecoderLeft", proc: CreateBottomDecoderLeft];
    CreateBottomDecoderLeft: StructureProc = {
        cellType _ CreateRecordCell[
            name: BottomDecoderLeft,
            context: context,
            public: CreateWires[context, "Vdd"]];
        PWCore.SetGet[cellType: cellType, source: NARROW[GetRef[context, $sourceCDDesign]]];
        };

    BottomDecoderRight: ROPE = RegisterStructureProc[name: "BottomDecoderRight", proc: CreateBottomDecoderRight];
    CreateBottomDecoderRight: StructureProc = {
        cellType _ CreateRecordCell[
            name: BottomDecoderRight,
            context: context,
            public: CreateWires[context, "Vdd, nPrechargeB, AccessB"]];
        PWCore.SetGet[cellType: cellType, source: NARROW[GetRef[context, $sourceCDDesign]]];
        };

    BottomRight: ROPE = RegisterStructureProc[name: "BottomRight", proc: CreateBottomRight];
    CreateBottomRight: StructureProc = {
        cellType _ CreateRecordCell[
            name: BottomRight,
            context: context,
            public: CreateWires[context, "Vdd"]];
        PWCore.SetGet[cellType: cellType, source: NARROW[GetRef[context, $sourceCDDesign]]];
        };

<<Ports: Vdd, nPrechargeB, Bit[0..8*columnOcts), nBit[0..8*columnOcts)>>
    Precharge: ROPE = RegisterStructureProc[name: "Precharge", proc: CreatePrecharge];
    CreatePrecharge: StructureProc = {
        cellType _ CreateSequenceCell[
            name: Precharge,
            baseCell: CreateStructure[name: PrechargeOctStitch, context: context],
            count: GetInt[context: context, prop: $columnOcts],
            sequencePorts: "Bit, nBit"];
        PWCore.SetArrayX[cellType: cellType];
        };

    PrechargeOctStitch: ROPE = RegisterStructureProc[name: "PrechargeOctStitch", proc: CreatePrechargeOctStitch];
    CreatePrechargeOctStitch: StructureProc = {
        cellType _ CreateRecordCell[
            name: PrechargeOctStitch,
            context: context,
            public: CreateWires[context, "Vdd, nPrechargeB, Bit[SEQ:8], nBit[SEQ:8]"],
            instances: LIST [
                [type: CreateStructure[name: "PrechargeOct", context: context]],
                [type: CreateStructure[name: "PrechargeStich", context: context]]]];
        PWCore.SetAbutX[cellType: cellType];
        };

<<Ports: Vdd, nPrechargeB, Bit[0..8), nBit[0..8)>>
    PrechargeOct: ROPE = RegisterStructureProc[name: "PrechargeOct", proc: CreatePrechargeOct];
    CreatePrechargeOct: StructureProc = {
        cellType _ CreateSequenceCell[
            name: PrechargeOct,
            baseCell: CreateStructure[name: "PrechargeSlice", context: context],
            count: 8,
            sequencePorts: "Bit, nBit"];
        PWCore.SetArrayX[cellType: cellType];
        };

    PrechargeStich: ROPE = RegisterStructureProc[name: "PrechargeStich", proc: CreatePrechargeStitch];
    CreatePrechargeStitch: StructureProc = {
        cellType _ CreateRecordCell[
            name: PrechargeStich,
            context: context,
            public: CreateWires[context, "Vdd, nPrechargeB"]];
        PWCore.SetGet[cellType: cellType, source: NARROW[GetRef[context, $sourceCDDesign]]];
        };

    PrechargeSlice: ROPE = RegisterStructureProc[name: "PrechargeSlice", proc: CreatePrechargeSlice];
    CreatePrechargeSlice: StructureProc = {
        peTranType: Core.CellType _ CreateTransistor[name: "Transistor", type: pE];
        cellType _ CreateRecordCell[
            name: PrechargeSlice,
            context: context,
            public: CreateWires[context, "Vdd, nPrechargeB, Bit, nBit"],
            instances: LIST [
                [actual: "gate: nPrechargeB, ch1: Bit, ch2: Vdd",
                    type: peTranType],
                [actual: "gate: nPrechargeB, ch1: nBit, ch2: Vdd",
                    type: peTranType]]];
        PWCore.SetGet[cellType: cellType, source: NARROW[GetRef[context, $sourceCDDesign]]];
        };

    END.