CIRCUIT[Lambda _ 1, Temp _ 100] = { Vdd: node; powerSupply: voltage[Vdd, Gnd] = 5.0; ! ThymeBasics.thy ! CMOS2.0u100C.thy Data, DataI, PDataI, NDataI, nData: node; Q1: CTran[Data, Vdd, nData | W _ 8]; Q2: ETran[Data, nData, Gnd | W _ 64]; Q3: CTran[Gnd, Vdd, PDataI | W _ 32]; Q4: CTran[nData, PDataI, DataI | W _ 32]; Q5: ETran[nData, DataI, NDataI | W _ 16]; Q6: ETran[Vdd, NDataI, Gnd | W _ 16]; C1: capacitor[DataI, Gnd] = 1pF; ?: RectWave[Data | OnLevel _ 2V, OffLevel _ 0.8V, period _ 100ns, width _ 50ns, tRise _ 10ns, tFall _ 10ns, tDelay _ 20ns]; }; PLOT["CrossRAM input buffer", :1ns, -1, 6, Data, DataI, PDataI, NDataI, nData, powerSupply^:-1mA]; RUN[tMax _ 100ns]; `CrossRAMInput.thy Last Edited by: Barth, October 4, 1984 1:43:54 pm PDT Pad Input Buffer ÊÌ˜Jšœ™Jšœ5™5J˜šÏkœ˜#J˜ J˜%J˜J˜JšœÏsœ˜J˜™J˜J˜)J˜Jšœœ˜%Jšœœ˜%Jšœœ˜%Jšœ!œ˜*Jšœ!œ˜)Jšœœ˜%J˜ JšœœœK˜{J˜—J˜J˜—Jšœ^˜bJšœ˜—…—°Ü