DIRECTORY ChipCreate, IO, CoreTransistor; TransistorImpl: CEDAR PROGRAM IMPORTS ChipCreate, IO EXPORTS CoreTransistor = BEGIN OPEN ChipCreate, CoreTransistor; CreateTransistor: PUBLIC PROC [design: Design, type: TransistorType _ nE, width: NAT _ 4, length: NAT _ 2] RETURNS [t: CellType] = { typeNames: ARRAY TransistorType OF ROPE _ ["nE", "pE"]; name: ROPE _ IO.PutFR["Transistor%g%g/%g", IO.rope[typeNames[type]], IO.int[width], IO.int[length]]; IF (t _ LookupCellType[design, name])=NIL THEN { t _ CreateRecordCellType[design: design, cellTypeName: name, attributes: LIST[[$Behave, NIL]]]; CreatePort[on: t, name: "gate", attributes: LIST[[$BhvSwitch, NIL], [$StcIn, NIL]]]; CreatePort[on: t, name: "ch1", direction: bidirectional, attributes: LIST[[$BhvSwitch, NIL], [$StcBidir, NIL]]]; CreatePort[on: t, name: "ch2", direction: bidirectional, attributes: LIST[[$BhvSwitch, NIL], [$StcBidir, NIL]]]; }; }; END. CoreTransistorImpl.mesa Copyright c 1985 by Xerox Corporation. All rights reserved. Last Edited by: Barth, July 10, 1985 4:09:23 pm PDT Κt– "cedar" style˜Icodešœ™Kšœ Οmœ1™<™3K™—K˜šΟk œ˜ Kšœ žœ˜—K˜•StartOfExpansion[]šΟbœžœž˜Kšžœ žœ˜Kšžœ˜Kšžœžœ˜&—K˜š Οnœžœžœ4žœžœžœ˜„Kšœ žœžœžœ˜7Jš œžœžœžœžœ žœ˜dšžœ$žœžœ˜0KšœIžœ žœ˜_Kšœ,žœžœ žœ˜TKšœEžœžœžœ˜pKšœEžœžœžœ˜pK˜—Kšœ˜K˜—K˜Kšžœ˜K˜—…—ž’