<> <> <> <> DIRECTORY Atom, Dragon, DragonRosemary, DragOpsCross, DragOpsCrossUtils, LizardRosemary; LizardRosemaryCheckSynchImpl: CEDAR PROGRAM IMPORTS Atom, DragonRosemary, LizardRosemary, DragOpsCrossUtils = BEGIN OPEN LizardRosemary; CSynch: PROC [ lizardSimRef: REF Simulation, clusterInst: ClusterInst ] RETURNS [deltaInstrCount: INT _ 1] -- LizardRosemary.CheckSynchProc -- = BEGIN CheckAInB: PROC [ a, b: REF ANY ] = BEGIN FOR la: LIST OF REF ANY _ NARROW[a, LIST OF REF ANY], la.rest WHILE la#NIL DO WITH la.first SELECT FROM rsa: RegStore => { IF rsa.instr LOOP; euMAR => LOOP; -- haven't quite got this synchronized yet ENDCASE => -- look for it in the other list FOR lb: LIST OF REF ANY _ NARROW[b, LIST OF REF ANY], lb.rest DO IF lb = NIL THEN GOTO NotFound; WITH lb.first SELECT FROM rsb: RegStore => { IF rsb.instr IF ctb.instr NULL; REPEAT NotFound=> DragonRosemary.Assert[FALSE, "Cluster & Rosemary disagree on register store"]; ENDLOOP; }; cta: CacheTrans => IF cta.instr NULL; ENDLOOP; END; -- of CheckAInB sim: Simulation; IF clusterInst.instr >= 0 THEN { <> IF (sim _ lizardSimRef^) # NIL THEN { <> SELECT clusterInst.trapPC FROM reschedulePC => { -- Get Lizard to Reschedule on the next instruction status: DragOpsCross.IFUStatusRec _ LOOPHOLE[sim.processor.regs[ifuStatus]]; status.reschedule _ TRUE; sim.processor.regs[ifuStatus] _ LOOPHOLE[status]; deltaInstrCount _ 0; -- Lizard doesn't generate a trapped instruction for Reschedule }; ENDCASE => { lizardNewPC: Dragon.Word _ DragOpsCrossUtils.WordToCard[sim.processor.regs[ifuPC]]; DragonRosemary.Assert[ sim.processor.stats.instructions = clusterInst.instr , "Cluster & Lizard instruction counts disagree"]; DragonRosemary.Assert[ lizardNewPC = clusterInst.pc , "Cluster & Lizard PC's disagree"]; DoInstruction[sim]; CheckAInB[a: Atom.GetProp[$Cluster, $RegStores], b: sim.lastInstrOps]; CheckAInB[a: sim.lastInstrOps, b: Atom.GetProp[$Cluster, $RegStores]]; DragonRosemary.Assert[ (sim.control=doAbort) = clusterInst.trapped, "Cluster & Lizard disagree about trap"]; IF clusterInst.trapped THEN deltaInstrCount _ 0; }; }; IF clusterInst.op = x377B AND clusterInst.alpha = 0FFH AND clusterInst.beta = 0FFH THEN ERROR SuccessHalt; IF (clusterInst.op = dTrap) OR (clusterInst.op = x377B) THEN SIGNAL Breakpoint; }; END; reschedulePC: Dragon.HexWord = DragOpsCrossUtils.TrapIndexToBytePC[RescheduleTrap]; ifuPageFaultPC: Dragon.HexWord = DragOpsCrossUtils.TrapIndexToBytePC[IFUPageFaultTrap]; LizardRosemary.csProcRec.proc _ CSynch; END.