Rope;

BEGIN

The Petit Dolphin Chip Tester can test 120 pins in a device-under-test, and it tests each pin identically. Corresponding to each pin are two buffered output registers, called A and B, one buffered input register, called I, and a disable register, called D. The signal A=B is gated to the pin if D is false. The three buffered registers are loaded from/into their buffers by a strobe pulse S. S passes through one fixed and two programmable delay lines: an (essentially) fixed one for A, a programmable one for B, and a programmable one for I. The clock that copies A's buffer to A arrives first, followed in some order by the clock that copies B's buffer to B and the clock that copies the pin states into I. By this means a modest amount of dynamic timing can be generated and deduced.

Byte: TYPE = [0..377B];

Channel: TYPE = [0..119];

ByteIndex: TYPE = [0..LAST[Channel]/8];

WordIndex: TYPE = [0..LAST[Channel]/16];

ChannelVec: TYPE = PACKED ARRAY Channel OF BOOL ← ALL[FALSE];

ChannelVecRef: TYPE = REF READONLY ChannelVec ← NIL;

RWChannelVecRef: TYPE = REF ChannelVec ← NIL;

trues, falses: ChannelVecRef;

ChannelByteVec: TYPE = PACKED ARRAY ByteIndex OF Byte ← ALL[0];

ChannelWordVec: TYPE = PACKED ARRAY WordIndex OF WORD ← ALL[0];

NSec: TYPE = INT;

TesterOb: TYPE = RECORD [

Tester: TYPE = REF TesterOb;

Initialize: PROC [t: Tester, aToB, aToI: NSec ← 100];

PutABDelay, PutAIDelay: PROC [ t: Tester, d: NSec ];

PutDisables, PutABuf, PutBBuf: PROC [ t: Tester, p: ChannelVecRef, makeBufWindow: BOOL ← FALSE ] RETURNS [ window: Tester ];

GetDisables, GetABuf, GetBBuf, GetIBuf: PROC [ t: Tester ] RETURNS [ ChannelVecRef ];

Step: PROC [ t: Tester ];

CheckResult: TYPE = RECORD [checkId: NAT, window: Tester];

CheckI: PROC [ t: Tester, expected: ChannelVecRef, mask: ChannelVecRef ← NIL, makeBufWindow: BOOL ← FALSE ] RETURNS [CheckResult];

CheckFailure: ERROR [ checkId: CARDINAL, mask, expected, was: ChannelVecRef, errChannel: Channel ];

IllegalOp: ERROR;

This first tester operates the tester in immediate mode: calling the procedure operates the tester right now. This immediate mode is completely general, but the speed at which successive put's and step's can be issued is limited to the speed at which the Dolphin can execute Cedar. This may be too slow to test chips with dynamic latches, especially in view of Cedar's interrupt processing. When it is necessary to issue successive put's and step's rapidly, see the buffered mode below.

OpenTester: PROC [ server: Rope.ROPE ← NIL -- NIL means this machine -- ]
RETURNS [ Tester ];

This second tester provides a buffer within which operations are saved for rapid execution by the ExecuteTesterBuffer procedure. These buffers conform to the specifications of the Dolphin ccaKludge instruction, whose microcode is in MesaIO.mc (see Fiala). The major limitation is that with the ccaKludge instruction you cannot ask about the results of the steps (except for the last one); you must predict the results (under a mask), and step execution will halt if masked prediction and reality do not match. This is fine for testing but not so good for debugging. During the building of a buffer, getIBuf has no meaning; after execution it is the value of i after the last successful step.

If you make a buffer window from PutDisables, PutABuf, PutBBuf, or CheckI, then you can subsequently do the same operation to that window, which will immediately modify the appropriate place in the buffer. This is useful where you have a complicated test sequence with a few variables, such as address and data in a RAM test. There you might set up a buffer with two windows: a PutABuf one for address and CheckI one for check data. Then to check a location you would do a PutABuf to the first window, a CheckI to the second, and an ExecuteTesterBuffer to the whole buffer.

OpenBuffer: PROC [ base: Tester ← NIL ] RETURNS [ Tester ];

ExecuteBuffer: PROC [ t: Tester ];

These procedures map from socket pins on the multi-socket PC board that attaches to the front of the tester to tester channels.

DIP: PROC [pin: [1..120], size: [1..120] ← 120, pin1: [1..60] ← 1] RETURNS [Channel];

DIP8: PROC [pin: [1..8]] RETURNS [Channel] = INLINE {RETURN[DIP[pin, 8]]};

DIP14: PROC [pin: [1..14]] RETURNS [Channel] = INLINE {RETURN[DIP[pin, 14]]};

DIP16: PROC [pin: [1..16]] RETURNS [Channel] = INLINE {RETURN[DIP[pin, 16]]};

DIP20: PROC [pin: [1..20]] RETURNS [Channel] = INLINE {RETURN[DIP[pin, 20]]};

DIP22: PROC [pin: [1..22]] RETURNS [Channel] = INLINE {RETURN[DIP[pin, 22]]};

DIP24: PROC [pin: [1..24]] RETURNS [Channel] = INLINE {RETURN[DIP[pin, 24]]};

DIP28: PROC [pin: [1..28]] RETURNS [Channel] = INLINE {RETURN[DIP[pin, 28]]};

DIP40: PROC [pin: [1..40]] RETURNS [Channel] = INLINE {RETURN[DIP[pin, 40]]};

DIP48: PROC [pin: [1..48]] RETURNS [Channel] = INLINE {RETURN[DIP[pin, 48]]};

DIP64: PROC [pin: [1..64]] RETURNS [Channel] = INLINE {RETURN[DIP[pin, 64]]};

StaggeredDIP64: PROC [pin: [1..64]] RETURNS [Channel];

Leadless84: PROC [pin: [1..84]] RETURNS [Channel];

PinGridArray132: PROC [pin: [1..132]] RETURNS [Channel];

END.