--CacheMCtlSequencer.Mesa
--created by RoseTranslate from CacheMCtlSequencer.Rose of May 30, 1984 4:28:12 pm PDT for Barth.pa at May 30, 1984 4:29:11 pm PDT


DIRECTORY
RoseTypes, RoseCreate, BitOps, Dragon;

CacheMCtlSequencer: CEDAR PROGRAM
IMPORTS RoseCreate =

BEGIN OPEN
RoseTypes, BitOps;

--Signal Type decls
PBusFaults: TYPE = Dragon.PBusFaults;
PBusCommands: TYPE = Dragon.PBusCommands;
MBusCommands: TYPE = Dragon.MBusCommands;
GetAddressCommands: TYPE = {VictimReal, RefRealMap, RefRealAssemble, RefVirtual};


RegisterCells: PROC =
BEGIN
CreateMCtlSequencerPorts[];
[] _ RoseCreate.RegisterCellClass[className: "MCtlSequencer",
expandProc: NIL,
ioCreator: CreateMCtlSequencerIO, initializer: InitializeMCtlSequencer,
evals: [EvalSimple: MCtlSequencerEvalSimple],
blackBox: NIL, stateToo: NIL,
ports: MCtlSequencerPorts,
drivePrototype: NEW [MCtlSequencerDrive]];
END;

CreateMCtlSequencerPorts: PROC = {MCtlSequencerPorts _ RoseCreate.PortsFromFile["CacheMCtlSequencer.MCtlSequencer.rosePorts"]};

MCtlSequencerIORef: TYPE = REF MCtlSequencerIORec;
MCtlSequencerIORec: TYPE = MACHINE DEPENDENT RECORD [
fill0(0:0..14): [0..32767],
Vdd(0:15..15): BOOLEAN,
fill1(1:0..14): [0..32767],
Gnd(1:15..15): BOOLEAN,
fill2(2:0..14): [0..32767],
LatchBias(2:15..15): BOOLEAN,
fill3(3:0..14): [0..32767],
PhAb(3:15..15): BOOLEAN,
fill4(4:0..14): [0..32767],
PhBb(4:15..15): BOOLEAN,
fill5(5:0..14): [0..32767],
PhAh(5:15..15): BOOLEAN,
fill6(6:0..14): [0..32767],
PhBh(6:15..15): BOOLEAN,
fill7(7:0..14): [0..32767],
Resetb(7:15..15): BOOLEAN,
fill8(8:0..14): [0..32767],
nVirtualMatch(8:15..15): BOOLEAN,
fill9(9:0..14): [0..32767],
nMatchPageClean(9:15..15): BOOLEAN,
fill10(10:0..14): [0..32767],
nMatchCellShared(10:15..15): BOOLEAN,
fill11(11:0..14): [0..32767],
nMapValid(11:15..15): BOOLEAN,
fill12(12:0..14): [0..32767],
nRealMatch(12:15..15): BOOLEAN,
fill13(13:0..14): [0..32767],
nVictimClean(13:15..15): BOOLEAN,
fill14(14:0..14): [0..32767],
MDoneAB(14:15..15): BOOLEAN,
fill15(15:0..14): [0..32767],
MHeldAB(15:15..15): BOOLEAN,
fill16(16:0..12): [0..8191],
MFaultAB(16:13..15): PBusFaults,
fill17(17:0..14): [0..32767],
PKillRequestB(17:15..15): BOOLEAN,
fill18(18:0..11): [0..4095],
PCmdToMAB(18:12..15): PBusCommands,
fill19(19:0..14): [0..32767],
DoShiftBA(19:15..15): BOOLEAN,
fill20(20:0..14): [0..32767],
DoExecuteBA(20:15..15): BOOLEAN,
fill21(21:0..14): [0..32767],
DoHoldBA(21:15..15): BOOLEAN,
MDataI(22:0..31): ARRAY [0..2) OF CARDINAL,
fill23(24:0..14): [0..32767],
MDataDrive(24:15..15): BOOLEAN,
fill24(25:0..14): [0..32767],
MDataIDrive(25:15..15): BOOLEAN,
fill25(26:0..14): [0..32767],
MDataPipeBypass(26:15..15): BOOLEAN,
fill26(27:0..14): [0..32767],
MDataPipeTransfer(27:15..15): BOOLEAN,
fill27(28:0..11): [0..4095],
MCmdIn(28:12..15): MBusCommands,
fill28(29:0..11): [0..4095],
MCmdOutBA(29:12..15): MBusCommands,
fill29(30:0..14): [0..32767],
MCmdDrive(30:15..15): BOOLEAN,
fill30(31:0..14): [0..32767],
MCmdDriveToDataTransport(31:15..15): BOOLEAN,
fill31(32:0..14): [0..32767],
MCmdDriveToNoOp(32:15..15): BOOLEAN,
fill32(33:0..14): [0..32767],
MNSharedSenseBA(33:15..15): BOOLEAN,
fill33(34:0..14): [0..32767],
MNSharedDriveHigh(34:15..15): BOOLEAN,
fill34(35:0..14): [0..32767],
MNSharedDriveLow(35:15..15): BOOLEAN,
fill35(36:0..14): [0..32767],
MNErrorDriveLow(36:15..15): BOOLEAN,
fill36(37:0..14): [0..32767],
MReadySense(37:15..15): BOOLEAN,
fill37(38:0..14): [0..32767],
MRqIBA(38:15..15): BOOLEAN,
fill38(39:0..14): [0..32767],
MNewRqIBA(39:15..15): BOOLEAN,
fill39(40:0..14): [0..32767],
MNewRqEnableBA(40:15..15): BOOLEAN,
fill40(41:0..14): [0..32767],
MGntSense(41:15..15): BOOLEAN,
fill41(42:0..14): [0..32767],
ShiftEqual(42:15..15): BOOLEAN,
fill42(43:0..14): [0..32767],
nShiftEqual(43:15..15): BOOLEAN,
fill43(44:0..14): [0..32767],
ShiftFeedBack(44:15..15): BOOLEAN,
fill44(45:0..14): [0..32767],
nShiftFeedBack(45:15..15): BOOLEAN,
fill45(46:0..14): [0..32767],
ShiftShift(46:15..15): BOOLEAN,
fill46(47:0..14): [0..32767],
nShiftShift(47:15..15): BOOLEAN,
fill47(48:0..14): [0..32767],
ParityOut(48:15..15): BOOLEAN,
fill48(49:0..14): [0..32767],
ShiftDataToSequencer(49:15..15): BOOLEAN,
fill49(50:0..14): [0..32767],
ShiftDataToEntryCtl(50:15..15): BOOLEAN,
fill50(51:0..14): [0..32767],
ShiftExecute(51:15..15): BOOLEAN,
fill51(52:0..14): [0..32767],
nShiftExecute(52:15..15): BOOLEAN,
fill52(53:0..14): [0..32767],
CAMMDataIToMatchReg(53:15..15): BOOLEAN,
fill53(54:0..14): [0..32767],
CAMGetAdrRefresh(54:15..15): BOOLEAN,
fill54(55:0..14): [0..32767],
CAMGetAddress(55:15..15): BOOLEAN,
fill55(56:0..14): [0..32767],
CAMPageAccessToMDataI(56:15..15): BOOLEAN,
fill56(57:0..14): [0..32767],
CAMLowBitsAccessToMDataI(57:15..15): BOOLEAN,
fill57(58:0..14): [0..32767],
CAMAccessToMatch(58:15..15): BOOLEAN,
fill58(59:0..14): [0..32767],
CAMMatchToAccess(59:15..15): BOOLEAN,
fill59(60:0..14): [0..32767],
CAMVirtualAddressToAccess(60:15..15): BOOLEAN,
fill60(61:0..14): [0..32767],
CAMDriveCAMAccess(61:15..15): BOOLEAN,
fill61(62:0..14): [0..32767],
RAMMDataIToMRAMReg(62:15..15): BOOLEAN,
fill62(63:0..14): [0..32767],
RAMMBitsToMRAMReg(63:15..15): BOOLEAN,
fill63(64:0..14): [0..32767],
RAMMRAMRegToMDataI(64:15..15): BOOLEAN,
fill64(65:0..14): [0..32767],
RAMMRAMRegToMBits(65:15..15): BOOLEAN,
fill65(66:0..14): [0..32767],
RAMMRAMRegToMBitsNoOrphan(66:15..15): BOOLEAN,
fill66(67:0..14): [0..32767],
RAMPBitsToMRAMReg(67:15..15): BOOLEAN,
fill67(68:0..14): [0..32767],
RAMLeftPBitsToMRAMReg(68:15..15): BOOLEAN,
fill68(69:0..14): [0..32767],
RAMMRAMRegToPBits(69:15..15): BOOLEAN,
fill69(70:0..14): [0..32767],
FlagSetShared(70:15..15): BOOLEAN,
fill70(71:0..14): [0..32767],
FlagRPDirtyVPValid(71:15..15): BOOLEAN,
fill71(72:0..14): [0..32767],
FlagFlagLatch(72:15..15): BOOLEAN,
fill72(73:0..14): [0..32767],
FlagResetVPValid(73:15..15): BOOLEAN,
fill73(74:0..14): [0..32767],
FlagSetFlags(74:15..15): BOOLEAN,
fill74(75:0..14): [0..32767],
FlagSetTIP(75:15..15): BOOLEAN,
fill75(76:0..14): [0..32767],
FlagResetTIP(76:15..15): BOOLEAN,
fill76(77:0..14): [0..32767],
EntryMDataIToMAdrCtr(77:15..15): BOOLEAN,
fill77(78:0..14): [0..32767],
EntryGetAddress(78:15..15): BOOLEAN,
fill78(79:0..14): [0..32767],
EntryGetAdrRefresh(79:15..15): BOOLEAN,
fill79(80:0..14): [0..32767],
EntryRefresh(80:15..15): BOOLEAN,
fill80(81:0..14): [0..32767],
EntryMAdrCtrToMAdr(81:15..15): BOOLEAN,
fill81(82:0..14): [0..32767],
EntryIncMAdrCtr(82:15..15): BOOLEAN,
fill82(83:0..14): [0..32767],
EntryZeroMAdrCtr(83:15..15): BOOLEAN,
fill83(84:0..14): [0..32767],
EntryPAdrToMAdrCtr(84:15..15): BOOLEAN,
fill84(85:0..14): [0..32767],
EntryLowBitsAccessToMDataI(85:15..15): BOOLEAN,
fill85(86:0..14): [0..32767],
EntryLowBitsZeroToMDataI(86:15..15): BOOLEAN,
fill86(87:0..14): [0..32767],
EntrySelRealData(87:15..15): BOOLEAN,
fill87(88:0..14): [0..32767],
EntrySelPageFlag(88:15..15): BOOLEAN,
fill88(89:0..14): [0..32767],
EntrySelVictimData(89:15..15): BOOLEAN,
fill89(90:0..14): [0..32767],
EntrySelectVictimOrOrphan(90:15..15): BOOLEAN,
fill90(91:0..14): [0..32767],
EntryVirtualAccess(91:15..15): BOOLEAN,
fill91(92:0..14): [0..32767],
EntrynVirtualAccess(92:15..15): BOOLEAN,
fill92(93:0..14): [0..32767],
EntryShiftVictim(93:15..15): BOOLEAN,
fill93(94:0..14): [0..32767],
EntryFinishSharedStore(94:15..15): BOOLEAN,
fill94(95:0..13): [0..16383],
GetAdrCmdBA(95:14..15): GetAddressCommands,
fill95(96:0..14): [0..32767],
GetAddressDoneBA(96:15..15): BOOLEAN,
fill96(97:0..14): [0..32767],
LatchSharedAB(97:15..15): BOOLEAN,
fill97(98:0..14): [0..32767],
IsNoOpBA(98:15..15): BOOLEAN,
fill98(99:0..14): [0..32767],
IsCleanBA(99:15..15): BOOLEAN,
fill99(100:0..14): [0..32767],
MatchRealBA(100:15..15): BOOLEAN];

-- port indices:


MCtlSequencerDrive: TYPE = MACHINE DEPENDENT RECORD [
fill0(0:0..14): [0 .. 32768),
Vdd(0:15..15): BOOLEAN,
fill1(1:0..14): [0 .. 32768),
Gnd(1:15..15): BOOLEAN,
fill2(2:0..14): [0 .. 32768),
LatchBias(2:15..15): BOOLEAN,
fill3(3:0..14): [0 .. 32768),
PhAb(3:15..15): BOOLEAN,
fill4(4:0..14): [0 .. 32768),
PhBb(4:15..15): BOOLEAN,
fill5(5:0..14): [0 .. 32768),
PhAh(5:15..15): BOOLEAN,
fill6(6:0..14): [0 .. 32768),
PhBh(6:15..15): BOOLEAN,
fill7(7:0..14): [0 .. 32768),
Resetb(7:15..15): BOOLEAN,
fill8(8:0..14): [0 .. 32768),
nVirtualMatch(8:15..15): BOOLEAN,
fill9(9:0..14): [0 .. 32768),
nMatchPageClean(9:15..15): BOOLEAN,
fill10(10:0..14): [0 .. 32768),
nMatchCellShared(10:15..15): BOOLEAN,
fill11(11:0..14): [0 .. 32768),
nMapValid(11:15..15): BOOLEAN,
fill12(12:0..14): [0 .. 32768),
nRealMatch(12:15..15): BOOLEAN,
fill13(13:0..14): [0 .. 32768),
nVictimClean(13:15..15): BOOLEAN,
fill14(14:0..14): [0 .. 32768),
MDoneAB(14:15..15): BOOLEAN,
fill15(15:0..14): [0 .. 32768),
MHeldAB(15:15..15): BOOLEAN,
fill16(16:0..14): [0 .. 32768),
MFaultAB(16:15..15): BOOLEAN,
fill17(17:0..14): [0 .. 32768),
PKillRequestB(17:15..15): BOOLEAN,
fill18(18:0..14): [0 .. 32768),
PCmdToMAB(18:15..15): BOOLEAN,
fill19(19:0..14): [0 .. 32768),
DoShiftBA(19:15..15): BOOLEAN,
fill20(20:0..14): [0 .. 32768),
DoExecuteBA(20:15..15): BOOLEAN,
fill21(21:0..14): [0 .. 32768),
DoHoldBA(21:15..15): BOOLEAN,
fill22(22:0..14): [0 .. 32768),
MDataI(22:15..15): BOOLEAN,
fill23(23:0..14): [0 .. 32768),
MDataDrive(23:15..15): BOOLEAN,
fill24(24:0..14): [0 .. 32768),
MDataIDrive(24:15..15): BOOLEAN,
fill25(25:0..14): [0 .. 32768),
MDataPipeBypass(25:15..15): BOOLEAN,
fill26(26:0..14): [0 .. 32768),
MDataPipeTransfer(26:15..15): BOOLEAN,
fill27(27:0..14): [0 .. 32768),
MCmdIn(27:15..15): BOOLEAN,
fill28(28:0..14): [0 .. 32768),
MCmdOutBA(28:15..15): BOOLEAN,
fill29(29:0..14): [0 .. 32768),
MCmdDrive(29:15..15): BOOLEAN,
fill30(30:0..14): [0 .. 32768),
MCmdDriveToDataTransport(30:15..15): BOOLEAN,
fill31(31:0..14): [0 .. 32768),
MCmdDriveToNoOp(31:15..15): BOOLEAN,
fill32(32:0..14): [0 .. 32768),
MNSharedSenseBA(32:15..15): BOOLEAN,
fill33(33:0..14): [0 .. 32768),
MNSharedDriveHigh(33:15..15): BOOLEAN,
fill34(34:0..14): [0 .. 32768),
MNSharedDriveLow(34:15..15): BOOLEAN,
fill35(35:0..14): [0 .. 32768),
MNErrorDriveLow(35:15..15): BOOLEAN,
fill36(36:0..14): [0 .. 32768),
MReadySense(36:15..15): BOOLEAN,
fill37(37:0..14): [0 .. 32768),
MRqIBA(37:15..15): BOOLEAN,
fill38(38:0..14): [0 .. 32768),
MNewRqIBA(38:15..15): BOOLEAN,
fill39(39:0..14): [0 .. 32768),
MNewRqEnableBA(39:15..15): BOOLEAN,
fill40(40:0..14): [0 .. 32768),
MGntSense(40:15..15): BOOLEAN,
fill41(41:0..14): [0 .. 32768),
ShiftEqual(41:15..15): BOOLEAN,
fill42(42:0..14): [0 .. 32768),
nShiftEqual(42:15..15): BOOLEAN,
fill43(43:0..14): [0 .. 32768),
ShiftFeedBack(43:15..15): BOOLEAN,
fill44(44:0..14): [0 .. 32768),
nShiftFeedBack(44:15..15): BOOLEAN,
fill45(45:0..14): [0 .. 32768),
ShiftShift(45:15..15): BOOLEAN,
fill46(46:0..14): [0 .. 32768),
nShiftShift(46:15..15): BOOLEAN,
fill47(47:0..14): [0 .. 32768),
ParityOut(47:15..15): BOOLEAN,
fill48(48:0..14): [0 .. 32768),
ShiftDataToSequencer(48:15..15): BOOLEAN,
fill49(49:0..14): [0 .. 32768),
ShiftDataToEntryCtl(49:15..15): BOOLEAN,
fill50(50:0..14): [0 .. 32768),
ShiftExecute(50:15..15): BOOLEAN,
fill51(51:0..14): [0 .. 32768),
nShiftExecute(51:15..15): BOOLEAN,
fill52(52:0..14): [0 .. 32768),
CAMMDataIToMatchReg(52:15..15): BOOLEAN,
fill53(53:0..14): [0 .. 32768),
CAMGetAdrRefresh(53:15..15): BOOLEAN,
fill54(54:0..14): [0 .. 32768),
CAMGetAddress(54:15..15): BOOLEAN,
fill55(55:0..14): [0 .. 32768),
CAMPageAccessToMDataI(55:15..15): BOOLEAN,
fill56(56:0..14): [0 .. 32768),
CAMLowBitsAccessToMDataI(56:15..15): BOOLEAN,
fill57(57:0..14): [0 .. 32768),
CAMAccessToMatch(57:15..15): BOOLEAN,
fill58(58:0..14): [0 .. 32768),
CAMMatchToAccess(58:15..15): BOOLEAN,
fill59(59:0..14): [0 .. 32768),
CAMVirtualAddressToAccess(59:15..15): BOOLEAN,
fill60(60:0..14): [0 .. 32768),
CAMDriveCAMAccess(60:15..15): BOOLEAN,
fill61(61:0..14): [0 .. 32768),
RAMMDataIToMRAMReg(61:15..15): BOOLEAN,
fill62(62:0..14): [0 .. 32768),
RAMMBitsToMRAMReg(62:15..15): BOOLEAN,
fill63(63:0..14): [0 .. 32768),
RAMMRAMRegToMDataI(63:15..15): BOOLEAN,
fill64(64:0..14): [0 .. 32768),
RAMMRAMRegToMBits(64:15..15): BOOLEAN,
fill65(65:0..14): [0 .. 32768),
RAMMRAMRegToMBitsNoOrphan(65:15..15): BOOLEAN,
fill66(66:0..14): [0 .. 32768),
RAMPBitsToMRAMReg(66:15..15): BOOLEAN,
fill67(67:0..14): [0 .. 32768),
RAMLeftPBitsToMRAMReg(67:15..15): BOOLEAN,
fill68(68:0..14): [0 .. 32768),
RAMMRAMRegToPBits(68:15..15): BOOLEAN,
fill69(69:0..14): [0 .. 32768),
FlagSetShared(69:15..15): BOOLEAN,
fill70(70:0..14): [0 .. 32768),
FlagRPDirtyVPValid(70:15..15): BOOLEAN,
fill71(71:0..14): [0 .. 32768),
FlagFlagLatch(71:15..15): BOOLEAN,
fill72(72:0..14): [0 .. 32768),
FlagResetVPValid(72:15..15): BOOLEAN,
fill73(73:0..14): [0 .. 32768),
FlagSetFlags(73:15..15): BOOLEAN,
fill74(74:0..14): [0 .. 32768),
FlagSetTIP(74:15..15): BOOLEAN,
fill75(75:0..14): [0 .. 32768),
FlagResetTIP(75:15..15): BOOLEAN,
fill76(76:0..14): [0 .. 32768),
EntryMDataIToMAdrCtr(76:15..15): BOOLEAN,
fill77(77:0..14): [0 .. 32768),
EntryGetAddress(77:15..15): BOOLEAN,
fill78(78:0..14): [0 .. 32768),
EntryGetAdrRefresh(78:15..15): BOOLEAN,
fill79(79:0..14): [0 .. 32768),
EntryRefresh(79:15..15): BOOLEAN,
fill80(80:0..14): [0 .. 32768),
EntryMAdrCtrToMAdr(80:15..15): BOOLEAN,
fill81(81:0..14): [0 .. 32768),
EntryIncMAdrCtr(81:15..15): BOOLEAN,
fill82(82:0..14): [0 .. 32768),
EntryZeroMAdrCtr(82:15..15): BOOLEAN,
fill83(83:0..14): [0 .. 32768),
EntryPAdrToMAdrCtr(83:15..15): BOOLEAN,
fill84(84:0..14): [0 .. 32768),
EntryLowBitsAccessToMDataI(84:15..15): BOOLEAN,
fill85(85:0..14): [0 .. 32768),
EntryLowBitsZeroToMDataI(85:15..15): BOOLEAN,
fill86(86:0..14): [0 .. 32768),
EntrySelRealData(86:15..15): BOOLEAN,
fill87(87:0..14): [0 .. 32768),
EntrySelPageFlag(87:15..15): BOOLEAN,
fill88(88:0..14): [0 .. 32768),
EntrySelVictimData(88:15..15): BOOLEAN,
fill89(89:0..14): [0 .. 32768),
EntrySelectVictimOrOrphan(89:15..15): BOOLEAN,
fill90(90:0..14): [0 .. 32768),
EntryVirtualAccess(90:15..15): BOOLEAN,
fill91(91:0..14): [0 .. 32768),
EntrynVirtualAccess(91:15..15): BOOLEAN,
fill92(92:0..14): [0 .. 32768),
EntryShiftVictim(92:15..15): BOOLEAN,
fill93(93:0..14): [0 .. 32768),
EntryFinishSharedStore(93:15..15): BOOLEAN,
fill94(94:0..14): [0 .. 32768),
GetAdrCmdBA(94:15..15): BOOLEAN,
fill95(95:0..14): [0 .. 32768),
GetAddressDoneBA(95:15..15): BOOLEAN,
fill96(96:0..14): [0 .. 32768),
LatchSharedAB(96:15..15): BOOLEAN,
fill97(97:0..14): [0 .. 32768),
IsNoOpBA(97:15..15): BOOLEAN,
fill98(98:0..14): [0 .. 32768),
IsCleanBA(98:15..15): BOOLEAN,
fill99(99:0..14): [0 .. 32768),
MatchRealBA(99:15..15): BOOLEAN];


MCtlSequencerStateRef: TYPE = REF MCtlSequencerStateRec;
MCtlSequencerStateRec: TYPE = RECORD [
holdTypeBA: BOOL,
notHoldTypeBA: BOOL,
pWantsM: BOOL,
currentPDemandsBA, currentPDemandsAB: BitWord,  -- this is actually an array of 7 bools, one per sequence needed.
didRMBA, dirtyPageBA: BOOL,
faultBitsAB: PBusFaults,
mIdleAB, mIdleBA: BOOL,
newRqAB, newRqBA: BOOL,
mGntSenseAB, mRqAB: BOOL,
holdingAB, holdingBA: BOOL,
currentSequenceAB: BitWord,
ioDoneAB: BOOL,
parityErrorAB: BOOL,
cycleShifterAB, cycleShifterBA: BitWord, -- sequence of 7 bits
slaveAB: BOOL,
forceSlaveBA: BOOL,
driveMDataDelayedAB, dCheckParityAB: BOOL,
parityBA: BOOL,
mCmdOutAB, mCmdOutBA: MBusCommands,
seqSenseSharedBA, seqMDoneBA, seqDoneBA, seqForceIdleBA, seqForceIdleAB, seqSenseReadyBA, seqMDataIToFaultsBA, seqCheckFaultsBA, seqDriveSharedBA, seqMDataIDriveBA, seqDriveMDataBA, seqDriveMDataDelayedBA, seqDriveMCmdBA, seqDriveMCmdToDataTransportBA, seqDriveMCmdToNoOpBA, seqDCheckParityBA: BOOL,
romSequence: BitWord,
shiftData, nshiftData: BitDWord,

phBLast: BOOL,

pCAMMDataIToMatchReg, pCAMGetAdrRefresh, pCAMGetAddress, pCAMAccessToMatch, pCAMMatchToAccess, pCAMVirtualAddressToAccess, pCAMDriveCAMAccess: BOOL,
pRAMMDataIToMRAMReg, pRAMMBitsToMRAMReg, pRAMMRAMRegToMDataI, pRAMMRAMRegToMBits, pRAMMRAMRegToMBitsNoOrphan, pRAMMRAMRegToPBits: BOOL,
pFlagSetShared, pFlagRPDirtyVPValid, pFlagFlagLatch, pFlagSenseShared, pFlagResetVPValid, pFlagSetFlags, pFlagSetTIP, pFlagResetTIP:BOOL,
pEntryFinishSharedStore:BOOL
];

CreateMCtlSequencerIO: IOCreator = {
cell.realCellStuff.newIO _ NEW [MCtlSequencerIORec];
cell.realCellStuff.oldIO _ NEW [MCtlSequencerIORec];
};

InitializeMCtlSequencer: Initializer = {
IF leafily THEN
BEGIN
state: MCtlSequencerStateRef _ NEW [MCtlSequencerStateRec];
cell.realCellStuff.state _ state;
END;
};

MCtlSequencerEvalSimple: CellProc =
BEGIN
newIO: MCtlSequencerIORef _ NARROW[cell.realCellStuff.newIO];
state: MCtlSequencerStateRef _ NARROW[cell.realCellStuff.state];
BEGIN OPEN newIO, state;
behaviour[cell];
END;
END;

MCtlSequencerPorts: Ports _ NEW [PortsRep[100]];

--explicitly requested CEDAR:

behaviour: CellProc;

RegisterBehaviour: PUBLIC PROC[b: CellProc]={
behaviour _ b};



RegisterCells[];

END.
Κ2˜Icode˜K˜‚
K˜K˜˜	K˜&—K˜˜!K˜—K˜˜
K˜—K˜˜K˜%K˜)K˜)K˜QK˜—K˜˜K˜K˜˜=K˜K˜GK˜-K˜K˜K˜*—K˜—K˜K˜K˜K˜2˜5K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜!K˜K˜#K˜K˜%K˜K˜K˜K˜K˜K˜!K˜K˜K˜K˜K˜K˜ K˜K˜"K˜K˜#K˜K˜K˜K˜ K˜K˜K˜+K˜K˜K˜K˜ K˜K˜$K˜K˜&K˜K˜ K˜K˜#K˜K˜K˜K˜-K˜K˜$K˜K˜$K˜K˜&K˜K˜%K˜K˜$K˜K˜ K˜K˜K˜K˜K˜K˜#K˜K˜K˜K˜K˜K˜ K˜K˜"K˜K˜#K˜K˜K˜K˜ K˜K˜K˜K˜)K˜K˜(K˜K˜!K˜K˜"K˜K˜(K˜K˜%K˜K˜"K˜K˜*K˜K˜-K˜K˜%K˜K˜%K˜K˜.K˜K˜&K˜K˜'K˜K˜&K˜K˜'K˜K˜&K˜K˜.K˜K˜&K˜K˜*K˜K˜&K˜K˜"K˜K˜'K˜K˜"K˜K˜%K˜K˜!K˜K˜K˜K˜!K˜K˜)K˜K˜$K˜K˜'K˜K˜!K˜K˜'K˜K˜$K˜K˜%K˜K˜'K˜K˜/K˜K˜-K˜K˜%K˜K˜%K˜K˜'K˜K˜.K˜K˜'K˜K˜(K˜K˜%K˜K˜+K˜K˜+K˜K˜%K˜K˜"K˜K˜K˜K˜K˜K˜"—K˜˜K˜—K˜˜5K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜K˜!K˜K˜#K˜K˜%K˜K˜K˜K˜K˜K˜!K˜K˜K˜K˜K˜K˜K˜K˜"K˜K˜K˜K˜K˜K˜ K˜K˜K˜K˜K˜K˜K˜K˜ K˜K˜$K˜K˜&K˜K˜K˜K˜K˜K˜K˜K˜-K˜K˜$K˜K˜$K˜K˜&K˜K˜%K˜K˜$K˜K˜ K˜K˜K˜K˜K˜K˜#K˜K˜K˜K˜K˜K˜ K˜K˜"K˜K˜#K˜K˜K˜K˜ K˜K˜K˜K˜)K˜K˜(K˜K˜!K˜K˜"K˜K˜(K˜K˜%K˜K˜"K˜K˜*K˜K˜-K˜K˜%K˜K˜%K˜K˜.K˜K˜&K˜K˜'K˜K˜&K˜K˜'K˜K˜&K˜K˜.K˜K˜&K˜K˜*K˜K˜&K˜K˜"K˜K˜'K˜K˜"K˜K˜%K˜K˜!K˜K˜K˜K˜!K˜K˜)K˜K˜$K˜K˜'K˜K˜!K˜K˜'K˜K˜$K˜K˜%K˜K˜'K˜K˜/K˜K˜-K˜K˜%K˜K˜%K˜K˜'K˜K˜.K˜K˜'K˜K˜(K˜K˜%K˜K˜+K˜K˜ K˜K˜%K˜K˜"K˜K˜K˜K˜K˜K˜!—K˜K˜K˜8˜&J˜J˜J˜J˜qJ˜J˜J˜J˜J˜J˜J˜J˜J˜J˜>J˜J˜J˜*J˜J˜#J˜«J˜J˜ J˜J˜J˜J˜”
J˜‡
J˜‰
J˜K˜—K˜˜$K˜4K˜4K˜—K˜˜(˜K˜K˜;K˜!K˜—K˜—K˜˜#K˜K˜=˜@˜J˜—K˜—K˜—K˜K˜0K˜˜J˜J˜J˜˜-J˜—J˜—K˜K˜K˜K˜K˜—…—APGˆ