--Cache.Mesa
--created by RoseTranslate from Cache.Rose of June 12, 1984 5:57:33 pm PDT for mccreight.pa at June 12, 1984 5:58:11 pm PDT


DIRECTORY
RoseTypes, RoseCreate, IO, Atom, BitOps, CacheOps, Cucumber, Dragon, NumTypes, SwitchTypes, EnumTypes, CachePInterface, CacheMInterface, CacheEntries;

Cache: CEDAR PROGRAM
IMPORTS RoseCreate, Atom, BitOps, CacheOps, Cucumber, Dragon, NumTypes, SwitchTypes, EnumTypes, CachePInterface, CacheMInterface, CacheEntries =

BEGIN OPEN
RoseTypes;

--Signal Type decls
PBusCommands: TYPE = Dragon.PBusCommands;
PBusFaults: TYPE = Dragon.PBusFaults;
MBusCommands: TYPE = Dragon.MBusCommands;


RegisterCells: PROC =
BEGIN
CreateCachePorts[];
[] _ RoseCreate.RegisterCellClass[className: "Cache",
expandProc: CacheExpand,
ioCreator: CreateCacheIO, initializer: InitializeCache,
evals: [EvalSimple: CacheEvalSimple],
blackBox: CacheBBTest, stateToo: NIL,
ports: CachePorts,
drivePrototype: NEW [CacheDrive]];
END;

CreateCachePorts: PROC = {CachePorts _ RoseCreate.PortsFromFile["Cache.Cache.rosePorts"]};

CacheIORef: TYPE = REF CacheIORec;
CacheIORec: TYPE = MACHINE DEPENDENT RECORD [
fill0(0:0..14): [0..32767],
PhA(0:15..15): BOOLEAN,
fill1(1:0..14): [0..32767],
PhB(1:15..15): BOOLEAN,
fill2(2:0..14): [0..32767],
Vdd(2:15..15): BOOLEAN,
fill3(3:0..14): [0..32767],
Gnd(3:15..15): BOOLEAN,
fill4(4:0..14): [0..32767],
PadVdd(4:15..15): BOOLEAN,
fill5(5:0..14): [0..32767],
PadGnd(5:15..15): BOOLEAN,
PData(6:0..31): ARRAY [0..2) OF CARDINAL,
fill7(8:0..14): [0..32767],
PParityB(8:15..15): BOOLEAN,
fill8(9:0..11): [0..4095],
PCmdA(9:12..15): PBusCommands,
fill9(10:0..14): [0..32767],
PRejectB(10:15..15): BOOLEAN,
fill10(11:0..12): [0..8191],
PFaultB(11:13..15): PBusFaults,
fill11(12:0..14): [0..32767],
PNPError(12:15..15): BOOLEAN,
MDataBA(13:0..31): ARRAY [0..2) OF CARDINAL,
fill13(15:0..11): [0..4095],
MCmdBA(15:12..15): MBusCommands,
fill14(16:0..14): [0..32767],
MNShared(16:15..15): BOOLEAN,
fill15(17:0..14): [0..32767],
MParityBA(17:15..15): BOOLEAN,
fill16(18:0..14): [0..32767],
MNError(18:15..15): BOOLEAN,
fill17(19:0..14): [0..32767],
MReadyBA(19:15..15): BOOLEAN,
fill18(20:0..14): [0..32767],
MRq(20:15..15): BOOLEAN,
fill19(21:0..14): [0..32767],
MNewRq(21:15..15): BOOLEAN,
fill20(22:0..14): [0..32767],
MGnt(22:15..15): BOOLEAN,
fill21(23:0..14): [0..32767],
ResetAB(23:15..15): BOOLEAN,
fill22(24:0..14): [0..32767],
DHoldAB(24:15..15): BOOLEAN,
fill23(25:0..14): [0..32767],
DShiftAB(25:15..15): BOOLEAN,
fill24(26:0..14): [0..32767],
DExecuteAB(26:15..15): BOOLEAN,
fill25(27:0..14): [0..32767],
DNSelectAB(27:15..15): BOOLEAN,
fill26(28:0..14): [0..32767],
DDataInAB(28:15..15): BOOLEAN,
fill27(29:0..14): [0..32767],
DDataOutAB(29:15..15): BOOLEAN];

-- port indices:


CacheDrive: TYPE = MACHINE DEPENDENT RECORD [
fill0(0:0..14): [0 .. 32768),
PhA(0:15..15): BOOLEAN,
fill1(1:0..14): [0 .. 32768),
PhB(1:15..15): BOOLEAN,
fill2(2:0..14): [0 .. 32768),
Vdd(2:15..15): BOOLEAN,
fill3(3:0..14): [0 .. 32768),
Gnd(3:15..15): BOOLEAN,
fill4(4:0..14): [0 .. 32768),
PadVdd(4:15..15): BOOLEAN,
fill5(5:0..14): [0 .. 32768),
PadGnd(5:15..15): BOOLEAN,
fill6(6:0..14): [0 .. 32768),
PData(6:15..15): BOOLEAN,
fill7(7:0..14): [0 .. 32768),
PParityB(7:15..15): BOOLEAN,
fill8(8:0..14): [0 .. 32768),
PCmdA(8:15..15): BOOLEAN,
fill9(9:0..14): [0 .. 32768),
PRejectB(9:15..15): BOOLEAN,
fill10(10:0..14): [0 .. 32768),
PFaultB(10:15..15): BOOLEAN,
fill11(11:0..14): [0 .. 32768),
PNPError(11:15..15): BOOLEAN,
fill12(12:0..14): [0 .. 32768),
MDataBA(12:15..15): BOOLEAN,
fill13(13:0..14): [0 .. 32768),
MCmdBA(13:15..15): BOOLEAN,
fill14(14:0..14): [0 .. 32768),
MNShared(14:15..15): BOOLEAN,
fill15(15:0..14): [0 .. 32768),
MParityBA(15:15..15): BOOLEAN,
fill16(16:0..14): [0 .. 32768),
MNError(16:15..15): BOOLEAN,
fill17(17:0..14): [0 .. 32768),
MReadyBA(17:15..15): BOOLEAN,
fill18(18:0..14): [0 .. 32768),
MRq(18:15..15): BOOLEAN,
fill19(19:0..14): [0 .. 32768),
MNewRq(19:15..15): BOOLEAN,
fill20(20:0..14): [0 .. 32768),
MGnt(20:15..15): BOOLEAN,
fill21(21:0..14): [0 .. 32768),
ResetAB(21:15..15): BOOLEAN,
fill22(22:0..14): [0 .. 32768),
DHoldAB(22:15..15): BOOLEAN,
fill23(23:0..14): [0 .. 32768),
DShiftAB(23:15..15): BOOLEAN,
fill24(24:0..14): [0 .. 32768),
DExecuteAB(24:15..15): BOOLEAN,
fill25(25:0..14): [0 .. 32768),
DNSelectAB(25:15..15): BOOLEAN,
fill26(26:0..14): [0 .. 32768),
DDataInAB(26:15..15): BOOLEAN,
fill27(27:0..14): [0 .. 32768),
DDataOutAB(27:15..15): BOOLEAN];


CacheStateRef: TYPE = REF CacheStateRec;
CacheStateRec: TYPE = RECORD [

phALast: BOOL _ FALSE, -- hack to improve simulation performance
cache: CacheOps.Cache,
cycleNo: INT _ 0,
skipRejects: BOOL _ FALSE,
rejectCycles: NAT _ 0,
cmdAB: PBusCommands _ NoOp,
address, fetchData, storeData: Dragon.HexWord _ 0,
cmdType: {noOp, fetch, store} _ noOp,
pageFault, writeFault, storeParity, storeParityErrorBA, storeParityErrorAB, firstBOfCmdBA, resetBA, resettingAB, dHoldBA, holdingAB, rejectedB: BOOL _ FALSE

];

CacheExpand: ExpandProc = {
PrivateLookupNode: PROC [name: ROPE] RETURNS [node: Node] = {node _ RoseCreate.LookupNode[from: thisCell, path: LIST[name]]};
PhA: Node _ PrivateLookupNode["PhA"];
PhB: Node _ PrivateLookupNode["PhB"];
Vdd: Node _ PrivateLookupNode["Vdd"];
Gnd: Node _ PrivateLookupNode["Gnd"];
PadVdd: Node _ PrivateLookupNode["PadVdd"];
PadGnd: Node _ PrivateLookupNode["PadGnd"];
PData: Node _ PrivateLookupNode["PData"];
PParityB: Node _ PrivateLookupNode["PParityB"];
PCmdA: Node _ PrivateLookupNode["PCmdA"];
PRejectB: Node _ PrivateLookupNode["PRejectB"];
PFaultB: Node _ PrivateLookupNode["PFaultB"];
PNPError: Node _ PrivateLookupNode["PNPError"];
MDataBA: Node _ PrivateLookupNode["MDataBA"];
MCmdBA: Node _ PrivateLookupNode["MCmdBA"];
MNShared: Node _ PrivateLookupNode["MNShared"];
MParityBA: Node _ PrivateLookupNode["MParityBA"];
MNError: Node _ PrivateLookupNode["MNError"];
MReadyBA: Node _ PrivateLookupNode["MReadyBA"];
MRq: Node _ PrivateLookupNode["MRq"];
MNewRq: Node _ PrivateLookupNode["MNewRq"];
MGnt: Node _ PrivateLookupNode["MGnt"];
ResetAB: Node _ PrivateLookupNode["ResetAB"];
DHoldAB: Node _ PrivateLookupNode["DHoldAB"];
DShiftAB: Node _ PrivateLookupNode["DShiftAB"];
DExecuteAB: Node _ PrivateLookupNode["DExecuteAB"];
DNSelectAB: Node _ PrivateLookupNode["DNSelectAB"];
DDataInAB: Node _ PrivateLookupNode["DDataInAB"];
DDataOutAB: Node _ PrivateLookupNode["DDataOutAB"];
NodeCreateHack1: PROC [name: ROPE] RETURNS [node: Node] = {node _ RoseCreate.CreateNode[within: thisCell, name: name, type: NumTypes.boolType]};
PKillRequestB: Node _ NodeCreateHack1["PKillRequestB"];
LatchBias: Node _ NodeCreateHack1["LatchBias"];
PhAb: Node _ NodeCreateHack1["PhAb"];
nPhAb: Node _ NodeCreateHack1["nPhAb"];
PhBb: Node _ NodeCreateHack1["PhBb"];
nPhBb: Node _ NodeCreateHack1["nPhBb"];
PhAh: Node _ NodeCreateHack1["PhAh"];
PhBh: Node _ NodeCreateHack1["PhBh"];
Resetb: Node _ NodeCreateHack1["Resetb"];
NodeCreateHack2: PROC [name: ROPE] RETURNS [node: Node] = {node _ RoseCreate.CreateNode[within: thisCell, name: name, type: NumTypes.NumType[24]]};
VirtualPage: Node _ NodeCreateHack2["VirtualPage"];
nVirtualPage: Node _ NodeCreateHack2["nVirtualPage"];
NodeCreateHack3: PROC [name: ROPE] RETURNS [node: Node] = {node _ RoseCreate.CreateNode[within: thisCell, name: name, type: NumTypes.NumType[6]]};
VirtualBlock: Node _ NodeCreateHack3["VirtualBlock"];
nVirtualBlock: Node _ NodeCreateHack3["nVirtualBlock"];
RealPage: Node _ NodeCreateHack2["RealPage"];
nRealPage: Node _ NodeCreateHack2["nRealPage"];
RealBlock: Node _ NodeCreateHack3["RealBlock"];
nRealBlock: Node _ NodeCreateHack3["nRealBlock"];
CAMPageAccess: Node _ RoseCreate.CreateNode[within: thisCell, name: "CAMPageAccess", type: SwitchTypes.Bundle[24]];
nCAMPageAccess: Node _ RoseCreate.CreateNode[within: thisCell, name: "nCAMPageAccess", type: SwitchTypes.Bundle[24]];
CAMBlockAccess: Node _ RoseCreate.CreateNode[within: thisCell, name: "CAMBlockAccess", type: SwitchTypes.Bundle[6]];
nCAMBlockAccess: Node _ RoseCreate.CreateNode[within: thisCell, name: "nCAMBlockAccess", type: SwitchTypes.Bundle[6]];
NodeCreateHack4: PROC [name: ROPE] RETURNS [node: Node] = {node _ RoseCreate.CreateNode[within: thisCell, name: name, type: SwitchTypes.Bundle[66]]};
PBits: Node _ NodeCreateHack4["PBits"];
nPBits: Node _ NodeCreateHack4["nPBits"];
MBits: Node _ NodeCreateHack4["MBits"];
nMBits: Node _ NodeCreateHack4["nMBits"];
nVirtualMatch: Node _ NodeCreateHack1["nVirtualMatch"];
nMatchPageClean: Node _ NodeCreateHack1["nMatchPageClean"];
nMatchCellShared: Node _ NodeCreateHack1["nMatchCellShared"];
nMapValid: Node _ NodeCreateHack1["nMapValid"];
nRealMatch: Node _ NodeCreateHack1["nRealMatch"];
nVictimClean: Node _ NodeCreateHack1["nVictimClean"];
nMatchTIP: Node _ NodeCreateHack1["nMatchTIP"];
CellAdr: Node _ RoseCreate.CreateNode[within: thisCell, name: "CellAdr", type: NumTypes.NumType[8]];
nCellAdr: Node _ RoseCreate.CreateNode[within: thisCell, name: "nCellAdr", type: NumTypes.NumType[8]];
VirtualAccess: Node _ NodeCreateHack1["VirtualAccess"];
nVirtualAccess: Node _ NodeCreateHack1["nVirtualAccess"];
SelCell: Node _ NodeCreateHack1["SelCell"];
SelVictimAdr: Node _ NodeCreateHack1["SelVictimAdr"];
SelMapAdr: Node _ NodeCreateHack1["SelMapAdr"];
SelRealData: Node _ NodeCreateHack1["SelRealData"];
SelPageFlag: Node _ NodeCreateHack1["SelPageFlag"];
SelVictimData: Node _ NodeCreateHack1["SelVictimData"];
SelRealAdr: Node _ NodeCreateHack1["SelRealAdr"];
FinishSharedStore: Node _ NodeCreateHack1["FinishSharedStore"];
NodeCreateHack5: PROC [name: ROPE] RETURNS [node: Node] = {node _ RoseCreate.CreateNode[within: thisCell, name: name, type: SwitchTypes.bitType]};
VPValid: Node _ NodeCreateHack5["VPValid"];
nVPValid: Node _ NodeCreateHack5["nVPValid"];
RPValid: Node _ NodeCreateHack5["RPValid"];
nRPValid: Node _ NodeCreateHack5["nRPValid"];
RPDirty: Node _ NodeCreateHack5["RPDirty"];
nRPDirty: Node _ NodeCreateHack5["nRPDirty"];
Master: Node _ NodeCreateHack5["Master"];
nMaster: Node _ NodeCreateHack5["nMaster"];
Shared: Node _ NodeCreateHack5["Shared"];
nShared: Node _ NodeCreateHack5["nShared"];
Victim: Node _ NodeCreateHack5["Victim"];
nVictim: Node _ NodeCreateHack5["nVictim"];
TIP: Node _ NodeCreateHack5["TIP"];
nTIP: Node _ NodeCreateHack5["nTIP"];
Broken: Node _ NodeCreateHack5["Broken"];
nBroken: Node _ NodeCreateHack5["nBroken"];
MAdrLow: Node _ NodeCreateHack1["MAdrLow"];
nMAdrLow: Node _ NodeCreateHack1["nMAdrLow"];
PAdrLow: Node _ NodeCreateHack1["PAdrLow"];
nPAdrLow: Node _ NodeCreateHack1["nPAdrLow"];
PStore: Node _ NodeCreateHack1["PStore"];
VictimFeedback: Node _ NodeCreateHack1["VictimFeedback"];
nVictimFeedback: Node _ NodeCreateHack1["nVictimFeedback"];
ShiftVictim: Node _ NodeCreateHack1["ShiftVictim"];
nShiftVictim: Node _ NodeCreateHack1["nShiftVictim"];
ForceDataSelect: Node _ NodeCreateHack1["ForceDataSelect"];
MDoneAB: Node _ NodeCreateHack1["MDoneAB"];
MHeldAB: Node _ NodeCreateHack1["MHeldAB"];
MFaultAB: Node _ RoseCreate.CreateNode[within: thisCell, name: "MFaultAB", type: EnumTypes.EnumType["Dragon.PBusFaults"]];
PAdrHigh: Node _ NodeCreateHack1["PAdrHigh"];
PAdrLowToM: Node _ NodeCreateHack1["PAdrLowToM"];
PCmdToMAB: Node _ RoseCreate.CreateNode[within: thisCell, name: "PCmdToMAB", type: EnumTypes.EnumType["Dragon.PBusCommands"]];
DoShiftBA: Node _ NodeCreateHack1["DoShiftBA"];
DoExecuteBA: Node _ NodeCreateHack1["DoExecuteBA"];
DoHoldBA: Node _ NodeCreateHack1["DoHoldBA"];
ShiftDataToPCAM: Node _ NodeCreateHack1["ShiftDataToPCAM"];
ShiftDataToMCtlPads: Node _ NodeCreateHack1["ShiftDataToMCtlPads"];
[] _ RoseCreate.CreateCell[within: thisCell, instanceName: "pInterface", className: "PInterface", interfaceNodes: ""];
[] _ RoseCreate.CreateCell[within: thisCell, instanceName: "mInterface", className: "MInterface", interfaceNodes: ""];
[] _ RoseCreate.CreateCell[within: thisCell, instanceName: "cacheEntries", className: "CacheEntries", interfaceNodes: ""];
};

CreateCacheIO: IOCreator = {
cell.realCellStuff.newIO _ NEW [CacheIORec];
cell.realCellStuff.oldIO _ NEW [CacheIORec];
};

InitializeCache: Initializer = {
IF leafily THEN
BEGIN
ioRec: CacheIORef _ NARROW[cell.realCellStuff.newIO];
state: CacheStateRef _ NEW [CacheStateRec];
cell.realCellStuff.state _ state;
BEGIN OPEN ioRec, state;

WITH initData SELECT FROM
pl: Atom.PropList =>
BEGIN
r: REF;
IF (r _ pl.GetPropFromList[$Cache]) # NIL THEN
cache _ NARROW[r, CacheOps.Cache];
skipRejects _ (pl.GetPropFromList[$SkipRejects] # NIL AND NARROW[pl.GetPropFromList[$SkipRejects], REF BOOL]^);
END;
ENDCASE => ERROR

END;
END;
};

CacheEvalSimple: CellProc =
BEGIN
newIO: CacheIORef _ NARROW[cell.realCellStuff.newIO];
state: CacheStateRef _ NARROW[cell.realCellStuff.state];
BEGIN OPEN newIO, state;

IF PhA THEN
BEGIN
holdingAB _ dHoldBA;
resettingAB _ resetBA;
IF NOT phALast THEN
BEGIN
storeParityErrorAB _ storeParityErrorBA OR (cmdType=store AND storeParity#CacheOps.Parity32[storeData]);
IF NOT dHoldBA AND cmdType=store AND rejectCycles=0 AND NOT (pageFault OR writeFault) THEN
CacheOps.Write[cache, address, storeData];
phALast _ TRUE;
END;
IF rejectCycles=0 THEN
address _ BitOps.ELFD[container: PData, containerWidth: 32, fieldPosition: 0, fieldWidth: 32];
cmdAB _ IF resetBA THEN NoOp ELSE PCmdA;
PRejectB _ FALSE;
PFaultB _ None;
END;

IF PhB THEN
BEGIN
dHoldBA _ DHoldAB;
resetBA _ ResetAB;
IF phALast THEN
BEGIN
IF NOT holdingAB THEN
BEGIN
storeParityErrorBA _ NOT resettingAB AND storeParityErrorAB;
IF resettingAB THEN
BEGIN
rejectCycles _ 0;
cycleNo _ 0;
cache _ CacheOps.NewCache[cache];
END
ELSE cycleNo _ cycleNo+1;
IF rejectCycles=0 THEN
BEGIN
pageFault _ writeFault _ FALSE;
SELECT cmdAB FROM
Fetch, FetchHold =>
BEGIN
cmdType _ fetch;
[data: fetchData, rejectCycles: rejectCycles, pageFault: pageFault] _ CacheOps.Access[cache, address, read, cycleNo];
END;
Store, StoreHold =>
BEGIN
cmdType _ store;
[rejectCycles: rejectCycles, pageFault: pageFault, writeProtect: writeFault] _ CacheOps.Access[cache, address, write, cycleNo];
END;
IOFetch, IOStore, IOFetchHold, IOStoreHold =>
BEGIN
Dragon.Assert[ FALSE, "Cache doesn't yet implement IO operations" ];  -- for now
cmdType _ noOp;
END;
ENDCASE => cmdType _ noOp;
IF skipRejects THEN rejectCycles _ 0;
IF pageFault OR writeFault THEN rejectCycles _ MAX[1, rejectCycles];
firstBOfCmdBA _ TRUE;
END
ELSE
BEGIN -- rejected on previous PhB
Dragon.Assert[ cmdAB = NoOp ];
rejectCycles _ rejectCycles-1;
firstBOfCmdBA _ FALSE;
END;
END;
phALast _ FALSE;
END;
IF storeParityErrorAB THEN PNPError _ FALSE;
IF cmdType # noOp THEN
BEGIN
PFaultB _ (SELECT TRUE FROM
rejectCycles=1 AND pageFault => PageFault,
rejectCycles=1 AND writeFault => WriteProtectFault,
ENDCASE => None);
PRejectB _ rejectCycles>0;
SELECT TRUE FROM
cmdType=store AND firstBOfCmdBA =>
BEGIN
storeData _ BitOps.ELFD[container: PData, containerWidth: 32, fieldPosition: 0, fieldWidth: 32];
storeParity _ PParityB;
END;
cmdType=fetch AND rejectCycles=0 AND NOT pageFault =>
BEGIN
PData _ BitOps.ILID[source: fetchData, container: PData, containerWidth: 32, fieldPosition: 0, fieldWidth: 32];
PParityB _ CacheOps.Parity32[fetchData];
END;
ENDCASE => NULL; -- neither write nor read PBus
END;
END;

END;
END;

CacheBBTest: CellTestProc =
BEGIN
instructions: CacheIORef _ NARROW[io];
drive: REF CacheDrive _ NARROW[driveAsAny];
BEGIN OPEN instructions;
cacheTester[instructions, drive, handle];
END;
END;

CachePorts: Ports _ NEW [PortsRep[28]];

--explicitly requested CEDAR:

CacheTester: TYPE = PROC[i: CacheIORef, d: REF CacheDrive, h: CellTestHandle];
cacheTester: CacheTester;

RegisterCacheTester: PUBLIC PROC[ct: CacheTester]={
cacheTester _ ct};

CacheStateHandler: Cucumber.Handler = NEW[Cucumber.HandlerRep _ [
PrepareWhole: CacheStatePrepareProc,
PartTransfer: CacheTransferProc
]];

CacheStatePrepareProc: PROC [ whole: REF ANY, where: IO.STREAM, direction: Cucumber.Direction, data: REF ANY ] RETURNS [ leaveTheseToMe: Cucumber.SelectorList ] -- Cucumber.Bracket -- =
{leaveTheseToMe _ LIST[$cache]};

CacheTransferProc: PROC [ whole: REF ANY, part: Cucumber.Path, where: IO.STREAM, direction: Cucumber.Direction, data: REF ANY ] -- Cucumber.PartTransferProc -- =
TRUSTED {Cucumber.Transfer[ what: NARROW[whole, REF CacheStateRec].cache, where: where, direction: direction ]};

Cucumber.Register[CacheStateHandler, CODE[CacheStateRec]];


RegisterCells[];

END.
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