-- RoseComplaints.tioga

-- Last Edited by: Barth, May 1, 1984 4:16:48 pm PDT

?1 Cache.expand, Dragon.bcd, and GetAddressCommands.mnemonics must all be in the root directory instead of the working directory.

?2 A lower level cell declared a port to be I/O when an upper level cell declared it to be input only. This was not caught until runtime, seems like the translator could have figured this out.

x3 If a cell has -S on an interface node and is expanded nested then StrFinalUD will schedule the mirror cell. It shouldn't. Perhaps ScheduleCell should check for this case.

x4 Cells with -X set should never be called with an X. I hacked SwitchTypesImpl (In SwitchesInitNode and BitInitNode) to initialize nodes to L instead of X. Seems as though this should only be done if the node has a Xphobic cell attached to it.

?5 The default radix for everything should be hex unless otherwise specified. Switches are only HLX strings, they should be hex unless a digit has an X in it in which case a ? should be substituted for the digit.

6 It should be possible to run the simulation process at priority background.

7 If ">" means information only flows out then the test proc cannot precharge the line since its ports are mirrors and therefore input only.

8 Light weight transistor structures.

9 Source selection of node or state var name and display in debug scroll.

10 Seperate definitions and implementation modules.

11 RoseEventsImpl.Error[msg: "drive contradicted" .... should be a signal, not an error so that the test procedure can decide whether to press on or not.

12 Editing a node changes the displayed value in all locations but does not change the value in newIO.

13 I thought that if a node stabilizes to X that the simulator would complain. It doesn't.

14 Button that causes all cells to be listed as they are scheduled until the button is pushed again, i.e. toggle enable.

15 If a port is declared to be input only and newIO#oldIO then complain.