CachePInterface.rose
Last edited by: Barth, May 31, 1984 5:38:30 pm PDT
Directory Dragon;
Library CachePCAMDriver, CachePCtl, CachePRAMDriver, CachePPads;
PInterface: CELL [
Timing and housekeeping interface
Vdd, Gnd<BOOL,
PadVdd, PadGnd<BOOL,
LatchBias<BOOL,
Processor interface
PData=INT[32],
PParityB=BOOL,
PCmdA<EnumType["Dragon.PBusCommands"],
PRejectB=BOOL,
PFaultB=EnumType["Dragon.PBusFaults"],
PNPError>BOOL,
Buffered timing and housekeeping interface
PhAb, PhBb<BOOL,
PhAh, PhBh<BOOL,
Resetb<BOOL,
CAM interface
VirtualPage, nVirtualPage>INT[24],
VirtualBlock, nVirtualBlock>INT[6],
RAM access
PBits, nPBits=SWITCH[66],
Cell control
nVirtualMatch, nMatchPageClean, nMatchCellShared<BOOL,
nMatchTIP=BOOL,
PAdrLow, nPAdrLow>BOOL,
PStore>BOOL,
P control <=> M control
MDoneAB, MHeldAB<BOOL,
MFaultAB<EnumType["Dragon.PBusFaults"],
PKillRequestB, PAdrHigh, PAdrLowToM>BOOL,
PCmdToMAB>EnumType["Dragon.PBusCommands"],
Debug interface
ShiftDataToPCAM must be clamped low during reset.
DoShiftBA, DoExecuteBA, DoHoldBA, ShiftDataToPCAM<BOOL,
ShiftDataToMCtlPads>BOOL
]
Expand
Internal processor interface
PDataI:INT[32];
DrivePData, DrivePDataI:BOOL;
PParityI:BOOL;
PCmdI:EnumType["Dragon.PBusCommands"];
PRejectDriveHigh, PRejectDriveLow:BOOL;
PFaultDrive:BOOL;
PFaultI:EnumType["Dragon.PBusFaults"];
PNPErrorDriveLow:BOOL;
More debug interface
ShiftFeedBack, nShiftFeedBack, ShiftEqual, nShiftEqual, ShiftShift, nShiftShift:BOOL;
ShiftDataToPCtl:BOOL;
ShiftDataToPRAMDriver:BOOL;
PCAMDriver interface
PDataIToVAReg:BOOL;
ReadVAReg, nReadVAReg:BOOL;
PRAMDriver interface
nPBitsPrecharge, MuxRight, MuxLeft, PBitsDrive, nPBitsDrive, PRamRegToPDataI, nPRamRegToPDataI, SensePBits, SensePDataI, ParityIn:BOOL;
ParityOut:BOOL;
ReadPRAMReg, nReadPRAMReg:BOOL;
pCAMDriver: PCAMDriver[];
pCtl: PCtl[];
pRAMDriver: PRAMDriver[];
pDataPads: PDataPads[];
pCtlPads: PCtlPads[]
ENDCELL