--CachePInterface.Mesa
--created by RoseTranslate from CachePInterface.Rose of May 22, 1984 8:18:36 pm PDT for Barth.pa at May 22, 1984 8:28:46 pm PDT
DIRECTORY
RoseTypes, RoseCreate, Dragon, SwitchTypes, NumTypes, EnumTypes, CachePCAMDriver, CachePCtl, CachePRAMDriver, CachePPads;
CachePInterface: CEDAR PROGRAM
IMPORTS RoseCreate, NumTypes, EnumTypes, SwitchTypes, CachePCAMDriver, CachePCtl, CachePRAMDriver, CachePPads =
--Signal Type decls
PBusCommands: TYPE = Dragon.PBusCommands;
PBusFaults: TYPE = Dragon.PBusFaults;
RegisterCells: PROC =
BEGIN
CreatePInterfacePorts[];
[] ← RoseCreate.RegisterCellClass[className: "PInterface",
expandProc: PInterfaceExpand,
ioCreator: CreatePInterfaceIO, initializer: NIL,
evals: [],
blackBox: NIL, stateToo: NIL,
ports: PInterfacePorts,
drivePrototype: NEW [PInterfaceDrive]];
END;
CreatePInterfacePorts: PROC = {PInterfacePorts ← RoseCreate.PortsFromFile["CachePInterface.PInterface.rosePorts"]};
PInterfaceIORef: TYPE = REF PInterfaceIORec;
PInterfaceIORec: TYPE = MACHINE DEPENDENT RECORD [
fill0(0:0..14): [0..32767],
Vdd(0:15..15): BOOLEAN,
fill1(1:0..14): [0..32767],
Gnd(1:15..15): BOOLEAN,
fill2(2:0..14): [0..32767],
PadVdd(2:15..15): BOOLEAN,
fill3(3:0..14): [0..32767],
PadGnd(3:15..15): BOOLEAN,
fill4(4:0..14): [0..32767],
LatchBias(4:15..15): BOOLEAN,
PData(5:0..31): ARRAY [0..2) OF CARDINAL,
fill6(7:0..14): [0..32767],
PParityB(7:15..15): BOOLEAN,
fill7(8:0..11): [0..4095],
PCmdA(8:12..15): PBusCommands,
fill8(9:0..14): [0..32767],
PRejectB(9:15..15): BOOLEAN,
fill9(10:0..12): [0..8191],
PFaultB(10:13..15): PBusFaults,
fill10(11:0..14): [0..32767],
PNPError(11:15..15): BOOLEAN,
fill11(12:0..14): [0..32767],
PhAb(12:15..15): BOOLEAN,
fill12(13:0..14): [0..32767],
PhBb(13:15..15): BOOLEAN,
fill13(14:0..14): [0..32767],
PhAh(14:15..15): BOOLEAN,
fill14(15:0..14): [0..32767],
PhBh(15:15..15): BOOLEAN,
fill15(16:0..14): [0..32767],
Resetb(16:15..15): BOOLEAN,
VirtualPage(17:0..31): ARRAY [0..2) OF CARDINAL,
nVirtualPage(19:0..31): ARRAY [0..2) OF CARDINAL,
fill18(21:0..9): [0..1023],
VirtualBlock(21:10..15): [0..63],
fill19(22:0..9): [0..1023],
nVirtualBlock(22:10..15): [0..63],
PBits(23:0..1055): PACKED ARRAY [0 .. 65] OF SwitchTypes.SwitchVal,
nPBits(89:0..1055): PACKED ARRAY [0 .. 65] OF SwitchTypes.SwitchVal,
fill22(155:0..14): [0..32767],
nVirtualMatch(155:15..15): BOOLEAN,
fill23(156:0..14): [0..32767],
nMatchPageClean(156:15..15): BOOLEAN,
fill24(157:0..14): [0..32767],
nMatchCellShared(157:15..15): BOOLEAN,
fill25(158:0..14): [0..32767],
nMatchTIP(158:15..15): BOOLEAN,
fill26(159:0..14): [0..32767],
PAdrLow(159:15..15): BOOLEAN,
fill27(160:0..14): [0..32767],
nPAdrLow(160:15..15): BOOLEAN,
fill28(161:0..14): [0..32767],
PStore(161:15..15): BOOLEAN,
fill29(162:0..14): [0..32767],
MDoneAB(162:15..15): BOOLEAN,
fill30(163:0..14): [0..32767],
MHeldAB(163:15..15): BOOLEAN,
fill31(164:0..12): [0..8191],
MFaultAB(164:13..15): PBusFaults,
fill32(165:0..14): [0..32767],
PKillRequestB(165:15..15): BOOLEAN,
fill33(166:0..14): [0..32767],
PAdrHigh(166:15..15): BOOLEAN,
fill34(167:0..14): [0..32767],
PAdrLowToM(167:15..15): BOOLEAN,
fill35(168:0..11): [0..4095],
PCmdToMAB(168:12..15): PBusCommands,
fill36(169:0..14): [0..32767],
DoShiftBA(169:15..15): BOOLEAN,
fill37(170:0..14): [0..32767],
DoExecuteBA(170:15..15): BOOLEAN,
fill38(171:0..14): [0..32767],
DoHoldBA(171:15..15): BOOLEAN,
fill39(172:0..14): [0..32767],
ShiftDataToPCAM(172:15..15): BOOLEAN,
fill40(173:0..14): [0..32767],
ShiftDataToMCtlPads(173:15..15): BOOLEAN];
-- port indices:
PInterfacePBitsPortIndex: CARDINAL = 20;
PInterfaceNPBitsPortIndex: CARDINAL = 21;
PInterfaceDrive: TYPE = MACHINE DEPENDENT RECORD [
fill0(0:0..14): [0 .. 32768),
Vdd(0:15..15): BOOLEAN,
fill1(1:0..14): [0 .. 32768),
Gnd(1:15..15): BOOLEAN,
fill2(2:0..14): [0 .. 32768),
PadVdd(2:15..15): BOOLEAN,
fill3(3:0..14): [0 .. 32768),
PadGnd(3:15..15): BOOLEAN,
fill4(4:0..14): [0 .. 32768),
LatchBias(4:15..15): BOOLEAN,
fill5(5:0..14): [0 .. 32768),
PData(5:15..15): BOOLEAN,
fill6(6:0..14): [0 .. 32768),
PParityB(6:15..15): BOOLEAN,
fill7(7:0..14): [0 .. 32768),
PCmdA(7:15..15): BOOLEAN,
fill8(8:0..14): [0 .. 32768),
PRejectB(8:15..15): BOOLEAN,
fill9(9:0..14): [0 .. 32768),
PFaultB(9:15..15): BOOLEAN,
fill10(10:0..14): [0 .. 32768),
PNPError(10:15..15): BOOLEAN,
fill11(11:0..14): [0 .. 32768),
PhAb(11:15..15): BOOLEAN,
fill12(12:0..14): [0 .. 32768),
PhBb(12:15..15): BOOLEAN,
fill13(13:0..14): [0 .. 32768),
PhAh(13:15..15): BOOLEAN,
fill14(14:0..14): [0 .. 32768),
PhBh(14:15..15): BOOLEAN,
fill15(15:0..14): [0 .. 32768),
Resetb(15:15..15): BOOLEAN,
fill16(16:0..14): [0 .. 32768),
VirtualPage(16:15..15): BOOLEAN,
fill17(17:0..14): [0 .. 32768),
nVirtualPage(17:15..15): BOOLEAN,
fill18(18:0..14): [0 .. 32768),
VirtualBlock(18:15..15): BOOLEAN,
fill19(19:0..14): [0 .. 32768),
nVirtualBlock(19:15..15): BOOLEAN,
fill20(20:0..14): [0 .. 32768),
PBits(20:15..15): BOOLEAN,
fill21(21:0..14): [0 .. 32768),
nPBits(21:15..15): BOOLEAN,
fill22(22:0..14): [0 .. 32768),
nVirtualMatch(22:15..15): BOOLEAN,
fill23(23:0..14): [0 .. 32768),
nMatchPageClean(23:15..15): BOOLEAN,
fill24(24:0..14): [0 .. 32768),
nMatchCellShared(24:15..15): BOOLEAN,
fill25(25:0..14): [0 .. 32768),
nMatchTIP(25:15..15): BOOLEAN,
fill26(26:0..14): [0 .. 32768),
PAdrLow(26:15..15): BOOLEAN,
fill27(27:0..14): [0 .. 32768),
nPAdrLow(27:15..15): BOOLEAN,
fill28(28:0..14): [0 .. 32768),
PStore(28:15..15): BOOLEAN,
fill29(29:0..14): [0 .. 32768),
MDoneAB(29:15..15): BOOLEAN,
fill30(30:0..14): [0 .. 32768),
MHeldAB(30:15..15): BOOLEAN,
fill31(31:0..14): [0 .. 32768),
MFaultAB(31:15..15): BOOLEAN,
fill32(32:0..14): [0 .. 32768),
PKillRequestB(32:15..15): BOOLEAN,
fill33(33:0..14): [0 .. 32768),
PAdrHigh(33:15..15): BOOLEAN,
fill34(34:0..14): [0 .. 32768),
PAdrLowToM(34:15..15): BOOLEAN,
fill35(35:0..14): [0 .. 32768),
PCmdToMAB(35:15..15): BOOLEAN,
fill36(36:0..14): [0 .. 32768),
DoShiftBA(36:15..15): BOOLEAN,
fill37(37:0..14): [0 .. 32768),
DoExecuteBA(37:15..15): BOOLEAN,
fill38(38:0..14): [0 .. 32768),
DoHoldBA(38:15..15): BOOLEAN,
fill39(39:0..14): [0 .. 32768),
ShiftDataToPCAM(39:15..15): BOOLEAN,
fill40(40:0..14): [0 .. 32768),
ShiftDataToMCtlPads(40:15..15): BOOLEAN];
PInterfaceExpand: ExpandProc = {
PrivateLookupNode: PROC [name: ROPE] RETURNS [node: Node] = {node ← RoseCreate.LookupNode[from: thisCell, path: LIST[name]]};
Vdd: Node ← PrivateLookupNode["Vdd"];
Gnd: Node ← PrivateLookupNode["Gnd"];
PadVdd: Node ← PrivateLookupNode["PadVdd"];
PadGnd: Node ← PrivateLookupNode["PadGnd"];
LatchBias: Node ← PrivateLookupNode["LatchBias"];
PData: Node ← PrivateLookupNode["PData"];
PParityB: Node ← PrivateLookupNode["PParityB"];
PCmdA: Node ← PrivateLookupNode["PCmdA"];
PRejectB: Node ← PrivateLookupNode["PRejectB"];
PFaultB: Node ← PrivateLookupNode["PFaultB"];
PNPError: Node ← PrivateLookupNode["PNPError"];
PhAb: Node ← PrivateLookupNode["PhAb"];
PhBb: Node ← PrivateLookupNode["PhBb"];
PhAh: Node ← PrivateLookupNode["PhAh"];
PhBh: Node ← PrivateLookupNode["PhBh"];
Resetb: Node ← PrivateLookupNode["Resetb"];
VirtualPage: Node ← PrivateLookupNode["VirtualPage"];
nVirtualPage: Node ← PrivateLookupNode["nVirtualPage"];
VirtualBlock: Node ← PrivateLookupNode["VirtualBlock"];
nVirtualBlock: Node ← PrivateLookupNode["nVirtualBlock"];
PBits: Node ← PrivateLookupNode["PBits"];
nPBits: Node ← PrivateLookupNode["nPBits"];
nVirtualMatch: Node ← PrivateLookupNode["nVirtualMatch"];
nMatchPageClean: Node ← PrivateLookupNode["nMatchPageClean"];
nMatchCellShared: Node ← PrivateLookupNode["nMatchCellShared"];
nMatchTIP: Node ← PrivateLookupNode["nMatchTIP"];
PAdrLow: Node ← PrivateLookupNode["PAdrLow"];
nPAdrLow: Node ← PrivateLookupNode["nPAdrLow"];
PStore: Node ← PrivateLookupNode["PStore"];
MDoneAB: Node ← PrivateLookupNode["MDoneAB"];
MHeldAB: Node ← PrivateLookupNode["MHeldAB"];
MFaultAB: Node ← PrivateLookupNode["MFaultAB"];
PKillRequestB: Node ← PrivateLookupNode["PKillRequestB"];
PAdrHigh: Node ← PrivateLookupNode["PAdrHigh"];
PAdrLowToM: Node ← PrivateLookupNode["PAdrLowToM"];
PCmdToMAB: Node ← PrivateLookupNode["PCmdToMAB"];
DoShiftBA: Node ← PrivateLookupNode["DoShiftBA"];
DoExecuteBA: Node ← PrivateLookupNode["DoExecuteBA"];
DoHoldBA: Node ← PrivateLookupNode["DoHoldBA"];
ShiftDataToPCAM: Node ← PrivateLookupNode["ShiftDataToPCAM"];
ShiftDataToMCtlPads: Node ← PrivateLookupNode["ShiftDataToMCtlPads"];
PDataI: Node ← RoseCreate.CreateNode[within: thisCell, name: "PDataI", type: NumTypes.NumType[32]];
NodeCreateHack1: PROC [name: ROPE] RETURNS [node: Node] = {node ← RoseCreate.CreateNode[within: thisCell, name: name, type: NumTypes.boolType]};
DrivePData: Node ← NodeCreateHack1["DrivePData"];
DrivePDataI: Node ← NodeCreateHack1["DrivePDataI"];
PParityI: Node ← NodeCreateHack1["PParityI"];
PCmdI: Node ← RoseCreate.CreateNode[within: thisCell, name: "PCmdI", type: EnumTypes.EnumType["Dragon.PBusCommands"]];
PRejectDriveHigh: Node ← NodeCreateHack1["PRejectDriveHigh"];
PRejectDriveLow: Node ← NodeCreateHack1["PRejectDriveLow"];
PFaultDrive: Node ← NodeCreateHack1["PFaultDrive"];
PFaultI: Node ← RoseCreate.CreateNode[within: thisCell, name: "PFaultI", type: EnumTypes.EnumType["Dragon.PBusFaults"]];
PNPErrorDriveLow: Node ← NodeCreateHack1["PNPErrorDriveLow"];
ShiftFeedBack: Node ← NodeCreateHack1["ShiftFeedBack"];
nShiftFeedBack: Node ← NodeCreateHack1["nShiftFeedBack"];
ShiftEqual: Node ← NodeCreateHack1["ShiftEqual"];
nShiftEqual: Node ← NodeCreateHack1["nShiftEqual"];
ShiftShift: Node ← NodeCreateHack1["ShiftShift"];
nShiftShift: Node ← NodeCreateHack1["nShiftShift"];
ShiftDataToPCtl: Node ← NodeCreateHack1["ShiftDataToPCtl"];
ShiftDataToPRAMDriver: Node ← NodeCreateHack1["ShiftDataToPRAMDriver"];
ShiftToEnable: Node ← NodeCreateHack1["ShiftToEnable"];
ShiftToMustBeOne: Node ← NodeCreateHack1["ShiftToMustBeOne"];
PDataIToVAReg: Node ← NodeCreateHack1["PDataIToVAReg"];
ReadVAReg: Node ← NodeCreateHack1["ReadVAReg"];
nReadVAReg: Node ← NodeCreateHack1["nReadVAReg"];
RequestMatch: Node ← RoseCreate.CreateNode[within: thisCell, name: "RequestMatch", type: SwitchTypes.bitType];
nPBitsPrecharge: Node ← NodeCreateHack1["nPBitsPrecharge"];
MuxRight: Node ← NodeCreateHack1["MuxRight"];
MuxLeft: Node ← NodeCreateHack1["MuxLeft"];
PBitsDrive: Node ← NodeCreateHack1["PBitsDrive"];
nPBitsDrive: Node ← NodeCreateHack1["nPBitsDrive"];
PRamRegToPDataI: Node ← NodeCreateHack1["PRamRegToPDataI"];
nPRamRegToPDataI: Node ← NodeCreateHack1["nPRamRegToPDataI"];
SensePBits: Node ← NodeCreateHack1["SensePBits"];
SensePDataI: Node ← NodeCreateHack1["SensePDataI"];
ParityIn: Node ← NodeCreateHack1["ParityIn"];
ParityOut: Node ← NodeCreateHack1["ParityOut"];
ReadPRAMReg: Node ← NodeCreateHack1["ReadPRAMReg"];
nReadPRAMReg: Node ← NodeCreateHack1["nReadPRAMReg"];
[] ← RoseCreate.CreateCell[within: thisCell, instanceName: "pCAMDriver", className: "PCAMDriver", interfaceNodes: ""];
[] ← RoseCreate.CreateCell[within: thisCell, instanceName: "pCtl", className: "PCtl", interfaceNodes: ""];
[] ← RoseCreate.CreateCell[within: thisCell, instanceName: "pRAMDriver", className: "PRAMDriver", interfaceNodes: ""];
[] ← RoseCreate.CreateCell[within: thisCell, instanceName: "pDataPads", className: "PDataPads", interfaceNodes: ""];
[] ← RoseCreate.CreateCell[within: thisCell, instanceName: "pCtlPads", className: "PCtlPads", interfaceNodes: ""];
};
CreatePInterfaceIO: IOCreator = {
cell.realCellStuff.switchIO ← NEW [PInterfaceIORec];
cell.realCellStuff.newIO ← NEW [PInterfaceIORec];
cell.realCellStuff.oldIO ← NEW [PInterfaceIORec];
};
PInterfacePorts: Ports ← NEW [PortsRep[41]];
RegisterCells[];
END.