--CachePCAMDriver.Mesa
--created by RoseTranslate from CachePCAMDriver.Rose of April 30, 1984 4:15:36 pm PDT for Barth.pa at May 3, 1984 9:25:13 pm PDT
DIRECTORY
RoseTypes, RoseCreate, BitOps, BitSwOps, Dragon, SwitchTypes;
CachePCAMDriver: CEDAR PROGRAM
IMPORTS RoseCreate, BitOps, BitSwOps, Dragon =
BEGIN OPEN
RoseTypes, BitOps, BitSwOps, Dragon;
--Signal Type decls
RegisterCells: PROC =
BEGIN
CreatePCAMDriverPorts[];
[] ← RoseCreate.RegisterCellClass[className: "PCAMDriver",
expandProc: NIL,
ioCreator: CreatePCAMDriverIO, initializer: InitializePCAMDriver,
evals: [EvalSimple: PCAMDriverEvalSimple],
blackBox: NIL, stateToo: NIL,
ports: PCAMDriverPorts,
drivePrototype: NEW [PCAMDriverDrive]];
END;
CreatePCAMDriverPorts: PROC = {PCAMDriverPorts ← RoseCreate.PortsFromFile["CachePCAMDriver.PCAMDriver.rosePorts"]};
PCAMDriverIORef: TYPE = REF PCAMDriverIORec;
PCAMDriverIORec: TYPE = MACHINE DEPENDENT RECORD [
fill0(0:0..14): [0..32767],
Vdd(0:15..15): BOOLEAN,
fill1(1:0..14): [0..32767],
Gnd(1:15..15): BOOLEAN,
fill2(2:0..14): [0..32767],
LatchBias(2:15..15): BOOLEAN,
VirtualPage(3:0..31): ARRAY [0..2) OF CARDINAL,
nVirtualPage(5:0..31): ARRAY [0..2) OF CARDINAL,
fill5(7:0..9): [0..1023],
VirtualBlock(7:10..15): [0..63],
fill6(8:0..9): [0..1023],
nVirtualBlock(8:10..15): [0..63],
fill7(9:0..14): [0..32767],
ShiftDataToPCAM(9:15..15): BOOLEAN,
PDataI(10:0..31): ARRAY [0..2) OF CARDINAL,
fill9(12:0..14): [0..32767],
ShiftFeedBack(12:15..15): BOOLEAN,
fill10(13:0..14): [0..32767],
nShiftFeedBack(13:15..15): BOOLEAN,
fill11(14:0..14): [0..32767],
ShiftEqual(14:15..15): BOOLEAN,
fill12(15:0..14): [0..32767],
nShiftEqual(15:15..15): BOOLEAN,
fill13(16:0..14): [0..32767],
ShiftShift(16:15..15): BOOLEAN,
fill14(17:0..14): [0..32767],
nShiftShift(17:15..15): BOOLEAN,
fill15(18:0..14): [0..32767],
ShiftDataToPCtl(18:15..15): BOOLEAN,
fill16(19:0..14): [0..32767],
ShiftToEnable(19:15..15): BOOLEAN,
fill17(20:0..14): [0..32767],
ShiftToMustBeOne(20:15..15): BOOLEAN,
fill18(21:0..14): [0..32767],
PDataIToVAReg(21:15..15): BOOLEAN,
fill19(22:0..14): [0..32767],
ReadVAReg(22:15..15): BOOLEAN,
fill20(23:0..14): [0..32767],
nReadVAReg(23:15..15): BOOLEAN,
RequestMatch(24:0..15): SwitchTypes.SwitchVal];
-- port indices:
PCAMDriverRequestMatchPortIndex: CARDINAL = 21;
PCAMDriverDrive: TYPE = MACHINE DEPENDENT RECORD [
fill0(0:0..14): [0 .. 32768),
Vdd(0:15..15): BOOLEAN,
fill1(1:0..14): [0 .. 32768),
Gnd(1:15..15): BOOLEAN,
fill2(2:0..14): [0 .. 32768),
LatchBias(2:15..15): BOOLEAN,
fill3(3:0..14): [0 .. 32768),
VirtualPage(3:15..15): BOOLEAN,
fill4(4:0..14): [0 .. 32768),
nVirtualPage(4:15..15): BOOLEAN,
fill5(5:0..14): [0 .. 32768),
VirtualBlock(5:15..15): BOOLEAN,
fill6(6:0..14): [0 .. 32768),
nVirtualBlock(6:15..15): BOOLEAN,
fill7(7:0..14): [0 .. 32768),
ShiftDataToPCAM(7:15..15): BOOLEAN,
fill8(8:0..14): [0 .. 32768),
PDataI(8:15..15): BOOLEAN,
fill9(9:0..14): [0 .. 32768),
ShiftFeedBack(9:15..15): BOOLEAN,
fill10(10:0..14): [0 .. 32768),
nShiftFeedBack(10:15..15): BOOLEAN,
fill11(11:0..14): [0 .. 32768),
ShiftEqual(11:15..15): BOOLEAN,
fill12(12:0..14): [0 .. 32768),
nShiftEqual(12:15..15): BOOLEAN,
fill13(13:0..14): [0 .. 32768),
ShiftShift(13:15..15): BOOLEAN,
fill14(14:0..14): [0 .. 32768),
nShiftShift(14:15..15): BOOLEAN,
fill15(15:0..14): [0 .. 32768),
ShiftDataToPCtl(15:15..15): BOOLEAN,
fill16(16:0..14): [0 .. 32768),
ShiftToEnable(16:15..15): BOOLEAN,
fill17(17:0..14): [0 .. 32768),
ShiftToMustBeOne(17:15..15): BOOLEAN,
fill18(18:0..14): [0 .. 32768),
PDataIToVAReg(18:15..15): BOOLEAN,
fill19(19:0..14): [0 .. 32768),
ReadVAReg(19:15..15): BOOLEAN,
fill20(20:0..14): [0 .. 32768),
nReadVAReg(20:15..15): BOOLEAN,
fill21(21:0..14): [0 .. 32768),
RequestMatch(21:15..15): BOOLEAN];
PCAMDriverStateRef: TYPE = REF PCAMDriverStateRec;
PCAMDriverStateRec: TYPE = RECORD [
shiftData, nshiftData: BitDWord,
pageAddress, vPMask, vPData: BitDWord,
blockAddress, vBlMask, vBlData: BitWord
];
CreatePCAMDriverIO: IOCreator = {
cell.realCellStuff.switchIO ← NEW [PCAMDriverIORec];
cell.realCellStuff.newIO ← NEW [PCAMDriverIORec];
cell.realCellStuff.oldIO ← NEW [PCAMDriverIORec];
};
InitializePCAMDriver: Initializer = {
IF leafily THEN
BEGIN
state: PCAMDriverStateRef ← NEW [PCAMDriverStateRec];
cell.realCellStuff.state ← state;
END;
};
PCAMDriverEvalSimple: CellProc =
BEGIN
sw: PCAMDriverIORef ← NARROW[cell.realCellStuff.switchIO];
newIO: PCAMDriverIORef ← NARROW[cell.realCellStuff.newIO];
state: PCAMDriverStateRef ← NARROW[cell.realCellStuff.state];
BEGIN OPEN newIO, state;
Assert[NOT MoreThanOneOf[ShiftFeedBack, nShiftFeedBack]];
Assert[NOT MoreThanOneOf[ShiftEqual, nShiftEqual]];
Assert[NOT MoreThanOneOf[ShiftShift, nShiftShift]];
Assert[NOT MoreThanOneOf[ReadVAReg, nReadVAReg]];
Assert[NOT MoreThanOneOf[ShiftFeedBack, ShiftShift, ReadVAReg]];
IF ShiftShift THEN {
nshiftData ← MDTD[DNOT[shiftData, 30], 30, 0, 29, nshiftData, 30, 1, 29];
nshiftData ← IBID[NOT ShiftDataToPCAM, nshiftData, 30, 0];
};
IF ShiftFeedBack THEN {
nshiftData ← MDTD[DNOT[shiftData, 30], 30, 0, 30, nshiftData, 30, 0, 30];
};
IF ShiftEqual THEN {
shiftData ← MDTD[DNOT[nshiftData, 30], 30, 0, 30, shiftData, 30, 0, 30];
ShiftDataToPCtl ← EBFD[shiftData, 30, 29];
};
IF ShiftShift AND ShiftEqual THEN {
FOR i: CARDINAL IN [0..30) DO
shiftData ← IBID[ShiftDataToPCAM, shiftData, 30, i];
ENDLOOP;
FOR i: CARDINAL IN [0..30) DO
nshiftData ← IBID[NOT ShiftDataToPCAM, nshiftData, 30, i];
ENDLOOP;
};
IF PDataIToVAReg THEN {
pageAddress ← MDTD[PDataI, 32, 0, 24, pageAddress, 24, 0, 24];
blockAddress ← MDTW[PDataI, 32, 24, 6, blockAddress, 6, 0, 6]
};
VirtualPage ← DAND[pageAddress, DOR[vPMask, DNOT[vPData, 24]]];
nVirtualPage ← DNOT[VirtualPage, 24];
VirtualBlock ← WAND[blockAddress, WOR[vBlMask, WNOT[vBlData, 6]]];
nVirtualBlock ← WNOT[VirtualBlock, 6];
IF ReadVAReg THEN {
nshiftData ← MDTD[DNOT[pageAddress, 24], 24, 0, 24, nshiftData, 30, 0, 24];
nshiftData ← MWTD[WNOT[blockAddress, 6], 6, 0, 6, nshiftData, 30, 24, 6];
};
IF ShiftToEnable THEN {
vPData ← MDTD[shiftData, 30, 0, 24, vPData, 24, 0, 24];
vBlData ← MDTW[shiftData, 30, 24, 6, vBlData, 6, 0, 6];
};
IF ShiftToMustBeOne THEN {
vPMask ← MDTD[shiftData, 30, 0, 24, vPMask, 24, 0, 24];
vBlMask ← MDTW[shiftData, 30, 24, 6, vBlMask, 6, 0, 6];
};
RequestMatch ← SIBISS[(DAND[pageAddress, vPMask]#DAND[vPData, vPMask]) OR (WAND[blockAddress, vBlMask]#WAND[vBlData, vBlMask]), RequestMatch, [[none, X], [drive, L]]];
END;
END;
PCAMDriverPorts: Ports ← NEW [PortsRep[22]];
RegisterCells[];
END.