--CacheMPads.Mesa
    --created by RoseTranslate from CacheMPads.Rose of May 23, 1984 5:13:29 pm PDT for Barth.pa at May 23, 1984 5:15:44 pm PDT


    DIRECTORY
        RoseTypes, RoseCreate, BitOps, Dragon;

    CacheMPads: CEDAR PROGRAM
        IMPORTS RoseCreate, Dragon =

    BEGIN OPEN
        RoseTypes, BitOps, Dragon;

    --Signal Type decls
        MBusCommands: TYPE = Dragon.MBusCommands;


    RegisterCells: PROC =
        BEGIN
        CreateMDataPadsPorts[];
        [] _ RoseCreate.RegisterCellClass[className: "MDataPads",
            expandProc: NIL,
            ioCreator: CreateMDataPadsIO, initializer: InitializeMDataPads,
            evals: [EvalSimple: MDataPadsEvalSimple],
            blackBox: NIL, stateToo: NIL,
            ports: MDataPadsPorts,
            drivePrototype: NEW [MDataPadsDrive]];
        CreateMCtlPadsPorts[];
        [] _ RoseCreate.RegisterCellClass[className: "MCtlPads",
            expandProc: NIL,
            ioCreator: CreateMCtlPadsIO, initializer: InitializeMCtlPads,
            evals: [EvalSimple: MCtlPadsEvalSimple],
            blackBox: NIL, stateToo: NIL,
            ports: MCtlPadsPorts,
            drivePrototype: NEW [MCtlPadsDrive]];
        END;

    CreateMDataPadsPorts: PROC = {MDataPadsPorts _ RoseCreate.PortsFromFile["CacheMPads.MDataPads.rosePorts"]};

    MDataPadsIORef: TYPE = REF MDataPadsIORec;
    MDataPadsIORec: TYPE = MACHINE DEPENDENT RECORD [
        fill0(0:0..14): [0..32767],
        Vdd(0:15..15): BOOLEAN,
        fill1(1:0..14): [0..32767],
        Gnd(1:15..15): BOOLEAN,
        fill2(2:0..14): [0..32767],
        PadVdd(2:15..15): BOOLEAN,
        fill3(3:0..14): [0..32767],
        PadGnd(3:15..15): BOOLEAN,
        fill4(4:0..14): [0..32767],
        LatchBias(4:15..15): BOOLEAN,
        MDataBA(5:0..31): ARRAY [0..2) OF CARDINAL,
        fill6(7:0..14): [0..32767],
        MParityBA(7:15..15): BOOLEAN,
        fill7(8:0..14): [0..32767],
        PhAh(8:15..15): BOOLEAN,
        MDataI(9:0..31): ARRAY [0..2) OF CARDINAL,
        fill9(11:0..14): [0..32767],
        MParityI(11:15..15): BOOLEAN,
        fill10(12:0..14): [0..32767],
        MDataDrive(12:15..15): BOOLEAN,
        fill11(13:0..14): [0..32767],
        MDataIDrive(13:15..15): BOOLEAN,
        fill12(14:0..14): [0..32767],
        MDataPipeBypass(14:15..15): BOOLEAN,
        fill13(15:0..14): [0..32767],
        MDataPipeTransfer(15:15..15): BOOLEAN];

    -- port indices:


    MDataPadsDrive: TYPE = MACHINE DEPENDENT RECORD [
        fill0(0:0..14): [0 .. 32768),
        Vdd(0:15..15): BOOLEAN,
        fill1(1:0..14): [0 .. 32768),
        Gnd(1:15..15): BOOLEAN,
        fill2(2:0..14): [0 .. 32768),
        PadVdd(2:15..15): BOOLEAN,
        fill3(3:0..14): [0 .. 32768),
        PadGnd(3:15..15): BOOLEAN,
        fill4(4:0..14): [0 .. 32768),
        LatchBias(4:15..15): BOOLEAN,
        fill5(5:0..14): [0 .. 32768),
        MDataBA(5:15..15): BOOLEAN,
        fill6(6:0..14): [0 .. 32768),
        MParityBA(6:15..15): BOOLEAN,
        fill7(7:0..14): [0 .. 32768),
        PhAh(7:15..15): BOOLEAN,
        fill8(8:0..14): [0 .. 32768),
        MDataI(8:15..15): BOOLEAN,
        fill9(9:0..14): [0 .. 32768),
        MParityI(9:15..15): BOOLEAN,
        fill10(10:0..14): [0 .. 32768),
        MDataDrive(10:15..15): BOOLEAN,
        fill11(11:0..14): [0 .. 32768),
        MDataIDrive(11:15..15): BOOLEAN,
        fill12(12:0..14): [0 .. 32768),
        MDataPipeBypass(12:15..15): BOOLEAN,
        fill13(13:0..14): [0 .. 32768),
        MDataPipeTransfer(13:15..15): BOOLEAN];


    MDataPadsStateRef: TYPE = REF MDataPadsStateRec;
    MDataPadsStateRec: TYPE = RECORD [
    mPadRegAB, mPadRegBA: BitDWord,
    mPadRegParityAB, mPadRegParityBA: BOOL
        ];

    CreateMDataPadsIO: IOCreator = {
        cell.realCellStuff.newIO _ NEW [MDataPadsIORec];
        cell.realCellStuff.oldIO _ NEW [MDataPadsIORec];
        };

    InitializeMDataPads: Initializer = {
        IF leafily THEN
            BEGIN
            state: MDataPadsStateRef _ NEW [MDataPadsStateRec];
            cell.realCellStuff.state _ state;
            END;
        };

    MDataPadsEvalSimple: CellProc =
        BEGIN
        newIO: MDataPadsIORef _ NARROW[cell.realCellStuff.newIO];
        state: MDataPadsStateRef _ NARROW[cell.realCellStuff.state];
            BEGIN OPEN newIO, state;
            Assert[NOT MoreThanOneOf[MDataPipeBypass, MDataPipeTransfer]];
            IF PhAh THEN {
            mPadRegAB _ MDataI;
            mPadRegParityAB _ MParityI;
            };
            IF MDataPipeTransfer THEN {
            mPadRegBA _ mPadRegAB;
            mPadRegParityBA _ mPadRegParityAB;
            };
            IF MDataPipeBypass THEN {
            mPadRegBA _ MDataI;
            mPadRegParityBA _ MParityI;
            };
            IF MDataDrive THEN {
            MDataBA _ mPadRegBA;
            MParityBA _ mPadRegParityBA;
            };
            IF MDataIDrive THEN {
            MDataI _ MDataBA;
            MParityI _ MParityBA;
            };
            END;
        END;

    MDataPadsPorts: Ports _ NEW [PortsRep[14]];

    CreateMCtlPadsPorts: PROC = {MCtlPadsPorts _ RoseCreate.PortsFromFile["CacheMPads.MCtlPads.rosePorts"]};

    MCtlPadsIORef: TYPE = REF MCtlPadsIORec;
    MCtlPadsIORec: TYPE = MACHINE DEPENDENT RECORD [
        fill0(0:0..14): [0..32767],
        PhA(0:15..15): BOOLEAN,
        fill1(1:0..14): [0..32767],
        PhB(1:15..15): BOOLEAN,
        fill2(2:0..14): [0..32767],
        Vdd(2:15..15): BOOLEAN,
        fill3(3:0..14): [0..32767],
        Gnd(3:15..15): BOOLEAN,
        fill4(4:0..14): [0..32767],
        PadVdd(4:15..15): BOOLEAN,
        fill5(5:0..14): [0..32767],
        PadGnd(5:15..15): BOOLEAN,
        fill6(6:0..14): [0..32767],
        LatchBias(6:15..15): BOOLEAN,
        fill7(7:0..11): [0..4095],
        MCmdBA(7:12..15): MBusCommands,
        fill8(8:0..14): [0..32767],
        MNShared(8:15..15): BOOLEAN,
        fill9(9:0..14): [0..32767],
        MParityBA(9:15..15): BOOLEAN,
        fill10(10:0..14): [0..32767],
        MNError(10:15..15): BOOLEAN,
        fill11(11:0..14): [0..32767],
        MReadyBA(11:15..15): BOOLEAN,
        fill12(12:0..14): [0..32767],
        MRq(12:15..15): BOOLEAN,
        fill13(13:0..14): [0..32767],
        MNewRq(13:15..15): BOOLEAN,
        fill14(14:0..14): [0..32767],
        MGnt(14:15..15): BOOLEAN,
        fill15(15:0..14): [0..32767],
        ResetAB(15:15..15): BOOLEAN,
        fill16(16:0..14): [0..32767],
        DHoldAB(16:15..15): BOOLEAN,
        fill17(17:0..14): [0..32767],
        DShiftAB(17:15..15): BOOLEAN,
        fill18(18:0..14): [0..32767],
        DExecuteAB(18:15..15): BOOLEAN,
        fill19(19:0..14): [0..32767],
        DNSelectAB(19:15..15): BOOLEAN,
        fill20(20:0..14): [0..32767],
        DDataInAB(20:15..15): BOOLEAN,
        fill21(21:0..14): [0..32767],
        DDataOutAB(21:15..15): BOOLEAN,
        fill22(22:0..14): [0..32767],
        PhAb(22:15..15): BOOLEAN,
        fill23(23:0..14): [0..32767],
        nPhAb(23:15..15): BOOLEAN,
        fill24(24:0..14): [0..32767],
        PhBb(24:15..15): BOOLEAN,
        fill25(25:0..14): [0..32767],
        nPhBb(25:15..15): BOOLEAN,
        fill26(26:0..14): [0..32767],
        PhAh(26:15..15): BOOLEAN,
        fill27(27:0..14): [0..32767],
        PhBh(27:15..15): BOOLEAN,
        fill28(28:0..14): [0..32767],
        Resetb(28:15..15): BOOLEAN,
        fill29(29:0..14): [0..32767],
        DoShiftBA(29:15..15): BOOLEAN,
        fill30(30:0..14): [0..32767],
        DoExecuteBA(30:15..15): BOOLEAN,
        fill31(31:0..14): [0..32767],
        DoHoldBA(31:15..15): BOOLEAN,
        fill32(32:0..14): [0..32767],
        ShiftDataToMCtlPads(32:15..15): BOOLEAN,
        fill33(33:0..11): [0..4095],
        MCmdIn(33:12..15): MBusCommands,
        fill34(34:0..11): [0..4095],
        MCmdOutBA(34:12..15): MBusCommands,
        fill35(35:0..14): [0..32767],
        MCmdDrive(35:15..15): BOOLEAN,
        fill36(36:0..14): [0..32767],
        MCmdDriveToDataTransport(36:15..15): BOOLEAN,
        fill37(37:0..14): [0..32767],
        MCmdDriveToNoOp(37:15..15): BOOLEAN,
        fill38(38:0..14): [0..32767],
        MNSharedSenseBA(38:15..15): BOOLEAN,
        fill39(39:0..14): [0..32767],
        MNSharedDriveHigh(39:15..15): BOOLEAN,
        fill40(40:0..14): [0..32767],
        MNSharedDriveLow(40:15..15): BOOLEAN,
        fill41(41:0..14): [0..32767],
        MNErrorDriveLow(41:15..15): BOOLEAN,
        fill42(42:0..14): [0..32767],
        MReadySense(42:15..15): BOOLEAN,
        fill43(43:0..14): [0..32767],
        MRqIBA(43:15..15): BOOLEAN,
        fill44(44:0..14): [0..32767],
        MNewRqIBA(44:15..15): BOOLEAN,
        fill45(45:0..14): [0..32767],
        MNewRqEnableBA(45:15..15): BOOLEAN,
        fill46(46:0..14): [0..32767],
        MGntSense(46:15..15): BOOLEAN,
        fill47(47:0..14): [0..32767],
        ShiftDataToMRAM(47:15..15): BOOLEAN,
        fill48(48:0..14): [0..32767],
        ShiftShift(48:15..15): BOOLEAN,
        fill49(49:0..14): [0..32767],
        nShiftShift(49:15..15): BOOLEAN];

    -- port indices:


    MCtlPadsDrive: TYPE = MACHINE DEPENDENT RECORD [
        fill0(0:0..14): [0 .. 32768),
        PhA(0:15..15): BOOLEAN,
        fill1(1:0..14): [0 .. 32768),
        PhB(1:15..15): BOOLEAN,
        fill2(2:0..14): [0 .. 32768),
        Vdd(2:15..15): BOOLEAN,
        fill3(3:0..14): [0 .. 32768),
        Gnd(3:15..15): BOOLEAN,
        fill4(4:0..14): [0 .. 32768),
        PadVdd(4:15..15): BOOLEAN,
        fill5(5:0..14): [0 .. 32768),
        PadGnd(5:15..15): BOOLEAN,
        fill6(6:0..14): [0 .. 32768),
        LatchBias(6:15..15): BOOLEAN,
        fill7(7:0..14): [0 .. 32768),
        MCmdBA(7:15..15): BOOLEAN,
        fill8(8:0..14): [0 .. 32768),
        MNShared(8:15..15): BOOLEAN,
        fill9(9:0..14): [0 .. 32768),
        MParityBA(9:15..15): BOOLEAN,
        fill10(10:0..14): [0 .. 32768),
        MNError(10:15..15): BOOLEAN,
        fill11(11:0..14): [0 .. 32768),
        MReadyBA(11:15..15): BOOLEAN,
        fill12(12:0..14): [0 .. 32768),
        MRq(12:15..15): BOOLEAN,
        fill13(13:0..14): [0 .. 32768),
        MNewRq(13:15..15): BOOLEAN,
        fill14(14:0..14): [0 .. 32768),
        MGnt(14:15..15): BOOLEAN,
        fill15(15:0..14): [0 .. 32768),
        ResetAB(15:15..15): BOOLEAN,
        fill16(16:0..14): [0 .. 32768),
        DHoldAB(16:15..15): BOOLEAN,
        fill17(17:0..14): [0 .. 32768),
        DShiftAB(17:15..15): BOOLEAN,
        fill18(18:0..14): [0 .. 32768),
        DExecuteAB(18:15..15): BOOLEAN,
        fill19(19:0..14): [0 .. 32768),
        DNSelectAB(19:15..15): BOOLEAN,
        fill20(20:0..14): [0 .. 32768),
        DDataInAB(20:15..15): BOOLEAN,
        fill21(21:0..14): [0 .. 32768),
        DDataOutAB(21:15..15): BOOLEAN,
        fill22(22:0..14): [0 .. 32768),
        PhAb(22:15..15): BOOLEAN,
        fill23(23:0..14): [0 .. 32768),
        nPhAb(23:15..15): BOOLEAN,
        fill24(24:0..14): [0 .. 32768),
        PhBb(24:15..15): BOOLEAN,
        fill25(25:0..14): [0 .. 32768),
        nPhBb(25:15..15): BOOLEAN,
        fill26(26:0..14): [0 .. 32768),
        PhAh(26:15..15): BOOLEAN,
        fill27(27:0..14): [0 .. 32768),
        PhBh(27:15..15): BOOLEAN,
        fill28(28:0..14): [0 .. 32768),
        Resetb(28:15..15): BOOLEAN,
        fill29(29:0..14): [0 .. 32768),
        DoShiftBA(29:15..15): BOOLEAN,
        fill30(30:0..14): [0 .. 32768),
        DoExecuteBA(30:15..15): BOOLEAN,
        fill31(31:0..14): [0 .. 32768),
        DoHoldBA(31:15..15): BOOLEAN,
        fill32(32:0..14): [0 .. 32768),
        ShiftDataToMCtlPads(32:15..15): BOOLEAN,
        fill33(33:0..14): [0 .. 32768),
        MCmdIn(33:15..15): BOOLEAN,
        fill34(34:0..14): [0 .. 32768),
        MCmdOutBA(34:15..15): BOOLEAN,
        fill35(35:0..14): [0 .. 32768),
        MCmdDrive(35:15..15): BOOLEAN,
        fill36(36:0..14): [0 .. 32768),
        MCmdDriveToDataTransport(36:15..15): BOOLEAN,
        fill37(37:0..14): [0 .. 32768),
        MCmdDriveToNoOp(37:15..15): BOOLEAN,
        fill38(38:0..14): [0 .. 32768),
        MNSharedSenseBA(38:15..15): BOOLEAN,
        fill39(39:0..14): [0 .. 32768),
        MNSharedDriveHigh(39:15..15): BOOLEAN,
        fill40(40:0..14): [0 .. 32768),
        MNSharedDriveLow(40:15..15): BOOLEAN,
        fill41(41:0..14): [0 .. 32768),
        MNErrorDriveLow(41:15..15): BOOLEAN,
        fill42(42:0..14): [0 .. 32768),
        MReadySense(42:15..15): BOOLEAN,
        fill43(43:0..14): [0 .. 32768),
        MRqIBA(43:15..15): BOOLEAN,
        fill44(44:0..14): [0 .. 32768),
        MNewRqIBA(44:15..15): BOOLEAN,
        fill45(45:0..14): [0 .. 32768),
        MNewRqEnableBA(45:15..15): BOOLEAN,
        fill46(46:0..14): [0 .. 32768),
        MGntSense(46:15..15): BOOLEAN,
        fill47(47:0..14): [0 .. 32768),
        ShiftDataToMRAM(47:15..15): BOOLEAN,
        fill48(48:0..14): [0 .. 32768),
        ShiftShift(48:15..15): BOOLEAN,
        fill49(49:0..14): [0 .. 32768),
        nShiftShift(49:15..15): BOOLEAN];


    MCtlPadsStateRef: TYPE = REF MCtlPadsStateRec;
    MCtlPadsStateRec: TYPE = RECORD [
    shiftAB, shiftBA: BOOL,  -- note that these are static bits, unlike the rest of the shift register
    doHoldAB: BOOL
        ];

    CreateMCtlPadsIO: IOCreator = {
        cell.realCellStuff.newIO _ NEW [MCtlPadsIORec];
        cell.realCellStuff.oldIO _ NEW [MCtlPadsIORec];
        };

    InitializeMCtlPads: Initializer = {
        IF leafily THEN
            BEGIN
            state: MCtlPadsStateRef _ NEW [MCtlPadsStateRec];
            cell.realCellStuff.state _ state;
            END;
        };

    MCtlPadsEvalSimple: CellProc =
        BEGIN
        newIO: MCtlPadsIORef _ NARROW[cell.realCellStuff.newIO];
        state: MCtlPadsStateRef _ NARROW[cell.realCellStuff.state];
            BEGIN OPEN newIO, state;
            PhAb _ PhA;
            nPhAb _ NOT PhA;
            PhBb _ PhB;
            nPhBb _ NOT PhB;
            IF PhBb THEN {
            Resetb _ ResetAB;
            DoHoldBA _ DHoldAB;
            DoShiftBA _ DShiftAB AND NOT DNSelectAB;
            DoExecuteBA _ DExecuteAB AND NOT DNSelectAB;
            shiftBA _ DDataInAB;
            };
            ShiftDataToMRAM _ shiftBA;
            IF ShiftShift THEN shiftAB _ ShiftDataToMCtlPads;
            IF NOT DNSelectAB THEN DDataOutAB _ shiftAB;
            IF PhAb THEN doHoldAB _ DoHoldBA;
            PhAh _ PhAb AND NOT DoHoldBA;
            PhBh _ PhBb AND NOT doHoldAB;
            MCmdIn _ MCmdBA;
            IF MCmdDrive THEN MCmdBA _ MCmdOutBA;
            IF MCmdDriveToDataTransport THEN MCmdBA _ DataTransport;
            IF MCmdDriveToNoOp THEN MCmdBA _ NoOp;
            MNSharedSenseBA _ MNShared;
            IF MNSharedDriveHigh THEN MNShared _ TRUE;
            IF MNSharedDriveLow THEN MNShared _ FALSE;
            IF MNErrorDriveLow THEN MNError _ FALSE;
            MReadySense _ MReadyBA;
            MRq _ MRqIBA;
            IF MNewRqEnableBA THEN MNewRq _ MNewRqIBA;
            MGntSense _ MGnt;
            END;
        END;

    MCtlPadsPorts: Ports _ NEW [PortsRep[50]];

    RegisterCells[];

    END.