> MDataBA=INT[32], MCmdBA=EnumType["Dragon.MBusCommands"], MNShared=BOOL, MParityBA=BOOL, MNError>BOOL, MReadyBABOOL, MNewRq=BOOL, MGnt> <> <> ResetAB> <> PhAb, nPhAb, PhBb, nPhBb>BOOL, PhAh, PhBh>BOOL, Resetb>BOOL, <<>> <> VirtualPageINT[24], RealBlock, nRealBlock>INT[6], CAMPageAccess, nCAMPageAccess=SWITCH[24], CAMBlockAccess, nCAMBlockAccess=SWITCH[6], <> PBits, nPBits=SWITCH[66], MBits, nMBits=SWITCH[66], <> nVirtualMatch, nMatchPageClean, nMatchCellShared=BOOL, nMapValid, nRealMatch, nVictimClean=BOOL, CellAdr, nCellAdr>INT[8], VirtualAccess, nVirtualAccess, SelCell, SelVictimAdr, SelMapAdr, SelRealData, SelPageFlag, SelVictimData, SelRealAdr>BOOL, FinishSharedStore>BOOL, VPValid, nVPValid, RPValid, nRPValid, RPDirty, nRPDirty, Master, nMaster, Shared, nShared, Victim, nVictim, TIP, nTIP, Broken, nBroken=BIT, MAdrLow, nMAdrLow>BOOL, VictimFeedback, nVictimFeedback, ShiftVictim, nShiftVictim>BOOL, ForceDataSelect>BOOL, <

M control>> MDoneAB, MHeldAB>BOOL, MFaultAB>EnumType["Dragon.PBusFaults"], PAdrHigh, PAdrLowToM> DoShiftBA, DoExecuteBA, DoHoldBA, ShiftDataToPCAM>BOOL, ShiftDataToMCtlPads> <> MDataI:INT[32]; MDataDrive, MDataIDrive, MDataPipeBypass, MDataPipeTransfer:BOOL; MParityI:BOOL; MCmdIn:EnumType["Dragon.MBusCommands"]; MCmdOutBA:EnumType["Dragon.MBusCommands"]; MCmdDrive:BOOL; MCmdDriveToDataTransport:BOOL; MCmdDriveToNoOp:BOOL; MNSharedSenseBA:BOOL; MNSharedDriveHigh:BOOL; MNSharedDriveLow:BOOL; MNErrorDriveLow:BOOL; MReadySense:BOOL; MRqIBA:BOOL; MNewRqIBA:BOOL; MNewRqEnableBA:BOOL; MGntSense:BOOL; <> ShiftDataToMRAM, ShiftDataToMCtl, ShiftDataToMCAM:BOOL; ShiftEqual, nShiftEqual, ShiftFeedBack, nShiftFeedBack, ShiftShift, nShiftShift:BOOL; <<>> <> PageAccessToAccess, BlockAccessToAccess:BOOL; PageVirtualToAccess, BlockVirtualToAccess:BOOL; MatchToAccess:BOOL; MDataToMatch, AccessToMatch:BOOL; PageAccessToMData, nPageAccessToMData:BOOL; BlockAccessToMData, nBlockAccessToMData:BOOL; AccessToPageBlockAccess, nAccessToPageBlockAccess, ShiftToPageBlockAccess, nShiftToPageBlockAccess, AccessDrive, nAccessDrive:BOOL; PageBlockAccessToShift, nPageBlockAccessToShift:BOOL; nCAMAccessPrecharge:BOOL; <> nMBitsPrecharge, MuxRight, MuxLeft, MBitsDrive, nMBitsDrive, MRamRegToMDataI, nMRamRegToMDataI, SenseMBits, SenseMDataI, ParityIn:BOOL; ParityOut:BOOL; SensePBitsLeft, SensePBitsRight, DrivePBits, nDrivePBits:BOOL; MRamRegToMBits, nMRamRegToMBits:BOOL; ShiftToMBits, nShiftToMBits, MBitsToShift, nMBitsToShift:BOOL; mCAMDriver: MCAMDriver[]; mCtl: MCtl[]; mRAMDriver: MRAMDriver[]; mDataPads: MDataPads[]; mCtlPads: MCtlPads[] ENDCELL