[Indigo]<Dragon>Cache>Rosemary>CacheMCtlFlagCtl.rose!11

CacheMCtlFlagCtl.rose

Last edited by: Barth, May 31, 1984 5:22:57 pm PDT

Imports BitOps, BitSwOps, Dragon;

Open BitOps, BitSwOps, Dragon;

MCtlFlagCtl: CELL[

Timing and housekeeping interface

Vdd, Gnd<BOOL,

LatchBias<BOOL,

Buffered timing and housekeeping interface

PhAb, PhBb<BOOL,

Resetb<BOOL,

Cell control

VPValid, nVPValid, RPValid, nRPValid, RPDirty, nRPDirty, Master, nMaster, Shared, nShared, Victim, nVictim, TIP, nTIP, Broken, nBroken=BIT-S-X,

Internal main memory interface

MDataI<INT[32],

More debug interface

ShiftFeedBack, nShiftFeedBack, ShiftEqual, nShiftEqual, ShiftShift, nShiftShift<BOOL,

Still more debug interface

ShiftDataToFlagCtl<BOOL,

ShiftDataToSequencer>BOOL,

ReadEntry, WriteEntry<BOOL,

ShiftExecute, nShiftExecute<BOOL,

Flag control interface

FlagSetShared, FlagRPDirtyVPValid, FlagFlagLatch, FlagResetVPValid, FlagSetFlags, FlagSetTIP, FlagResetTIP, FlagResetMaster<BOOL,

Control steel wool

IsCleanBA<BOOL,

LatchSharedAB<BOOL

]

State

sVPValid, snVPValid, sRPValid, snRPValid, sRPDirty, snRPDirty, sMaster, snMaster, sShared, snShared, sVictim, snVictim, sTIP, snTIP, sBroken, snBroken: BOOL,

vPValidBit, rPDirtyBit: BOOL

EvalSimple

DriveBit: PROC[bit, nBit: Switch, dBit: BOOL] RETURNS [newBit, newNBit: Switch] = {

newBit ← SIBISS[dBit, bit, [[driveStrong, L], [driveStrong, H]]];

newNBit ← SIBISS[dBit, nBit, [[driveStrong, H], [driveStrong, L]]];

};

Assert[NOT MoreThanOneOf[ShiftFeedBack, ShiftShift]];

Assert[NOT MoreThanOneOf[ShiftFeedBack, ShiftEqual]];

Assert[NOT MoreThanOneOf[ShiftEqual, ShiftShift]];

Assert[NOT MoreThanOneOf[ShiftFeedBack, nShiftFeedBack]];

Assert[NOT MoreThanOneOf[ShiftEqual, nShiftEqual]];

Assert[NOT MoreThanOneOf[ShiftShift, nShiftShift]];

{

s: SwitchTypes.Strength ← IF PhBb THEN drive ELSE none;

VPValid ← SIBISS[TRUE, VPValid, [[none, X], [s, H]]];

nVPValid ← SIBISS[TRUE, nVPValid, [[none, X], [s, H]]];

RPValid ← SIBISS[TRUE, RPValid, [[none, X], [s, H]]];

nRPValid ← SIBISS[TRUE, nRPValid, [[none, X], [s, H]]];

RPDirty ← SIBISS[TRUE, RPDirty, [[none, X], [s, H]]];

nRPDirty ← SIBISS[TRUE, nRPDirty, [[none, X], [s, H]]];

Master ← SIBISS[TRUE, Master, [[none, X], [s, H]]];

nMaster ← SIBISS[TRUE, nMaster, [[none, X], [s, H]]];

Shared ← SIBISS[TRUE, Shared, [[none, X], [s, H]]];

nShared ← SIBISS[TRUE, nShared, [[none, X], [s, H]]];

Victim ← SIBISS[TRUE, Victim, [[none, X], [s, H]]];

nVictim ← SIBISS[TRUE, nVictim, [[none, X], [s, H]]];

TIP ← SIBISS[TRUE, TIP, [[none, X], [s, H]]];

nTIP ← SIBISS[TRUE, nTIP, [[none, X], [s, H]]];

Broken ← SIBISS[TRUE, Broken, [[none, X], [s, H]]];

nBroken ← SIBISS[TRUE, nBroken, [[none, X], [s, H]]];

};

The next block of code assumes that the instructions have been set to none and only sets the instructions if a strength other than none is to be applied.

IF Resetb AND PhAb THEN {

[VPValid, nVPValid] ← DriveBit[VPValid, nVPValid, FALSE];

[RPValid, nRPValid] ← DriveBit[RPValid, nRPValid, FALSE];

[RPDirty, nRPDirty] ← DriveBit[RPDirty, nRPDirty, FALSE];

[Master, nMaster] ← DriveBit[Master, nMaster, FALSE];

[Shared, nShared] ← DriveBit[Shared, nShared, FALSE];

[Victim, nVictim] ← DriveBit[Victim, nVictim, FALSE];

[TIP, nTIP] ← DriveBit[TIP, nTIP, FALSE];

[Broken, nBroken] ← DriveBit[Broken, nBroken, FALSE];

};

IF FlagSetShared THEN [Shared, nShared] ← DriveBit[Shared, nShared, TRUE];

IF FlagRPDirtyVPValid THEN {

[VPValid, nVPValid] ← DriveBit[VPValid, nVPValid, vPValidBit];

[RPDirty, nRPDirty] ← DriveBit[RPDirty, nRPDirty, rPDirtyBit];

};

IF FlagFlagLatch THEN {

vPValidBit ← EBFD[MDataI, 32, 30];

rPDirtyBit ← EBFD[MDataI, 32, 31];

};

IF FlagResetVPValid THEN [VPValid, nVPValid] ← DriveBit[VPValid, nVPValid, FALSE];

IF FlagSetFlags THEN {

[VPValid, nVPValid] ← DriveBit[VPValid, nVPValid, TRUE];

[RPValid, nRPValid] ← DriveBit[RPValid, nRPValid, TRUE];

[RPDirty, nRPDirty] ← DriveBit[RPDirty, nRPDirty, NOT IsCleanBA];

[Master, nMaster] ← DriveBit[Master, nMaster, FALSE];

[Shared, nShared] ← DriveBit[Shared, nShared, LatchSharedAB];

[TIP, nTIP] ← DriveBit[TIP, nTIP, FALSE];

};

IF FlagSetTIP THEN [TIP, nTIP] ← DriveBit[TIP, nTIP, TRUE];

IF FlagResetTIP THEN [TIP, nTIP] ← DriveBit[TIP, nTIP, FALSE];

IF FlagResetMaster THEN [Master, nMaster] ← DriveBit[Master, nMaster, FALSE];

IF ShiftExecute AND WriteEntry THEN {

[VPValid, nVPValid] ← DriveBit[VPValid, nVPValid, sVPValid];

[RPValid, nRPValid] ← DriveBit[RPValid, nRPValid, sRPValid];

[RPDirty, nRPDirty] ← DriveBit[RPDirty, nRPDirty, sRPDirty];

[Master, nMaster] ← DriveBit[Master, nMaster, sMaster];

[Shared, nShared] ← DriveBit[Shared, nShared, sShared];

[Victim, nVictim] ← DriveBit[Victim, nVictim, sVictim];

[TIP, nTIP] ← DriveBit[TIP, nTIP, sTIP];

[Broken, nBroken] ← DriveBit[Broken, nBroken, sBroken];

};

IF ShiftExecute AND ReadEntry THEN {

snVPValid ← NOT EBFSS[VPValid];

snRPValid ← NOT EBFSS[RPValid];

snRPDirty ← NOT EBFSS[RPDirty];

snMaster ← NOT EBFSS[Master];

snShared ← NOT EBFSS[Shared];

snVictim ← NOT EBFSS[Victim];

snTIP ← NOT EBFSS[TIP];

snBroken ← NOT EBFSS[Broken];

};

IF ShiftShift THEN {

snVPValid ← NOT ShiftDataToFlagCtl;

snRPValid ← NOT sVPValid;

snRPDirty ← NOT sRPValid;

snMaster ← NOT sRPDirty;

snShared ← NOT sMaster;

snVictim ← NOT sShared;

snTIP ← NOT sVictim;

snBroken ← NOT sTIP;

};

IF ShiftFeedBack THEN {

snVPValid ← NOT sVPValid;

snRPValid ← NOT sRPValid;

snRPDirty ← NOT sRPDirty;

snMaster ← NOT sMaster;

snShared ← NOT sMaster;

snVictim ← NOT sVictim;

snTIP ← NOT sTIP;

snBroken ← NOT sBroken;

};

IF ShiftEqual THEN {

sVPValid ← NOT snVPValid;

sRPValid ← NOT snRPValid;

sRPDirty ← NOT snRPDirty;

sMaster ← NOT snMaster;

sShared ← NOT snShared;

sVictim ← NOT snVictim;

sTIP ← NOT snTIP;

sBroken ← NOT snBroken;

ShiftDataToSequencer ← sBroken;

};

ENDCELL