<> << Oracle test file for ClockInterface in DynaInterfaceChip design.>> <> <> <<>> <> <<[[[ExtCKIn=0, Clock=0, CKRecAdj=1, nEClock=0, Gnd2V=0]]] >> <<>> <> <<[[[ExtCKOut, LocCKOut, ChipCKOut, ChipCKIn=CK]]] >> <<>> <> -- data in=0; name=7; normal; DOEn; nSStop=0 (hence stop!): 0 0 000000 0 0 7 64 0 1 0 1 000000 | X X XXXXXX X X X X XXXXXX 0 0 000000 0 0 7 64 0 1 0 1 000000 | X X XXXXXX X X X X XXXXXX -- data in=0; Send=1; nSStop=1 (release stop); DOEn; normal: 0 0 000000 1 1 7 64 0 1 0 1 000000 | X X XXXXXX X X X X XXXXXX 0 0 000000 1 1 7 64 0 1 0 1 000000 | X X XXXXXX X X X X XXXXXX 0 0 000000 1 1 7 64 0 1 0 1 000000 | X X XXXXXX X X X X XXXXXX -- Stable configuration: data in=0; DOEn; normal; nSStop=1; expect results: 0 0 000000 1 1 7 64 0 1 0 1 000000 | 1 3 FFFFFF 7 X 7 0 FFFFFF 0 0 000000 1 1 7 64 0 1 0 1 000000 | 1 3 FFFFFF 7 X 7 0 FFFFFF -- test nSStop: -- test Name: -- test DBusIn: 0 0 000000 1 1 7 64 0 1 0 1 000000 | 1 3 FFFFFF 7 X 7 0 FFFFFF 1 1 000001 1 1 7 64 1 1 1 1 000001 | 0 2 FFFFFE 6 X 6 0 FFFFFE --OrInH, NRqOutB,BInH,+ 1 1 000001 1 1 7 64 1 1 1 1 000001 | 0 2 FFFFFE 6 X 6 0 FFFFFE --DInH, nDInB, nBInB 1 1 000001 0 1 7 64 1 1 1 1 000001 | 0 2 FFFFFF 6 X 6 0 FFFFFE --Send 1 1 000001 0 1 7 64 1 1 1 1 000001 | 0 2 FFFFFF 6 X 6 0 FFFFFE 1 1 000001 1 1 7 64 1 0 1 1 000001 | 0 2 FFFFFF 7 X 6 0 FFFFFE --DOEn 1 1 000001 1 1 7 64 1 0 1 1 000001 | 0 2 FFFFFE 7 X 6 0 FFFFFE 1 1 000002 1 0 7 64 2 1 2 1 000002 | 0 2 FFFFFE 5 X 5 0 FFFFFE --nSStop 1 1 000003 1 0 7 64 3 1 3 1 000003 | 0 2 FFFFFD 4 X 4 0 FFFFFD 1 1 000004 1 0 7 64 4 1 4 1 000004 | 0 2 FFFFFC 3 X 3 0 FFFFFC 1 1 000005 1 0 7 64 5 1 5 1 000005 | 0 2 FFFFFC 2 X 2 0 FFFFFC 1 1 000005 1 1 7 64 5 1 5 1 000005 | 0 2 FFFFFC 2 X 2 0 FFFFFC 1 1 000005 1 1 7 64 5 1 5 1 000005 | 0 2 FFFFFC 2 X 2 0 FFFFFC 1 1 000005 1 1 7 64 5 1 5 1 000005 | 0 2 FFFFFC 2 X 2 0 FFFFFC 1 1 000005 1 1 7 64 5 1 5 1 000005 | 0 2 FFFFFA 2 X 2 0 FFFFFA 1 1 000005 1 1 7 24 5 1 5 1 000005 | 0 2 FFFFFA 2 X 2 0 FFFFFA --Reset 1 1 000005 1 1 7 64 5 1 5 1 000005 | 0 2 FFFFFA 2 X 2 0 FFFFFA 1 1 000005 1 1 7 64 5 1 5 1 000005 | 0 2 FFFFFA 2 X 2 0 FFFFFA 1 1 000005 1 1 7 44 5 1 5 1 000005 | 0 2 FFFFFA 2 X 2 0 FFFFFA --Freeze 1 1 000006 1 1 7 64 5 1 5 1 000006 | 1 3 FFFFFF 2 X 2 0 000000 1 1 000007 1 1 7 64 5 1 5 1 000007 | 0 2 FFFFF9 2 X 2 0 FFFFF9 0 2 888888 1 1 7 64 5 1 5 1 888888 | 0 2 FFFFF8 2 X 2 0 FFFFF8 0 2 888888 1 1 7 64 5 1 5 1 888888 | 0 2 FFFFF8 2 X 2 0 FFFFF8 0 2 888888 1 1 7 64 5 1 5 1 888888 | 1 1 7777777 2 X 2 0 7777777 0 2 888888 1 1 7 6A 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 --Shift, nAddress 0 2 888888 1 1 7 62 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 6A 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 62 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 6A 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 62 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 6A 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 62 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 68 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 60 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 68 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 60 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 68 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 60 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 68 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 60 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 68 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 60 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 6C 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 --Shift, nDAddress=off 0 2 888888 1 1 7 66 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 6C 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 66 5 1 5 1 888888 | 1 1 777777 2 X 2 0 777777 0 2 888888 1 1 7 65 5 1 5 1 888888 | 1 1 777777 2 0 2 0 777777 --HybridSel 0 2 888888 1 1 7 65 5 1 5 1 888888 | 1 1 777777 2 0 2 0 777777 0 2 888888 1 1 7 6F 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 -- Shift, Data, HybSel,noAddress 0 2 888888 1 1 7 67 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 --Transfer Out ID 0 2 888888 1 1 7 6F 5 1 5 1 888888 | 1 1 777777 2 0 2 0 777777 0 2 888888 1 1 7 67 5 1 5 1 888888 | 1 1 777777 2 0 2 0 777777 0 2 888888 1 1 7 6F 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 0 2 888888 1 1 7 67 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 0 2 888888 1 1 7 6F 5 1 5 1 888888 | 1 1 777777 2 0 2 0 777777 0 2 888888 1 1 7 67 5 1 5 1 888888 | 1 1 777777 2 0 2 0 777777 0 2 888888 1 1 7 6F 5 1 5 1 888888 | 1 1 777777 2 0 2 0 777777 0 2 888888 1 1 7 67 5 1 5 1 888888 | 1 1 777777 2 0 2 0 777777 -- ID 5bits seen 0 2 888888 1 1 6 6B 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 -- 0 2 888888 1 1 6 63 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 0 2 888888 1 1 6 6B 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 -- 0 2 888888 1 1 6 63 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 0 2 888888 1 1 6 65 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 --RegSel1On 0 2 888888 1 1 6 45 5 1 5 1 888888 | 1 1 777777 2 1 2 0 777777 --FreezeOn 0 2 777777 1 1 6 45 5 1 5 1 777777 | 1 1 777777 2 1 2 0 777777 -- 0 2 666666 1 1 6 45 5 1 5 1 666666 | 1 1 888888 2 1 2 0 888888 -- 0 2 555555 1 1 6 45 5 1 5 1 555555 | 1 1 999999 2 1 2 0 999999 -- 0 2 444444 1 1 6 45 5 1 5 1 444444 | 1 1 999999 2 1 2 0 999999 -- 0 2 444444 1 1 6 5D 5 1 5 1 444444 | 1 1 999999 2 1 2 0 999999 --Execute,DShift 0 2 444444 1 1 6 55 5 1 5 1 444444 | 1 1 999999 2 1 2 0 999999 --DShift off 0 2 444444 1 1 6 55 5 1 5 1 444444 | 1 1 999999 2 1 2 0 999999 -- 0 2 444444 1 1 6 55 5 1 5 1 444444 | 1 1 999999 2 1 2 0 999999 -- 0 2 444444 1 1 6 55 5 1 5 1 444444 | 1 1 BBBBBB 2 1 2 0 BBBBBB -- Execute off 0 2 444444 1 1 6 45 5 1 5 1 444444 | 1 1 BBBBBB 2 1 2 0 BBBBBB -- 0 2 111111 1 1 6 4D 5 1 5 1 111111 | 1 1 BBBBBB 2 1 2 0 BBBBBB --Shift on 0 2 111111 1 1 6 45 5 1 5 1 111111 | 1 1 BBBBBB 2 1 2 0 BBBBBB --Shift off 0 2 111111 1 1 6 45 5 1 5 1 111111 | 1 1 BBBBBB 2 1 2 0 BBBBBB -- 0 2 111111 1 1 6 4D 5 1 5 1 111111 | 1 1 BBBBBB 2 1 2 0 BBBBBB -- Shift on 0 2 111111 1 1 6 45 5 1 5 1 111111 | 0 3 BBBBBB 2 0 2 0 777776 -- Shift off 0 2 111111 1 1 6 45 5 1 5 1 222222 | 0 3 BBBBBB 2 0 2 0 777776 -- 0 2 111111 1 1 6 45 5 1 5 1 222222 | 0 3 BBBBBB 2 0 2 0 777776 -- 0 2 111111 1 1 6 45 5 1 5 1 222222 | 1 3 777776 2 1 2 0 777776 -- 0 2 111111 1 1 4 69 5 1 5 1 222222 | 1 3 777776 2 1 2 0 777776 --TurnRegSel3 on 0 2 111111 1 1 4 61 5 1 5 1 222222 | 1 3 777776 2 1 2 0 777776 -- 0 2 111111 1 1 4 69 5 1 5 1 222222 | 1 3 777776 2 1 2 0 777776 -- 0 2 111111 1 1 4 61 5 1 5 1 222222 | 1 3 777776 2 1 2 0 777776 -- 0 2 111111 1 1 4 65 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD --RegSel3 on 0 2 111111 1 1 4 6D 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD --WriteIntClk 0 2 111111 1 1 4 65 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 4 6D 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 4 65 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 4 6F 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 4 67 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 4 6F 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 4 67 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 4 6F 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 4 67 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD --TurnRegSel5 on 0 2 111111 1 1 0 6B 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 63 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 6B 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 63 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 65 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD --RegSel5 on 0 2 111111 1 1 0 6D 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD --WriteExtClk 0 2 111111 1 1 0 65 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 6D 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 65 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 6F 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 67 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 6F 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 67 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 6F 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- 0 2 111111 1 1 0 67 5 1 5 1 222222 | 1 1 EEEEEE 2 X 2 0 DDDDDD -- <<-- Already known to work>> -- test OrInH->nOrOutB: 0 0 000000 1 1 7 64 0 1 0 1 000000 | 1 3 FFFFFF 7 X 7 0 FFFFFF -- nOrOutB _ NOT OrInH 1 0 000000 1 1 7 64 0 1 0 1 000000 | 0 3 FFFFFF 7 X 7 0 FFFFFF 2 0 000000 1 1 7 64 0 1 0 1 000000 | 0 3 FFFFFF 7 X 7 0 FFFFFF 3 0 000000 1 1 7 64 0 1 0 1 000000 | 0 3 FFFFFF 7 X 7 0 FFFFFF 4 0 000000 1 1 7 64 0 1 0 1 000000 | 0 3 FFFFFF 7 X 7 0 FFFFFF 5 0 000000 1 1 7 64 0 1 0 1 000000 | 0 3 FFFFFF 7 X 7 0 FFFFFF 6 0 000000 1 1 7 64 0 1 0 1 000000 | 0 3 FFFFFF 7 X 7 0 FFFFFF 7 0 000000 1 1 7 64 0 1 0 1 000000 | 0 3 FFFFFF 7 X 7 0 FFFFFF 8 0 000000 1 1 7 64 0 1 0 1 000000 | 0 3 FFFFFF 7 X 7 0 FFFFFF 9 0 000000 1 1 7 64 0 1 0 1 000000 | 0 3 FFFFFF 7 X 7 0 FFFFFF A 0 000000 1 1 7 64 0 1 0 1 000000 | 0 3 FFFFFF 7 X 7 0 FFFFFF B 0 000000 1 1 7 64 0 1 0 1 000000 | 0 3 FFFFFF 7 X 7 0 FFFFFF C 0 000000 1 1 7 64 0 1 0 1 000000 | 0 3 FFFFFF 7 X 7 0 FFFFFF D 0 000000 1 1 7 64 0 1 0 1 000000 | 0 3 FFFFFF 7 X 7 0 FFFFFF E 0 000000 1 1 7 64 0 1 0 1 000000 | 0 3 FFFFFF 7 X 7 0 FFFFFF F 0 000000 1 1 7 64 0 1 0 1 000000 | 0 3 FFFFFF 7 X 7 0 FFFFFF -- test RqIn->nRqOutB: 0 0 000000 1 1 7 64 0 1 0 1 000000 | 1 3 FFFFFF 7 X 7 0 FFFFFF -- nRqOutB _ NOT RqIn 0 1 000000 1 1 7 64 0 1 0 1 000000 | 1 2 FFFFFF 7 X 7 0 FFFFFF 0 2 000000 1 1 7 64 0 1 0 1 000000 | 1 1 FFFFFF 7 X 7 0 FFFFFF 0 3 000000 1 1 7 64 0 1 0 1 000000 | 1 0 FFFFFF 7 X 7 0 FFFFFF -- test BInH->nBOutB: 0 0 000000 1 1 7 64 0 1 0 1 000000 | 1 3 FFFFFF 7 X 7 0 FFFFFF -- nBOutB _ NOT (BInH AND Send) 0 0 000001 1 1 7 64 0 1 0 1 000000 | 1 3 FFFFFE 7 X 7 0 FFFFFF 0 0 000002 1 1 7 64 0 1 0 1 000000 | 1 3 FFFFFD 7 X 7 0 FFFFFF 0 0 000004 1 1 7 64 0 1 0 1 000000 | 1 3 FFFFFB 7 X 7 0 FFFFFF 0 0 000008 1 1 7 64 0 1 0 1 000000 | 1 3 FFFFF7 7 X 7 0 FFFFFF 0 0 00000F 1 1 7 64 0 1 0 1 000000 | 1 3 FFFFF0 7 X 7 0 FFFFFF 0 0 000050 1 1 7 64 0 1 0 1 000000 | 1 3 FFFFAF 7 X 7 0 FFFFFF 0 0 000500 1 1 7 64 0 1 0 1 000000 | 1 3 FFFAFF 7 X 7 0 FFFFFF 0 0 005000 1 1 7 64 0 1 0 1 000000 | 1 3 FFAFFF 7 X 7 0 FFFFFF 0 0 050000 1 1 7 64 0 1 0 1 000000 | 1 3 FAFFFF 7 X 7 0 FFFFFF 0 0 500000 1 1 7 64 0 1 0 1 000000 | 1 3 AFFFFF 7 X 7 0 FFFFFF 0 0 FFFFFF 1 1 7 64 0 1 0 1 000000 | 1 3 000000 7 X 7 0 FFFFFF -- test Send: 0 0 050000 0 1 7 64 0 1 0 1 000000 | 1 3 FFFFFF 7 X 7 0 FFFFFF -- nBOutB _ NOT (BInH AND Send) 0 0 050000 1 1 7 64 0 1 0 1 000000 | 1 3 FAFFFF 7 X 7 0 FFFFFF 0 0 050000 2 1 7 64 0 1 0 1 000000 | 1 3 FAFFFF 7 X 7 0 FFFFFF 0 0 050000 3 1 7 64 0 1 0 1 000000 | 1 3 FAFFFF 7 X 7 0 FFFFFF 0 0 050000 4 1 7 64 0 1 0 1 000000 | 1 3 FAFFFF 7 X 7 0 FFFFFF 0 0 050000 5 1 7 64 0 1 0 1 000000 | 1 3 FAFFFF 7 X 7 0 FFFFFF 0 0 050000 6 1 7 64 0 1 0 1 000000 | 1 3 FAFFFF 7 X 7 0 FFFFFF 0 0 050000 7 1 7 64 0 1 0 1 000000 | 1 3 FAFFFF 7 X 7 0 FFFFFF 0 0 050000 8 1 7 64 0 1 0 1 000000 | 1 3 FAFFFF 7 X 7 0 FFFFFF 0 0 050000 9 1 7 64 0 1 0 1 000000 | 1 3 FAFFFF 7 X 7 0 FFFFFF 0 0 050000 A 1 7 64 0 1 0 1 000000 | 1 3 FAFFFF 7 X 7 0 FFFFFF 0 0 050000 B 1 7 64 0 1 0 1 000000 | 1 3 FAFFFF 7 X 7 0 FFFFFF 0 0 050000 C 1 7 64 0 1 0 1 000000 | 1 3 FAFFFF 7 X 7 0 FFFFFF 0 0 050000 D 1 7 64 0 1 0 1 000000 | 1 3 FAFFFF 7 X 7 0 FFFFFF 0 0 050000 E 1 7 64 0 1 0 1 000000 | 1 3 FAFFFF 7 X 7 0 FFFFFF 0 0 050000 F 1 7 64 0 1 0 1 000000 | 1 3 FAFFFF 7 X 7 0 FFFFFF -- test DInH->nDOutB: 0 0 000000 1 1 7 64 0 1 0 1 000000 | 1 3 FFFFFF 7 X 7 0 FFFFFF -- nDOutB _ NOT (DInH AND DOEn) 0 0 000000 1 1 7 64 1 1 0 1 000000 | 1 3 FFFFFF 6 X 7 0 FFFFFF 0 0 000000 1 1 7 64 2 1 0 1 000000 | 1 3 FFFFFF 5 X 7 0 FFFFFF 0 0 000000 1 1 7 64 4 1 0 1 000000 | 1 3 FFFFFF 3 X 7 0 FFFFFF 0 0 000000 1 1 7 64 7 1 0 1 000000 | 1 3 FFFFFF 0 X 7 0 FFFFFF -- test DOEn: 0 0 000000 1 1 7 64 4 1 0 1 000000 | 1 3 FFFFFF 3 X 7 0 FFFFFF -- nDOutB _ NOT (DInH AND DOEn) 0 0 000000 1 1 7 64 4 0 0 1 000000 | 1 3 FFFFFF 7 X 7 0 FFFFFF --nDOutB is high -- test nDinB->DOutH: 0 0 000000 1 1 7 64 0 1 0 1 000000 | 1 3 FFFFFF 7 X 7 0 FFFFFF -- DOutH _ NOT nDinB 0 0 000000 1 1 7 64 0 1 1 1 000000 | 1 3 FFFFFF 7 X 6 0 FFFFFF 0 0 000000 1 1 7 64 0 1 2 1 000000 | 1 3 FFFFFF 7 X 5 0 FFFFFF 0 0 000000 1 1 7 64 0 1 4 1 000000 | 1 3 FFFFFF 7 X 3 0 FFFFFF 0 0 000000 1 1 7 64 0 1 7 1 000000 | 1 3 FFFFFF 7 X 0 0 FFFFFF -- test nBInB->BOutH: 0 0 000000 1 1 7 64 0 1 0 1 000000 | 1 3 FFFFFF 7 X 7 0 FFFFFF -- BOutH _ NOT nBInB 0 0 000000 1 1 7 64 0 1 0 1 000001 | 1 3 FFFFFF 7 X 7 0 FFFFFE 0 0 000000 1 1 7 64 0 1 0 1 000002 | 1 3 FFFFFF 7 X 7 0 FFFFFD 0 0 000000 1 1 7 64 0 1 0 1 000004 | 1 3 FFFFFF 7 X 7 0 FFFFFB 0 0 000000 1 1 7 64 0 1 0 1 000008 | 1 3 FFFFFF 7 X 7 0 FFFFF7 0 0 000000 1 1 7 64 0 1 0 1 00000F | 1 3 FFFFFF 7 X 7 0 FFFFF0 0 0 000000 1 1 7 64 0 1 0 1 000050 | 1 3 FFFFFF 7 X 7 0 FFFFAF 0 0 000000 1 1 7 64 0 1 0 1 000500 | 1 3 FFFFFF 7 X 7 0 FFFAFF 0 0 000000 1 1 7 64 0 1 0 1 005000 | 1 3 FFFFFF 7 X 7 0 FFAFFF 0 0 000000 1 1 7 64 0 1 0 1 050000 | 1 3 FFFFFF 7 X 7 0 FAFFFF 0 0 000000 1 1 7 64 0 1 0 1 500000 | 1 3 FFFFFF 7 X 7 0 AFFFFF 0 0 000000 1 1 7 64 0 1 0 1 FFFFFF | 1 3 FFFFFF 7 X 7 0 000000 .