IMPORTS IO, Transistors;Library Gates, Latches, Transistors;CellType "BarrelShifter"PORTS [left0, left1, left2, left3, left4, left5, left6, left7, left8, left9, left10, left11, left12, left13, left14, left15=BIT, right0, right1, right2, right3, right4, right5, right6, right7, right8, right9, right10, right11, right12, right13, right14, right15=BIT, shift0, shift1, shift2, shift3, shift4, shift5, shift6, shift7, shift8, shift9, shift10, shift11, shift12, shift13, shift14, shift15 -- in -- =BIT, Vdd, Gnd=BIT]ExpandCEDARFOR i: NAT IN [0..16) DOFOR j: NAT IN [0..16) DO[] _ to.class.CellInstance[erInstance: to.instance, instanceName: IO.PutFR["T%g-%g", IO.card[i], IO.card[j]], typeName: Transistors.nE.name, interfaceNodes: IO.PutFR["gate: shift%g, ch1: left%g, ch2: right%g", IO.card[(i-j+16) MOD 16], IO.card[i], IO.card[j]]];ENDLOOP;ENDLOOPEndCellType    Æ  BarrelShifter.RoseCopyright (C) 1984 by Xerox Corp.  All rights reserved.Last Edited by: Gasbarro, August 7, 1984 10:03:38 am PDTLast Edited by: Spreitzer, August 18, 1984 10:43:39 pm PDTÊ â  ˜ Jšœ™J™7J™8J™:J™ JšÏkœœ˜J˜ Jšœ$˜$J˜ J˜ šœ
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